blackfin: run core1 from L1 code sram start address in uboot init code on core 0

Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>

diff --git a/arch/blackfin/cpu/cpu.c b/arch/blackfin/cpu/cpu.c
index 0be2e2b835b23ab5c9cded732588faffd231f8d9..d841f64c82cbedaccbfbeb1e5958b406793d6704 100644 (file)
--- a/arch/blackfin/cpu/cpu.c
+++ b/arch/blackfin/cpu/cpu.c
@@ -23,6 +23,32 @@
 
 ulong bfin_poweron_retx;
 
+#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
+void bfin_core1_start(void)
+{
+#ifdef BF561_FAMILY
+       /* Enable core 1 */
+       bfin_write_SYSCR(bfin_read_SYSCR() & ~0x0020);
+#else
+       /* Enable core 1 */
+       bfin_write32(RCU0_SVECT1, COREB_L1_CODE_START);
+       bfin_write32(RCU0_CRCTL, 0);
+
+       bfin_write32(RCU0_CRCTL, 0x2);
+
+       /* Check if core 1 starts */
+       while (!(bfin_read32(RCU0_CRSTAT) & 0x2))
+               continue;
+
+       bfin_write32(RCU0_CRCTL, 0);
+
+       /* flag to notify cces core 1 application */
+       bfin_write32(SDU0_MSG_SET, (1 << 19));
+#endif
+}
+#endif
+
+__attribute__ ((__noreturn__))
 void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
 {
 #ifndef CONFIG_BFIN_BOOTROM_USES_EVT1
@@ -72,6 +98,10 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr)
 # endif
 #endif
 
+#if defined(CONFIG_CORE1_RUN) && defined(COREB_L1_CODE_START)
+       bfin_core1_start();
+#endif
+
        serial_early_puts("Board init flash\n");
        board_init_f(bootflag);
 }

diff --git a/arch/blackfin/include/asm/mach-bf561/BF561_def.h b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
index a7ff5a3feba842575801d4ea72b8c68808687052..8fd552f2a12f2446450aead1edf73cb0135fe067 100644 (file)
--- a/arch/blackfin/include/asm/mach-bf561/BF561_def.h
+++ b/arch/blackfin/include/asm/mach-bf561/BF561_def.h
@@ -714,4 +714,6 @@
 #define L1_INST_SRAM_SIZE (0xFFA03FFF - 0xFFA00000 + 1)
 #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
 
+#define COREB_L1_CODE_START       0xFF600000
+
 #endif /* __BFIN_DEF_ADSP_BF561_proc__ */

diff --git a/arch/blackfin/include/asm/mach-bf609/BF609_def.h b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
index 8c1dcd006e4ac77ba4fb6297d4fe7c6754e46967..4d3b003409f1abb49b50eb5302cb4aaa31733467 100644 (file)
--- a/arch/blackfin/include/asm/mach-bf609/BF609_def.h
+++ b/arch/blackfin/include/asm/mach-bf609/BF609_def.h
@@ -244,4 +244,6 @@
 #define L1_INST_SRAM_SIZE 0x8000
 #define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE)
 
+#define COREB_L1_CODE_START       0xFF600000
+
 #endif /* __BFIN_DEF_ADSP_BF609_proc__ */

diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 1a9d27ea2a04f673e6bdae92b4690d0b6d6f982d..6ee1e4c869d945118e9c01cfc430abdfd763f4a5 100644 (file)
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -98,6 +98,11 @@
  */
 #define CONFIG_UART_CONSOLE    0
 
+/*
+ * Run core 1 from L1 SRAM start address when init uboot on core 0
+ */
+/* #define CONFIG_CORE1_RUN    1 */
+
 
 /*
  * Pull in common ADI header for remaining command/environment setup

diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h
index 02149fa94df9849bc57568aae08f7643bb1d8e70..8b90129f29eeacf193faac1fed3bb4e91de7e87e 100644 (file)
--- a/include/configs/bf609-ezkit.h
+++ b/include/configs/bf609-ezkit.h
@@ -155,6 +155,11 @@
 #undef CONFIG_UART_CONSOLE_IS_JTAG
 #endif
 
+/*
+ * Run core 1 from L1 SRAM start address when init uboot on core 0
+ */
+/* #define CONFIG_CORE1_RUN    1 */
+
 /*
  * Pull in common ADI header for remaining command/environment setup
  */