endif
# Always append ALL so that arch config.mk's can add custom ones
-ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map u-boot.cfg \
- binary_size_check no_new_adhoc_configs_check
+ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
ifeq ($(CONFIG_SPL_FSL_PBL),y)
@echo "before sending patches to the mailing list."
@echo "===================================================="
endif
+ @# Check that this build does not use CONFIG options that we do not
+ @# know about unless they are in Kconfig. All the existing CONFIG
+ @# options are whitelisted, so new ones should not be added.
+ $(srctree)/scripts/check-config.sh u-boot.cfg \
+ $(srctree)/scripts/config_whitelist.txt ${srctree} 1>&2
PHONY += dtbs
dtbs: dts/dt.dtb
u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
-# If .u-boot.cfg.d is still present, then either:
-# a) The previous build used a Makefile that used if_changed rather than
-# if_changed_dep when building u-boot.cfg, and hence any later builds will
-# be unaware of the dependencies for u-boot.cfg. In this case, we must
-# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the
-# correct way.
-# b) The previous build failed or was interrupted while building u-boot.cfg,
-# so deleting u-boot.cfg isn't going to cause any additional work.
-ifneq ($(wildcard $(obj)/.u-boot.cfg.d),)
- unused := $(shell rm -f $(obj)/u-boot.cfg)
-endif
-u-boot.cfg: include/config.h FORCE
- $(call if_changed_dep,cpp_cfg)
-
-# Check that this build does not use CONFIG options that we don't know about
-# unless they are in Kconfig. All the existing CONFIG options are whitelisted,
-# so new ones should not be added.
-no_new_adhoc_configs_check: u-boot.cfg FORCE
- $(srctree)/scripts/check-config.sh $< \
- $(srctree)/scripts/config_whitelist.txt ${srctree} 1>&2
-
ifdef CONFIG_TPL
SPL_PAYLOAD := tpl/u-boot-with-tpl.bin
else
- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Define exactly one, e.g. CONFIG_ATSTK1002
-- CPU Module Type: (if CONFIG_COGENT is defined)
- Define exactly one of
- CONFIG_CMA286_60_OLD
---- FIXME --- not tested yet:
- CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
- CONFIG_CMA287_23, CONFIG_CMA287_50
-
-- Motherboard Type: (if CONFIG_COGENT is defined)
- Define exactly one of
- CONFIG_CMA101, CONFIG_CMA102
-
-- Motherboard I/O Modules: (if CONFIG_COGENT is defined)
- Define one or more of
- CONFIG_CMA302
-
-- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
- Define one or more of
- CONFIG_LCD_HEARTBEAT - update a character position on
- the LCD display every second with
- a "rotator" |\-/|\-/
-
- Marvell Family Member
CONFIG_SYS_MVFS - define it if you want to enable
multiple fs option at one time
CONFIG_SYS_FSL_SEC_LE
Defines the SEC controller register space as Little Endian
-- Intel Monahans options:
- CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
-
- Defines the Monahans run mode to oscillator
- ratio. Valid values are 8, 16, 24, 31. The core
- frequency is this value multiplied by 13 MHz.
-
- CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
-
- Defines the Monahans turbo mode to oscillator
- ratio. Valid values are 1 (default if undefined) and
- 2. The core frequency as calculated above is multiplied
- by this value.
-
- MIPS CPU options:
CONFIG_SYS_INIT_SP_OFFSET
This causes ft_system_setup() to be called before booting
the kernel.
- CONFIG_OF_BOOT_CPU
-
- This define fills in the correct boot CPU in the boot
- param header, the default value is zero if undefined.
-
CONFIG_OF_IDE_FIXUP
U-Boot can detect if an IDE device is present or not.
CONFIG_LAN91C96
Support for SMSC's LAN91C96 chips.
- CONFIG_LAN91C96_BASE
- Define this to hold the physical address
- of the LAN91C96's I/O space
-
CONFIG_LAN91C96_USE_32_BIT
Define this to enable 32 bit addressing
- PWM Support:
CONFIG_PWM_IMX
- Support for PWM modul on the imx6.
+ Support for PWM module on the imx6.
- TPM Support:
CONFIG_TPM
Derive USB clock from external clock "blah"
- CONFIG_SYS_USB_EXTC_CLK 0x02
- CONFIG_SYS_USB_BRG_CLK 0xBLAH
- Derive USB clock from brgclk
- - CONFIG_SYS_USB_BRG_CLK 0x04
-
If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
or directly in usbd_vendor_info.h. If you don't define
If not defined the default value "mbr" is used.
- Journaling Flash filesystem support:
- CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
- CONFIG_JFFS2_NAND_DEV
+ CONFIG_JFFS2_NAND
Define these for a default partition on a NAND device
CONFIG_SYS_JFFS2_FIRST_SECTOR,
CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
Define these for a default partition on a NOR device
- CONFIG_SYS_JFFS_CUSTOM_PART
- Define this to create an own partition. You have to provide a
- function struct part_info* jffs2_part_info(int part_num)
-
- If you define only one JFFS2 partition you may also want to
- #define CONFIG_SYS_JFFS_SINGLE_PART 1
- to disable the command chpart. This is the default when you
- have not defined a custom partition
-
- FAT(File Allocation Table) filesystem write function support:
CONFIG_FAT_WRITE
- CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
- CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
- CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
- - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5
- - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
- CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/omap24xx_i2c.c
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
- Hold the number of i2c buses you want to use. If you
- don't use/have i2c muxes on your i2c bus, this
- is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can
- omit this define.
+ Hold the number of i2c buses you want to use.
CONFIG_SYS_I2C_DIRECT_BUS
define this, if you don't use i2c muxes on your hardware.
will skip addresses 0x50 and 0x68 on a board with one I2C bus
#define CONFIG_I2C_MULTI_BUS
- #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
+ #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
- CONFIG_SYS_SDRAM_BASE:
Physical start address of SDRAM. _Must_ be 0 here.
-- CONFIG_SYS_MBIO_BASE:
- Physical start address of Motherboard I/O (if using a
- Cogent motherboard)
-
- CONFIG_SYS_FLASH_BASE:
Physical start address of Flash memory.
This setting describes a second storage area of CONFIG_ENV_SIZE
size used to hold a redundant copy of the environment data, so
that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
aligned to an erase sector boundary.
- CONFIG_ENV_SPI_BUS (optional):
This setting describes a second storage area of CONFIG_ENV_SIZE
size used to hold a redundant copy of the environment data, so
that there is a valid backup copy in case there is a power failure
- during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
aligned to an erase block boundary.
- CONFIG_ENV_RANGE (optional):
CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
- CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
+ GENERATED_GBL_DATA_SIZE), and the initial stack is just
below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_GBL_DATA_OFFSET) downward.
enable SPI microcode relocation patch (MPC8xx);
define relocation offset in DPRAM [SCC4]
-- CONFIG_SYS_USE_OSCCLK:
- Use OSCM clock mode on MBX8xx board. Be careful,
- wrong setting might damage your board. Read
- doc/README.MBX before setting this variable!
-
- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
Offset of the bootmode word in DPRAM used by post
(Power On Self Tests). This definition overrides
Specifies that QE/FMAN firmware is located on the primary SD/MMC
device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
-- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
- Specifies that QE/FMAN firmware is located on the primary SPI
- device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
-
- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
Specifies that QE/FMAN firmware is located in the remote (master)
memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
- CONFIG_FSL_MC_ENET
Enable the MC driver for Layerscape SoCs.
-- CONFIG_SYS_LS_MC_FW_ADDR
- The address in the storage device where the firmware is located. The
- meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro
- is also specified.
-
-- CONFIG_SYS_LS_MC_FW_LENGTH
- The maximum possible size of the firmware. The firmware binary format
- has a field that specifies the actual size of the firmware, but it
- might not be possible to read any part of the firmware unless some
- local storage is allocated to hold the entire firmware first.
-
-- CONFIG_SYS_LS_MC_FW_IN_NOR
- Specifies that MC firmware is located in NOR flash, mapped as
- normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
- virtual address in NOR flash.
-
Freescale Layerscape Debug Server Support:
-------------------------------------------
The Freescale Layerscape Debug Server Support supports the loading of
case TI81XX:
cpu_s = "TI81XX";
break;
+ case AM437X:
+ cpu_s = "AM437X";
+ break;
default:
cpu_s = "Unknown CPU type";
break;
else
sec_s = "?";
- printf("%s-%s rev %s\n", cpu_s, sec_s, rev_s);
+ printf("CPU : %s-%s rev %s\n", cpu_s, sec_s, rev_s);
return 0;
}
/*
* Setup a temporary stack. Global data is not available yet.
*/
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+ ldr sp, =CONFIG_SPL_STACK
+#else
ldr sp, =CONFIG_SYS_INIT_SP_ADDR
+#endif
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
#ifdef CONFIG_SPL_DM
mov r9, #0
str r0, [r1]
b save_boot_params_ret
ENDPROC(save_boot_params)
+
+#if !defined(CONFIG_TI_SECURE_DEVICE) && defined(CONFIG_ARMV7_LPAE)
+ENTRY(switch_to_hypervisor)
+
+/*
+ * Switch to hypervisor mode
+ */
+ adr r0, save_sp
+ str sp, [r0]
+ adr r1, restore_from_hyp
+ ldr r0, =0x102
+ b omap_smc1
+restore_from_hyp:
+ adr r0, save_sp
+ ldr sp, [r0]
+ MRC p15, 4, R0, c1, c0, 0
+ ldr r1, =0X1004 @Set cache enable bits for hypervisor mode
+ orr r0, r0, r1
+ MCR p15, 4, R0, c1, c0, 0
+ b switch_to_hypervisor_ret
+save_sp:
+ .word 0x0
+ENDPROC(switch_to_hypervisor)
+#endif
#endif
ENTRY(omap_smc1)
DECLARE_GLOBAL_DATA_PTR;
-#define ARMV7_DCACHE_WRITEBACK 0xe
+/*
+ * Without LPAE short descriptors are used
+ * Set C - Cache Bit3
+ * Set B - Buffer Bit2
+ * The last 2 bits set to 0b10
+ * Do Not set XN bit4
+ * So value is 0xe
+ *
+ * With LPAE cache configuration happens via MAIR0 register
+ * AttrIndx value is 0x3 for picking byte3 for MAIR0 which has 0xFF.
+ * 0xFF maps to Cache writeback with Read and Write Allocate set
+ * The bits[1:0] should have the value 0b01 for the first level
+ * descriptor.
+ * So the value is 0xd
+ */
+
+#ifdef CONFIG_ARMV7_LPAE
+#define ARMV7_DCACHE_POLICY DCACHE_WRITEALLOC
+#else
+#define ARMV7_DCACHE_POLICY DCACHE_WRITEBACK & ~TTB_SECT_XN_MASK
+#endif
+
#define ARMV7_DOMAIN_CLIENT 1
#define ARMV7_DOMAIN_MASK (0x3 << 0)
bd_t *bd = gd->bd;
int i;
- u32 start = bd->bi_dram[bank].start >> 20;
- u32 size = bd->bi_dram[bank].size >> 20;
+ u32 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
+ u32 size = bd->bi_dram[bank].size >> MMU_SECTION_SHIFT;
u32 end = start + size;
debug("%s: bank: %d\n", __func__, bank);
for (i = start; i < end; i++)
- set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
+ set_section_dcache(i, ARMV7_DCACHE_POLICY);
}
void arm_init_domains(void)
config SPL_SERIAL_SUPPORT
default y
+config SPL_DISPLAY_PRINT
+ default y
+
choice
prompt "OMAP4 board select"
optional
config SPL_SERIAL_SUPPORT
default y
+config SPL_DISPLAY_PRINT
+ default y
+
choice
prompt "OMAP5 board select"
optional
#include <config.h>
#include <asm/system.h>
#include <linux/linkage.h>
+#include <asm/armv7.h>
/*************************************************************************
*
.globl reset
.globl save_boot_params_ret
+#ifdef CONFIG_ARMV7_LPAE
+ .global switch_to_hypervisor_ret
+#endif
reset:
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
+#ifdef CONFIG_ARMV7_LPAE
+/*
+ * check for Hypervisor support
+ */
+ mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
+ and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits
+ cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT)
+ beq switch_to_hypervisor
+switch_to_hypervisor_ret:
+#endif
/*
* disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
* except if in HYP mode already
ENDPROC(save_boot_params)
.weak save_boot_params
+#ifdef CONFIG_ARMV7_LPAE
+ENTRY(switch_to_hypervisor)
+ b switch_to_hypervisor_ret
+ENDPROC(switch_to_hypervisor)
+ .weak switch_to_hypervisor
+#endif
+
/*************************************************************************
*
* cpu_init_cp15
#define SEC_FIRMWARE_LOADED 0x1
#define SEC_FIRMWARE_RUNNING 0x2
#define SEC_FIRMWARE_ADDR_MASK (~0x3)
- /*
- * Secure firmware load addr
- * Flags used: 0x1 secure firmware has been loaded to secure memory
- * 0x2 secure firmware is running
- */
- phys_addr_t sec_firmware_addr;
+/*
+ * Secure firmware load addr
+ * Flags used: 0x1 secure firmware has been loaded to secure memory
+ * 0x2 secure firmware is running
+ */
+phys_addr_t sec_firmware_addr;
+
+#ifndef SEC_FIRMWARE_FIT_IMAGE
+#define SEC_FIRMWARE_FIT_IMAGE "firmware"
+#endif
+#ifndef SEC_FIRMEWARE_FIT_CNF_NAME
+#define SEC_FIRMEWARE_FIT_CNF_NAME "config@1"
+#endif
+#ifndef SEC_FIRMWARE_TARGET_EL
+#define SEC_FIRMWARE_TARGET_EL 2
+#endif
static int sec_firmware_get_data(const void *sec_firmware_img,
const void **data, size_t *size)
socfpga_cyclone5_sr1500.dtb \
socfpga_cyclone5_vining_fpga.dtb
-dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb
+dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
+ dra72-evm-revc.dtb
dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
am572x-idk.dtb
dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
--- /dev/null
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "dra72x.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
+
+ chosen {
+ stdout-path = &uart1;
+ tick-timer = &timer2;
+ };
+
+ aliases {
+ display0 = &hdmi0;
+ };
+
+ evm_3v3: fixedregulator-evm_3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "evm_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ extcon_usb1: extcon_usb1 {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ extcon_usb2: extcon_usb2 {
+ compatible = "linux,extcon-usb-gpio";
+ id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ hdmi0: connector {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&tpd12s015_out>;
+ };
+ };
+ };
+
+ tpd12s015: encoder {
+ compatible = "ti,tpd12s015";
+
+ gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
+ <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
+ <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ tpd12s015_in: endpoint {
+ remote-endpoint = <&hdmi_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ tpd12s015_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
+};
+
+&dra7_pmx_core {
+ mmc1_pins_default: mmc1_pins_default {
+ pinctrl-single,pins = <
+ 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
+ 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+ 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+ 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+ 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+ 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+ >;
+ };
+
+ mmc2_pins_default: mmc2_pins_default {
+ pinctrl-single,pins = <
+ 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
+ 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
+ 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
+ 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
+ 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
+ 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
+ 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
+ 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
+ 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
+ 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
+ >;
+ };
+
+ dcan1_pins_default: dcan1_pins_default {
+ pinctrl-single,pins = <
+ 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
+ 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
+ >;
+ };
+
+ dcan1_pins_sleep: dcan1_pins_sleep {
+ pinctrl-single,pins = <
+ 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
+ 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
+ >;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps65917: tps65917@58 {
+ compatible = "ti,tps65917";
+ reg = <0x58>;
+
+ interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ ti,system-power-controller;
+
+ tps65917_pmic {
+ compatible = "ti,tps65917-pmic";
+
+ tps65917_regulators: regulators {
+ smps1_reg: smps1 {
+ /* VDD_MPU */
+ regulator-name = "smps1";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps2_reg: smps2 {
+ /* VDD_CORE */
+ regulator-name = "smps2";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1060000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps3_reg: smps3 {
+ /* VDD_GPU IVA DSPEVE */
+ regulator-name = "smps3";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <1250000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ smps4_reg: smps4 {
+ /* VDDS1V8 */
+ regulator-name = "smps4";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ smps5_reg: smps5 {
+ /* VDD_DDR */
+ regulator-name = "smps5";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: ldo1 {
+ /* LDO1_OUT --> SDIO */
+ regulator-name = "ldo1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-allow-bypass;
+ };
+
+ ldo3_reg: ldo3 {
+ /* VDDA_1V8_PHY */
+ regulator-name = "ldo3";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo5_reg: ldo5 {
+ /* VDDA_1V8_PLL */
+ regulator-name = "ldo5";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo4_reg: ldo4 {
+ /* VDDA_3V_USB: VDDA_USBHS33 */
+ regulator-name = "ldo4";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ };
+ };
+ };
+
+ tps65917_power_button {
+ compatible = "ti,palmas-pwrbutton";
+ interrupt-parent = <&tps65917>;
+ interrupts = <1 IRQ_TYPE_NONE>;
+ wakeup-source;
+ ti,palmas-long-press-seconds = <6>;
+ };
+ };
+
+ pcf_gpio_21: gpio@21 {
+ compatible = "ti,pcf8575";
+ u-boot,i2c-offset-len = <0>;
+ reg = <0x21>;
+ lines-initial-states = <0x1408>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};
+
+&i2c5 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ pcf_hdmi: pcf8575@26 {
+ compatible = "nxp,pcf8575";
+ u-boot,i2c-offset-len = <0>;
+ reg = <0x26>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ /*
+ * initial state is used here to keep the mdio interface
+ * selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and
+ * VIN2_S0 driven high otherwise Ethernet stops working
+ * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
+ */
+ lines-initial-states = <0x0f2b>;
+
+ p1 {
+ /* vin6_sel_s0: high: VIN6, low: audio */
+ gpio-hog;
+ gpios = <1 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "vin6_sel_s0";
+ };
+ };
+};
+
+&uart1 {
+ status = "okay";
+ interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <&dra7_pmx_core 0x3e0>;
+};
+
+&elm {
+ status = "okay";
+};
+
+&gpmc {
+ /*
+ * For the existing IOdelay configuration via U-Boot we don't
+ * support NAND on dra72-evm. Keep it disabled. Enabling it
+ * requires a different configuration by U-Boot.
+ */
+ status = "disabled";
+ ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */
+ nand@0,0 {
+ /* To use NAND, DIP switch SW5 must be set like so:
+ * SW5.1 (NAND_SELn) = ON (LOW)
+ * SW5.9 (GPMC_WPN) = OFF (HIGH)
+ */
+ compatible = "ti,omap2-nand";
+ reg = <0 0 4>; /* device IO registers */
+ interrupt-parent = <&gpmc>;
+ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
+ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ /* device IO registers */
+ ti,nand-ecc-opt = "bch8";
+ ti,elm-id = <&elm>;
+ nand-bus-width = <16>;
+ gpmc,device-width = <2>;
+ gpmc,sync-clk-ps = <0>;
+ gpmc,cs-on-ns = <0>;
+ gpmc,cs-rd-off-ns = <80>;
+ gpmc,cs-wr-off-ns = <80>;
+ gpmc,adv-on-ns = <0>;
+ gpmc,adv-rd-off-ns = <60>;
+ gpmc,adv-wr-off-ns = <60>;
+ gpmc,we-on-ns = <10>;
+ gpmc,we-off-ns = <50>;
+ gpmc,oe-on-ns = <4>;
+ gpmc,oe-off-ns = <40>;
+ gpmc,access-ns = <40>;
+ gpmc,wr-access-ns = <80>;
+ gpmc,rd-cycle-ns = <80>;
+ gpmc,wr-cycle-ns = <80>;
+ gpmc,bus-turnaround-ns = <0>;
+ gpmc,cycle2cycle-delay-ns = <0>;
+ gpmc,clk-activation-ns = <0>;
+ gpmc,wait-monitoring-ns = <0>;
+ gpmc,wr-data-mux-bus-ns = <0>;
+ /* MTD partition table */
+ /* All SPL-* partitions are sized to minimal length
+ * which can be independently programmable. For
+ * NAND flash this is equal to size of erase-block */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "NAND.SPL";
+ reg = <0x00000000 0x000020000>;
+ };
+ partition@1 {
+ label = "NAND.SPL.backup1";
+ reg = <0x00020000 0x00020000>;
+ };
+ partition@2 {
+ label = "NAND.SPL.backup2";
+ reg = <0x00040000 0x00020000>;
+ };
+ partition@3 {
+ label = "NAND.SPL.backup3";
+ reg = <0x00060000 0x00020000>;
+ };
+ partition@4 {
+ label = "NAND.u-boot-spl-os";
+ reg = <0x00080000 0x00040000>;
+ };
+ partition@5 {
+ label = "NAND.u-boot";
+ reg = <0x000c0000 0x00100000>;
+ };
+ partition@6 {
+ label = "NAND.u-boot-env";
+ reg = <0x001c0000 0x00020000>;
+ };
+ partition@7 {
+ label = "NAND.u-boot-env.backup1";
+ reg = <0x001e0000 0x00020000>;
+ };
+ partition@8 {
+ label = "NAND.kernel";
+ reg = <0x00200000 0x00800000>;
+ };
+ partition@9 {
+ label = "NAND.file-system";
+ reg = <0x00a00000 0x0f600000>;
+ };
+ };
+};
+
+&usb2_phy1 {
+ phy-supply = <&ldo4_reg>;
+};
+
+&usb2_phy2 {
+ phy-supply = <&ldo4_reg>;
+};
+
+&omap_dwc3_1 {
+ extcon = <&extcon_usb1>;
+};
+
+&omap_dwc3_2 {
+ extcon = <&extcon_usb2>;
+};
+
+&usb1 {
+ dr_mode = "otg";
+};
+
+&usb2 {
+ dr_mode = "host";
+};
+
+&mmc1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_default>;
+ vmmc_aux-supply = <&ldo1_reg>;
+ bus-width = <4>;
+ /*
+ * SDCD signal is not being used here - using the fact that GPIO mode
+ * is a viable alternative
+ */
+ cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
+ max-frequency = <192000000>;
+};
+
+&mmc2 {
+ /* SW5-3 in ON position */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins_default>;
+
+ vmmc-supply = <&evm_3v3>;
+ bus-width = <8>;
+ ti,non-removable;
+ max-frequency = <192000000>;
+};
+
+&mac {
+ status = "okay";
+};
+
+&dcan1 {
+ status = "ok";
+};
+
+&qspi {
+ status = "okay";
+
+ spi-max-frequency = <76800000>;
+ m25p80@0 {
+ compatible = "s25fl256s1", "spi-flash";
+ spi-max-frequency = <64000000>;
+ reg = <0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* MTD partition table.
+ * The ROM checks the first four physical blocks
+ * for a valid file to boot and the flash here is
+ * 64KiB block size.
+ */
+ partition@0 {
+ label = "QSPI.SPL";
+ reg = <0x00000000 0x000010000>;
+ };
+ partition@1 {
+ label = "QSPI.SPL.backup1";
+ reg = <0x00010000 0x00010000>;
+ };
+ partition@2 {
+ label = "QSPI.SPL.backup2";
+ reg = <0x00020000 0x00010000>;
+ };
+ partition@3 {
+ label = "QSPI.SPL.backup3";
+ reg = <0x00030000 0x00010000>;
+ };
+ partition@4 {
+ label = "QSPI.u-boot";
+ reg = <0x00040000 0x00100000>;
+ };
+ partition@5 {
+ label = "QSPI.u-boot-spl-os";
+ reg = <0x00140000 0x00080000>;
+ };
+ partition@6 {
+ label = "QSPI.u-boot-env";
+ reg = <0x001c0000 0x00010000>;
+ };
+ partition@7 {
+ label = "QSPI.u-boot-env.backup1";
+ reg = <0x001d0000 0x0010000>;
+ };
+ partition@8 {
+ label = "QSPI.kernel";
+ reg = <0x001e0000 0x0800000>;
+ };
+ partition@9 {
+ label = "QSPI.file-system";
+ reg = <0x009e0000 0x01620000>;
+ };
+ };
+};
+
+&dss {
+ status = "ok";
+
+ vdda_video-supply = <&ldo5_reg>;
+};
+
+&hdmi {
+ status = "ok";
+
+ port {
+ hdmi_out: endpoint {
+ remote-endpoint = <&tpd12s015_in>;
+ };
+ };
+};
--- /dev/null
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include "dra72-evm-common.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+
+/ {
+ model = "TI DRA722 Rev C EVM";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
+ };
+};
+
+&tps65917_regulators {
+ ldo2_reg: ldo2 {
+ /* LDO2_OUT --> VDDA_1V8_PHY2 */
+ regulator-name = "ldo2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&hdmi {
+ vdda_video-supply = <&ldo2_reg>;
+};
+
+&mac {
+ mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
+ <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
+ <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
+ dual_emac;
+};
+
+&cpsw_emac0 {
+ phy-handle = <&dp83867_0>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy-handle = <&dp83867_1>;
+ phy-mode = "rgmii-id";
+ dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+ dp83867_0: ethernet-phy@2 {
+ reg = <2>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,min-output-imepdance;
+ };
+
+ dp83867_1: ethernet-phy@3 {
+ reg = <3>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
+ ti,min-output-imepdance;
+ };
+};
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-/dts-v1/;
-
-#include "dra72x.dtsi"
-#include <dt-bindings/gpio/gpio.h>
+#include <dra72-evm-common.dtsi>
/ {
model = "TI DRA722";
compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
- chosen {
- stdout-path = &uart1;
- tick-timer = &timer2;
- };
-
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1024 MB */
};
-
- aliases {
- display0 = &hdmi0;
- };
-
- evm_3v3: fixedregulator-evm_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "evm_3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- evm_3v3_sd: fixedregulator-sd {
- compatible = "regulator-fixed";
- regulator-name = "evm_3v3_sd";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- enable-active-high;
- gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
- };
-
- extcon_usb1: extcon_usb1 {
- compatible = "linux,extcon-usb-gpio";
- id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
- };
-
- extcon_usb2: extcon_usb2 {
- compatible = "linux,extcon-usb-gpio";
- id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
- };
-
- hdmi0: connector {
- compatible = "hdmi-connector";
- label = "hdmi";
-
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&tpd12s015_out>;
- };
- };
- };
-
- tpd12s015: encoder {
- compatible = "ti,tpd12s015";
-
- pinctrl-names = "default";
- pinctrl-0 = <&tpd12s015_pins>;
-
- gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
- <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
- <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- tpd12s015_in: endpoint {
- remote-endpoint = <&hdmi_out>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- tpd12s015_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
- };
- };
- };
-};
-
-&dra7_pmx_core {
- i2c1_pins: pinmux_i2c1_pins {
- pinctrl-single,pins = <
- 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
- 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
- >;
- };
-
- i2c5_pins: pinmux_i2c5_pins {
- pinctrl-single,pins = <
- 0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
- 0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
- >;
- };
-
- nand_default: nand_default {
- pinctrl-single,pins = <
- 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
- 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
- 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
- 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
- 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
- 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
- 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
- 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
- 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
- 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
- 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
- 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
- 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
- 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
- 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
- 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
- 0xb4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */
- 0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
- 0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
- 0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
- 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */
- 0xd8 (PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */
- >;
- };
-
- usb1_pins: pinmux_usb1_pins {
- pinctrl-single,pins = <
- 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
- >;
- };
-
- usb2_pins: pinmux_usb2_pins {
- pinctrl-single,pins = <
- 0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
- >;
- };
-
- tps65917_pins_default: tps65917_pins_default {
- pinctrl-single,pins = <
- 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
- >;
- };
-
- mmc1_pins_default: mmc1_pins_default {
- pinctrl-single,pins = <
- 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
- 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
- 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
- 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
- 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
- 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
- 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
- >;
- };
-
- mmc2_pins_default: mmc2_pins_default {
- pinctrl-single,pins = <
- 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
- 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
- 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
- 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
- 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
- 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
- 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
- 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
- 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
- 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
- >;
- };
-
- dcan1_pins_default: dcan1_pins_default {
- pinctrl-single,pins = <
- 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
- 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
- >;
- };
-
- dcan1_pins_sleep: dcan1_pins_sleep {
- pinctrl-single,pins = <
- 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
- 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
- >;
- };
-
- qspi1_pins: pinmux_qspi1_pins {
- pinctrl-single,pins = <
- 0x74 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */
- 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
- 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
- 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
- 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
- 0x88 (PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
- 0xb8 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
- >;
- };
-
- hdmi_pins: pinmux_hdmi_pins {
- pinctrl-single,pins = <
- 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
- 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
- >;
- };
-
- tpd12s015_pins: pinmux_tpd12s015_pins {
- pinctrl-single,pins = <
- 0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
- >;
- };
-};
-
-&i2c1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
- clock-frequency = <400000>;
-
- tps65917: tps65917@58 {
- compatible = "ti,tps65917";
- reg = <0x58>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&tps65917_pins_default>;
-
- interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
- interrupt-controller;
- #interrupt-cells = <2>;
-
- ti,system-power-controller;
-
- tps65917_pmic {
- compatible = "ti,tps65917-pmic";
-
- regulators {
- smps1_reg: smps1 {
- /* VDD_MPU */
- regulator-name = "smps1";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps2_reg: smps2 {
- /* VDD_CORE */
- regulator-name = "smps2";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1060000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps3_reg: smps3 {
- /* VDD_GPU IVA DSPEVE */
- regulator-name = "smps3";
- regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <1250000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- smps4_reg: smps4 {
- /* VDDS1V8 */
- regulator-name = "smps4";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- smps5_reg: smps5 {
- /* VDD_DDR */
- regulator-name = "smps5";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo1_reg: ldo1 {
- /* LDO1_OUT --> SDIO */
- regulator-name = "ldo1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- };
-
- ldo2_reg: ldo2 {
- /* LDO2_OUT --> TP1017 (UNUSED) */
- regulator-name = "ldo2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- };
-
- ldo3_reg: ldo3 {
- /* VDDA_1V8_PHY */
- regulator-name = "ldo3";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- ldo5_reg: ldo5 {
- /* VDDA_1V8_PLL */
- regulator-name = "ldo5";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- ldo4_reg: ldo4 {
- /* VDDA_3V_USB: VDDA_USBHS33 */
- regulator-name = "ldo4";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- };
- };
- };
-
- tps65917_power_button {
- compatible = "ti,palmas-pwrbutton";
- interrupt-parent = <&tps65917>;
- interrupts = <1 IRQ_TYPE_NONE>;
- wakeup-source;
- ti,palmas-long-press-seconds = <6>;
- };
- };
-
- pcf_gpio_21: gpio@21 {
- compatible = "ti,pcf8575";
- reg = <0x21>;
- lines-initial-states = <0x1408>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-parent = <&gpio6>;
- interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- u-boot,i2c-offset-len = <0>;
- };
};
-&i2c5 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c5_pins>;
- clock-frequency = <400000>;
-
- pcf_hdmi: pcf8575@26 {
- compatible = "nxp,pcf8575";
- reg = <0x26>;
- gpio-controller;
- #gpio-cells = <2>;
- /*
- * initial state is used here to keep the mdio interface
- * selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and
- * VIN2_S0 driven high otherwise Ethernet stops working
- * VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
- */
- lines-initial-states = <0x0f2b>;
- u-boot,i2c-offset-len = <0>;
- };
-};
-
-&uart1 {
- status = "okay";
-};
-
-&elm {
- status = "okay";
-};
-
-&gpmc {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&nand_default>;
- ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
- nand@0,0 {
- /* To use NAND, DIP switch SW5 must be set like so:
- * SW5.1 (NAND_SELn) = ON (LOW)
- * SW5.9 (GPMC_WPN) = OFF (HIGH)
- */
- reg = <0 0 4>; /* device IO registers */
- ti,nand-ecc-opt = "bch8";
- ti,elm-id = <&elm>;
- nand-bus-width = <16>;
- gpmc,device-width = <2>;
- gpmc,sync-clk-ps = <0>;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <80>;
- gpmc,cs-wr-off-ns = <80>;
- gpmc,adv-on-ns = <0>;
- gpmc,adv-rd-off-ns = <60>;
- gpmc,adv-wr-off-ns = <60>;
- gpmc,we-on-ns = <10>;
- gpmc,we-off-ns = <50>;
- gpmc,oe-on-ns = <4>;
- gpmc,oe-off-ns = <40>;
- gpmc,access-ns = <40>;
- gpmc,wr-access-ns = <80>;
- gpmc,rd-cycle-ns = <80>;
- gpmc,wr-cycle-ns = <80>;
- gpmc,bus-turnaround-ns = <0>;
- gpmc,cycle2cycle-delay-ns = <0>;
- gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
- gpmc,wr-data-mux-bus-ns = <0>;
- /* MTD partition table */
- /* All SPL-* partitions are sized to minimal length
- * which can be independently programmable. For
- * NAND flash this is equal to size of erase-block */
- #address-cells = <1>;
- #size-cells = <1>;
- partition@0 {
- label = "NAND.SPL";
- reg = <0x00000000 0x000020000>;
- };
- partition@1 {
- label = "NAND.SPL.backup1";
- reg = <0x00020000 0x00020000>;
- };
- partition@2 {
- label = "NAND.SPL.backup2";
- reg = <0x00040000 0x00020000>;
- };
- partition@3 {
- label = "NAND.SPL.backup3";
- reg = <0x00060000 0x00020000>;
- };
- partition@4 {
- label = "NAND.u-boot-spl-os";
- reg = <0x00080000 0x00040000>;
- };
- partition@5 {
- label = "NAND.u-boot";
- reg = <0x000c0000 0x00100000>;
- };
- partition@6 {
- label = "NAND.u-boot-env";
- reg = <0x001c0000 0x00020000>;
- };
- partition@7 {
- label = "NAND.u-boot-env.backup1";
- reg = <0x001e0000 0x00020000>;
- };
- partition@8 {
- label = "NAND.kernel";
- reg = <0x00200000 0x00800000>;
- };
- partition@9 {
- label = "NAND.file-system";
- reg = <0x00a00000 0x0f600000>;
- };
- };
-};
-
-&usb2_phy1 {
- phy-supply = <&ldo4_reg>;
-};
-
-&usb2_phy2 {
- phy-supply = <&ldo4_reg>;
-};
-
-&omap_dwc3_1 {
- extcon = <&extcon_usb1>;
-};
-
-&omap_dwc3_2 {
- extcon = <&extcon_usb2>;
-};
-
-&usb1 {
- dr_mode = "peripheral";
- pinctrl-names = "default";
- pinctrl-0 = <&usb1_pins>;
-};
-
-&usb2 {
- dr_mode = "host";
- pinctrl-names = "default";
- pinctrl-0 = <&usb2_pins>;
-};
-
-&mmc1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_default>;
-
- vmmc_aux-supply = <&ldo1_reg>;
- vmmc-supply = <&evm_3v3_sd>;
- bus-width = <4>;
- /*
- * SDCD signal is not being used here - using the fact that GPIO mode
- * is a viable alternative
- */
- cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
-};
-
-&mmc2 {
- /* SW5-3 in ON position */
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins_default>;
-
- vmmc-supply = <&evm_3v3>;
- bus-width = <8>;
- ti,non-removable;
-};
-
-&dra7_pmx_core {
- cpsw_default: cpsw_default {
- pinctrl-single,pins = <
- /* Slave 2 */
- 0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
- 0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
- 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
- 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
- 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
- 0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
- 0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
- 0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
- 0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
- 0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
- 0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
- 0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
- >;
-
- };
-
- cpsw_sleep: cpsw_sleep {
- pinctrl-single,pins = <
- /* Slave 2 */
- 0x198 (MUX_MODE15)
- 0x19c (MUX_MODE15)
- 0x1a0 (MUX_MODE15)
- 0x1a4 (MUX_MODE15)
- 0x1a8 (MUX_MODE15)
- 0x1ac (MUX_MODE15)
- 0x1b0 (MUX_MODE15)
- 0x1b4 (MUX_MODE15)
- 0x1b8 (MUX_MODE15)
- 0x1bc (MUX_MODE15)
- 0x1c0 (MUX_MODE15)
- 0x1c4 (MUX_MODE15)
- >;
- };
-
- davinci_mdio_default: davinci_mdio_default {
- pinctrl-single,pins = <
- /* MDIO */
- 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */
- 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
- >;
- };
-
- davinci_mdio_sleep: davinci_mdio_sleep {
- pinctrl-single,pins = <
- 0x23c (MUX_MODE15)
- 0x240 (MUX_MODE15)
- >;
- };
-};
-
-&mac {
- status = "okay";
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&cpsw_default>;
- pinctrl-1 = <&cpsw_sleep>;
- mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
-};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <3>;
phy-mode = "rgmii";
};
-&davinci_mdio {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&davinci_mdio_default>;
- pinctrl-1 = <&davinci_mdio_sleep>;
-};
-
-&dcan1 {
- status = "ok";
- pinctrl-names = "default", "sleep", "active";
- pinctrl-0 = <&dcan1_pins_sleep>;
- pinctrl-1 = <&dcan1_pins_sleep>;
- pinctrl-2 = <&dcan1_pins_default>;
-};
-
-&qspi {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&qspi1_pins>;
-
- spi-max-frequency = <76800000>;
- m25p80@0 {
- compatible = "s25fl256s1","spi-flash";
- spi-max-frequency = <64000000>;
- reg = <0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <4>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- /* MTD partition table.
- * The ROM checks the first four physical blocks
- * for a valid file to boot and the flash here is
- * 64KiB block size.
- */
- partition@0 {
- label = "QSPI.SPL";
- reg = <0x00000000 0x000010000>;
- };
- partition@1 {
- label = "QSPI.SPL.backup1";
- reg = <0x00010000 0x00010000>;
- };
- partition@2 {
- label = "QSPI.SPL.backup2";
- reg = <0x00020000 0x00010000>;
- };
- partition@3 {
- label = "QSPI.SPL.backup3";
- reg = <0x00030000 0x00010000>;
- };
- partition@4 {
- label = "QSPI.u-boot";
- reg = <0x00040000 0x00100000>;
- };
- partition@5 {
- label = "QSPI.u-boot-spl-os";
- reg = <0x00140000 0x00080000>;
- };
- partition@6 {
- label = "QSPI.u-boot-env";
- reg = <0x001c0000 0x00010000>;
- };
- partition@7 {
- label = "QSPI.u-boot-env.backup1";
- reg = <0x001d0000 0x0010000>;
- };
- partition@8 {
- label = "QSPI.kernel";
- reg = <0x001e0000 0x0800000>;
- };
- partition@9 {
- label = "QSPI.file-system";
- reg = <0x009e0000 0x01620000>;
- };
- };
-};
-
&dss {
status = "ok";
};
&hdmi {
- status = "ok";
vdda-supply = <&ldo3_reg>;
+};
- pinctrl-names = "default";
- pinctrl-0 = <&hdmi_pins>;
-
- port {
- hdmi_out: endpoint {
- remote-endpoint = <&tpd12s015_in>;
- };
- };
+&mac {
+ mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
};
#define HS_DEVICE 0x2
#define GP_DEVICE 0x3
-/* cpu-id for AM33XX and TI81XX family */
+/* cpu-id for AM43XX AM33XX and TI81XX family */
+#define AM437X 0xB98C
#define AM335X 0xB944
#define TI81XX 0xB81E
#define DEVICE_ID (CTRL_BASE + 0x0600)
};
#define ECAP_CLK_EN BIT(0)
#define ECAP_CLK_STOP_REQ BIT(1)
+#define EPWM_CLK_EN BIT(8)
+#define EPWM_CLK_STOP_REQ BIT(9)
struct pwmss_ecap_regs {
unsigned int tsctr;
unsigned short ecctl2;
};
+struct pwmss_epwm_regs {
+ unsigned short tbctl;
+ unsigned short tbsts;
+ unsigned short tbphshr;
+ unsigned short tbphs;
+ unsigned short tbcnt;
+ unsigned short tbprd;
+ unsigned short res1;
+ unsigned short cmpctl;
+ unsigned short cmpahr;
+ unsigned short cmpa;
+ unsigned short cmpb;
+ unsigned short aqctla;
+ unsigned short aqctlb;
+ unsigned short aqsfrc;
+ unsigned short aqcsfrc;
+ unsigned short dbctl;
+ unsigned short dbred;
+ unsigned short dbfed;
+ unsigned short tzsel;
+ unsigned short tzctl;
+ unsigned short tzflg;
+ unsigned short tzclr;
+ unsigned short tzfrc;
+ unsigned short etsel;
+ unsigned short etps;
+ unsigned short etflg;
+ unsigned short etclr;
+ unsigned short etfrc;
+ unsigned short pcctl;
+ unsigned int res2[66];
+ unsigned short hrcnfg;
+};
+
/* Capture Control register 2 */
#define ECTRL2_SYNCOSEL_MASK (0x03 << 6)
#define ECTRL2_MDSL_ECAP BIT(9)
/* PWMSS */
#define PWMSS0_BASE 0x48300000
#define AM33XX_ECAP0_BASE 0x48300100
+#define AM33XX_EPWM_BASE 0x48300200
#endif /* __AM33XX_HARDWARE_AM33XX_H */
#endif
typedef struct { volatile int counter; } atomic_t;
+#if BITS_PER_LONG == 32
+typedef struct { volatile long long counter; } atomic64_t;
+#else /* BIT_PER_LONG == 32 */
+typedef struct { volatile long counter; } atomic64_t;
+#endif
#define ATOMIC_INIT(i) { (i) }
#include <asm/proc-armv/system.h>
#define atomic_read(v) ((v)->counter)
-#define atomic_set(v,i) (((v)->counter) = (i))
+#define atomic_set(v, i) (((v)->counter) = (i))
+#define atomic64_read(v) atomic_read(v)
+#define atomic64_set(v, i) atomic_set(v, i)
static inline void atomic_add(int i, volatile atomic_t *v)
{
local_irq_restore(flags);
}
+#if BITS_PER_LONG == 32
+
+static inline void atomic64_add(long long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_sub(long long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+
+#else /* BIT_PER_LONG == 32 */
+
+static inline void atomic64_add(long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_sub(long i, volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+#endif
+
+static inline void atomic64_inc(volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter += 1;
+ local_irq_restore(flags);
+}
+
+static inline void atomic64_dec(volatile atomic64_t *v)
+{
+ unsigned long flags = 0;
+
+ local_irq_save(flags);
+ v->counter -= 1;
+ local_irq_restore(flags);
+}
+
/* Atomic operations are already serializing on ARM */
#define smp_mb__before_atomic_dec() barrier()
#define smp_mb__after_atomic_dec() barrier()
/*
* Virtual <-> DMA view memory address translations
* Again, these are *only* valid on the kernel direct mapped RAM
- * memory. Use of these is *depreciated*.
+ * memory. Use of these is *deprecated*.
*/
#define virt_to_bus(x) (__virt_to_bus((unsigned long)(x)))
#define bus_to_virt(x) ((void *)(__bus_to_virt((unsigned long)(x))))
#endif
/*
- * We should really eliminate virt_to_bus() here - it's depreciated.
+ * We should really eliminate virt_to_bus() here - it's deprecated.
*/
#define page_to_bus(page) (virt_to_bus(page_address(page)))
struct jmp_buf_data {
ulong target;
ulong regs[5];
+ int ret;
};
typedef struct jmp_buf_data jmp_buf[1];
static inline int setjmp(jmp_buf jmp)
{
- long r = 0;
+ jmp->ret = 0;
#ifdef CONFIG_ARM64
asm volatile(
"adr x1, jmp_target\n"
- "str x1, %1\n"
- "stp x26, x27, %2\n"
- "stp x28, x29, %3\n"
+ "str x1, %0\n"
+ "stp x26, x27, %1\n"
+ "stp x28, x29, %2\n"
"mov x1, sp\n"
- "str x1, %4\n"
- "b 2f\n"
+ "str x1, %3\n"
"jmp_target: "
- "mov %0, #1\n"
- "2:\n"
- : "+r" (r), "=m" (jmp->target),
- "=m" (jmp->regs[0]), "=m" (jmp->regs[2]),
- "=m" (jmp->regs[4])
+ : "=m" (jmp->target), "=m" (jmp->regs[0]),
+ "=m" (jmp->regs[2]), "=m" (jmp->regs[4])
:
: "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7",
"x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
#else
"adr r0, jmp_target\n"
#endif
- "mov r1, %1\n"
+ "mov r1, %0\n"
"mov r2, sp\n"
"stm r1!, {r0, r2, r4, r5, r6, r7}\n"
- "b 2f\n"
".align 2\n"
"jmp_target: \n"
- "mov %0, #1\n"
- "2:\n"
- : "+l" (r)
+ :
: "l" (&jmp->target)
: "r0", "r1", "r2", "r3", /* "r4", "r5", "r6", "r7", */
"r8", "r9", "r10", "r11", /* sp, */ "ip", "lr",
"cc", "memory");
#endif
- return r;
+ return jmp->ret;
}
-static inline __noreturn void longjmp(jmp_buf jmp)
+static inline __noreturn void longjmp(jmp_buf jmp, int ret)
{
+ jmp->ret = ret;
+
#ifdef CONFIG_ARM64
asm volatile(
"ldr x0, %0\n"
/* describes where the compressed ramdisk image lives (virtual address) */
/*
* this one accidentally used virtual addresses - as such,
- * its depreciated.
+ * it's deprecated.
*/
#define ATAG_INITRD 0x54410005
};
#endif
-/**
- * Board specific load method for boards that have a special way of loading
- * U-Boot, which does not fit with the existing SPL code.
- *
- * @return 0 on success, negative errno value on failure.
- */
-
-int spl_board_load_image(void);
-
/* Linker symbols. */
extern char __bss_start[], __bss_end[];
*/
void save_boot_params_ret(void);
+#ifdef CONFIG_ARMV7_LPAE
+void switch_to_hypervisor_ret(void);
+#endif
+
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
#ifdef __ARM_ARCH_7A__
/* MDIO module input frequency */
#ifdef CONFIG_SOC_K2G
-#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk))
+#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(sys_clk0_3_clk))
#else
-#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+#define EMAC_MDIO_BUS_FREQ (ks_clk_get_rate(pass_pll_clk))
#endif
/* MDIO clock output frequency */
#define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */
* arg: Pointer to paramter image in RAM
*/
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
{
unsigned long machid = 0xffffffff;
#ifdef CONFIG_MACH_TYPE
typedef void (*image_entry_arg_t)(int, int, void *)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
- (image_entry_arg_t)(uintptr_t) spl_image.entry_point;
+ (image_entry_arg_t)(uintptr_t) spl_image->entry_point;
cleanup_before_linux();
image_entry(0, machid, arg);
}
return ret;
}
-unsigned long clk_get_rate(unsigned int clk)
+unsigned long ks_clk_get_rate(unsigned int clk)
{
unsigned long freq = 0;
freq = pll_freq_get(CORE_PLL) / pll0div_read(4);
break;
case sys_clk0_2_clk:
- freq = clk_get_rate(sys_clk0_clk) / 2;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 2;
break;
case sys_clk0_3_clk:
- freq = clk_get_rate(sys_clk0_clk) / 3;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 3;
break;
case sys_clk0_4_clk:
- freq = clk_get_rate(sys_clk0_clk) / 4;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 4;
break;
case sys_clk0_6_clk:
- freq = clk_get_rate(sys_clk0_clk) / 6;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 6;
break;
case sys_clk0_8_clk:
- freq = clk_get_rate(sys_clk0_clk) / 8;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 8;
break;
case sys_clk0_12_clk:
- freq = clk_get_rate(sys_clk0_clk) / 12;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 12;
break;
case sys_clk0_24_clk:
- freq = clk_get_rate(sys_clk0_clk) / 24;
+ freq = ks_clk_get_rate(sys_clk0_clk) / 24;
break;
case sys_clk1_3_clk:
- freq = clk_get_rate(sys_clk1_clk) / 3;
+ freq = ks_clk_get_rate(sys_clk1_clk) / 3;
break;
case sys_clk1_4_clk:
- freq = clk_get_rate(sys_clk1_clk) / 4;
+ freq = ks_clk_get_rate(sys_clk1_clk) / 4;
break;
case sys_clk1_6_clk:
- freq = clk_get_rate(sys_clk1_clk) / 6;
+ freq = ks_clk_get_rate(sys_clk1_clk) / 6;
break;
case sys_clk1_12_clk:
- freq = clk_get_rate(sys_clk1_clk) / 12;
+ freq = ks_clk_get_rate(sys_clk1_clk) / 12;
break;
default:
break;
clk = simple_strtoul(argv[1], NULL, 10);
- freq = clk_get_rate(clk);
+ freq = ks_clk_get_rate(clk);
if (freq)
printf("clock index [%d] - frequency %lu\n", clk, freq);
else
void init_plls(void);
void init_pll(const struct pll_init_data *data);
struct pll_init_data *get_pll_init_data(int pll);
-unsigned long clk_get_rate(unsigned int clk);
-unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
-int clk_set_rate(unsigned int clk, unsigned long hz);
+unsigned long ks_clk_get_rate(unsigned int clk);
int get_max_dev_speed(int *spds);
int get_max_arm_speed(int *spds);
void pll_pa_clk_sel(void);
return 0;
}
-int spl_board_load_image(void)
+#ifdef CONFIG_SPL_BUILD
+static int spl_board_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
debug("Returning to FEL sp=%x, lr=%x\n", fel_stash.sp, fel_stash.lr);
return_to_fel(fel_stash.sp, fel_stash.lr);
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_BOARD, spl_board_load_image);
+#endif
void s_init(void)
{
return 0;
}
-int spl_board_load_image(void)
+static int spl_board_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int (*send_cmd)(u32 cmd, u32 arg);
int (*card_blockaddr)(u32 rca);
return ret;
}
- ret = spl_parse_image_header((void *)CONFIG_SYS_TEXT_BASE);
+ ret = spl_parse_image_header(spl_image, (void *)CONFIG_SYS_TEXT_BASE);
if (ret)
return ret;
- ret = (*load_image)(dev_addr, spl_image.load_addr,
- spl_image.size / 512);
+ ret = (*load_image)(dev_addr, spl_image->load_addr,
+ spl_image->size / 512);
if (ret) {
printf("failed to load image\n");
return ret;
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_BOARD, spl_board_load_image);
}
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
{
debug("Entering kernel arg pointer: 0x%p\n", arg);
typedef void (*image_entry_arg_t)(char *, ulong, ulong)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
- (image_entry_arg_t)spl_image.entry_point;
+ (image_entry_arg_t)spl_image->entry_point;
image_entry(NULL, 0, (ulong)arg);
}
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
fsl_ddr_get_spd(spd[i], i, CONFIG_DIMM_SLOTS_PER_CTLR);
- puts("SPD data of all dimms (zero vaule is omitted)...\n");
+ puts("SPD data of all dimms (zero value is omitted)...\n");
puts("Byte (hex) ");
k = 1;
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
}
}
printf("DDR registers dump for all controllers "
- "(zero vaule is omitted)...\n");
+ "(zero value is omitted)...\n");
puts("Offset (hex) ");
for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++)
printf(" Base + 0x%04x", (u32)ddr[i] & 0xFFFF);
* arg: Pointer to paramter image in RAM
*/
#ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(void *arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void *arg)
{
debug("Entering kernel arg pointer: 0x%p\n", arg);
typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5, ulong r6,
ulong r7, ulong r8, ulong r9)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
- (image_entry_arg_t)spl_image.entry_point;
+ (image_entry_arg_t)spl_image->entry_point;
image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
}
printf("%s\n", fname);
}
-int spl_board_load_image(void)
+static int spl_board_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
char fname[256];
int ret;
/* Hopefully this will not return */
return os_spl_to_uboot(fname);
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_BOARD, spl_board_load_image);
void spl_board_init(void)
{
#define CONFIG_SPL_BOARD_LOAD_IMAGE
-/**
- * Board-specific load method for boards that have a special way of loading
- * U-Boot, which does not fit with the existing SPL code.
- *
- * @return 0 on success, negative errno value on failure.
- */
-int spl_board_load_image(void);
-
enum {
BOOT_DEVICE_BOARD,
};
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
-#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <asm/armv7.h>
#include <asm/io.h>
+#include <asm/u-boot.h>
+#include <common.h>
+#include <libfdt.h>
#define SCC_BASE 0x7fff0000
return (readl((u32 *)(SCC_BASE + 0x700)) & ((1 << 12) | (1 << 13))) == 0;
#endif
}
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+ int offset, tmp, len;
+ const struct fdt_property *prop;
+ const char *cci_compatible = "arm,cci-400-ctrl-if";
+
+#ifdef CONFIG_ARMV7_NONSEC
+ if (!armv7_boot_nonsec())
+ return 0;
+#else
+ return 0;
+#endif
+ /* Booting in nonsec mode, disable CCI access */
+ offset = fdt_path_offset(fdt, "/cpus");
+ if (offset < 0) {
+ printf("couldn't find /cpus\n");
+ return offset;
+ }
+
+ /* delete cci-control-port in each cpu node */
+ for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0;
+ tmp = fdt_next_subnode(fdt, tmp))
+ fdt_delprop(fdt, tmp, "cci-control-port");
+
+ /* disable all ace cci slave ports */
+ offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
+ cci_compatible, 20);
+ while (offset > 0) {
+ prop = fdt_get_property(fdt, offset, "interface-type",
+ &len);
+ if (!prop)
+ continue;
+ if (len < 4)
+ continue;
+ if (strcmp(prop->data, "ace"))
+ continue;
+
+ fdt_setprop_string(fdt, offset, "status", "disabled");
+
+ offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible",
+ cci_compatible, 20);
+ }
+
+ return 0;
+}
+#endif /* CONFIG_OF_BOARD_SETUP */
--- /dev/null
+/*
+ * Copyright 2016 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __FREESCALE_BOARD_SPL_H
+#define __FREESCALE_BOARD_SPL_H
+
+void fsl_spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
+void fsl_spi_boot(void) __noreturn;
+
+#endif
#include <i2c.h>
#include <fsl_esdhc.h>
#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include "../common/ngpixis.h"
#include <fsl_esdhc.h>
#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <i2c.h>
#include <fsl_esdhc.h>
#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <spi_flash.h>
#include "../common/qixis.h"
#include "t102xqds_qixis.h"
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
(uchar *)CONFIG_ENV_ADDR);
#endif
#ifdef CONFIG_SPL_SPI_BOOT
- spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
- (uchar *)CONFIG_ENV_ADDR);
+ fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <fsl_esdhc.h>
#include <spi_flash.h>
#include "../common/sleep.h"
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
(uchar *)CONFIG_ENV_ADDR);
#endif
#ifdef CONFIG_SPL_SPI_BOOT
- spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
- (uchar *)CONFIG_ENV_ADDR);
+ fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <fsl_esdhc.h>
#include <spi_flash.h>
#include "../common/sleep.h"
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
(uchar *)CONFIG_ENV_ADDR);
#endif
#ifdef CONFIG_SPL_SPI_BOOT
- spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
- (uchar *)CONFIG_ENV_ADDR);
+ fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
gd->env_valid = 1;
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <spi_flash.h>
#include "../common/qixis.h"
#include "t208xqds_qixis.h"
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
(uchar *)CONFIG_ENV_ADDR);
#endif
#ifdef CONFIG_SPL_SPI_BOOT
- spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
- (uchar *)CONFIG_ENV_ADDR);
+ fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#include <mmc.h>
#include <fsl_esdhc.h>
#include <spi_flash.h>
+#include "../common/spl.h"
DECLARE_GLOBAL_DATA_PTR;
(uchar *)CONFIG_ENV_ADDR);
#endif
#ifdef CONFIG_SPL_SPI_BOOT
- spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
- (uchar *)CONFIG_ENV_ADDR);
+ fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_ENV_ADDR);
#endif
gd->env_addr = (ulong)(CONFIG_ENV_ADDR);
#ifdef CONFIG_SPL_MMC_BOOT
mmc_boot();
#elif defined(CONFIG_SPL_SPI_BOOT)
- spi_boot();
+ fsl_spi_boot();
#elif defined(CONFIG_SPL_NAND_BOOT)
nand_boot();
#endif
#ifdef CONFIG_SPL_OS_BOOT
/*
- * Do board specific preperation before SPL
+ * Do board specific preparation before SPL
* Linux boot
*/
void spl_board_prepare_for_linux(void)
#define board_is_dra74x_evm() board_ti_is("5777xCPU")
#define board_is_dra72x_evm() board_ti_is("DRA72x-T")
-#define board_is_dra74x_revh_or_later() board_is_dra74x_evm() && \
- (strncmp("H", board_ti_get_rev(), 1) <= 0)
-#define board_is_dra72x_revc_or_later() board_is_dra72x_evm() && \
- (strncmp("C", board_ti_get_rev(), 1) <= 0)
+#define board_is_dra74x_revh_or_later() (board_is_dra74x_evm() && \
+ (strncmp("H", board_ti_get_rev(), 1) <= 0))
+#define board_is_dra72x_revc_or_later() (board_is_dra72x_evm() && \
+ (strncmp("C", board_ti_get_rev(), 1) <= 0))
#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
board_ti_get_emif2_size()
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
- if (is_dra72x() && !strcmp(name, "dra72-evm"))
- return 0;
- else if (!is_dra72x() && !strcmp(name, "dra7-evm"))
+ if (is_dra72x()) {
+ if (board_is_dra72x_revc_or_later()) {
+ if (!strcmp(name, "dra72-evm-revc"))
+ return 0;
+ } else if (!strcmp(name, "dra72-evm")) {
+ return 0;
+ }
+ } else if (!is_dra72x() && !strcmp(name, "dra7-evm")) {
return 0;
- else
- return -1;
+ }
+
+ return -1;
}
#endif
#ifdef CONFIG_SPL_OS_BOOT
/*
- * Do board specific preperation before SPL
+ * Do board specific preparation before SPL
* Linux boot
*/
void spl_board_prepare_for_linux(void)
*
* The "environment" is stored on external storage as a list of '\0'
* terminated "name=value" strings. The end of the list is marked by
- * a double '\0'. The environment is preceeded by a 32 bit CRC over
+ * a double '\0'. The environment is preceded by a 32 bit CRC over
* the data part and, in case of redundant environment, a byte of
* flags.
*
* With "-c" and size is NOT given, then the export command will
* format the data as currently used for the persistent storage,
* i. e. it will use CONFIG_ENV_SECT_SIZE as output block size and
- * prepend a valid CRC32 checksum and, in case of resundant
+ * prepend a valid CRC32 checksum and, in case of redundant
* environment, a "current" redundancy flag. If size is given, this
* value will be used instead of CONFIG_ENV_SECT_SIZE; again, CRC32
* checksum and redundancy flag will be inserted.
* terminating '\0' byte) will be written; here the optional size
* argument will be used to make sure not to overflow the user
* provided buffer; the command will abort if the size is not
- * sufficient. Any remainign space will be '\0' padded.
+ * sufficient. Any remaining space will be '\0' padded.
*
* On successful return, the variable "filesize" will be set.
* Note that filesize includes the trailing/terminating '\0' byte(s).
*
- * Usage szenario: create a text snapshot/backup of the current settings:
+ * Usage scenario: create a text snapshot/backup of the current settings:
*
* => env export -t 100000
* => era ${backup_addr} +${filesize}
/*
* env import [-d] [-t [-r] | -b | -c] addr [size]
* -d: delete existing environment before importing;
- * otherwise overwrite / append to existion definitions
+ * otherwise overwrite / append to existing definitions
* -t: assume text format; either "size" must be given or the
* text data must be '\0' terminated
* -r: handle CRLF like LF, that means exported variables with
size_t _retlen = 0;
int ret;
+ if ((to & (mtd->writesize - 1)) != 0) {
+ printf("Attempt to write non block-aligned data\n");
+ *retlen = 0;
+ return 1;
+ }
+
if (to == next_ofs) {
next_ofs = to + len;
to += skip_ofs;
{
#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
/*
- * For some archtectures, global data is initialized and used before
+ * For some architectures, global data is initialized and used before
* calling this function. The data should be preserved. For others,
* CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
* here to host global data until relocation.
/*
* Clear global data before it is accessed at debug print
* in initcall_run_list. Otherwise the debug print probably
- * get the wrong vaule of gd->have_console.
+ * get the wrong value of gd->have_console.
*/
zero_global_data();
#endif
return -1;
}
-/* Called before relocation - use serial functions */
-int console_init_f(void)
+static void console_update_silent(void)
{
- gd->have_console = 1;
-
#ifdef CONFIG_SILENT_CONSOLE
if (getenv("silent") != NULL)
gd->flags |= GD_FLG_SILENT;
+ else
+ gd->flags &= ~GD_FLG_SILENT;
#endif
+}
+
+/* Called before relocation - use serial functions */
+int console_init_f(void)
+{
+ gd->have_console = 1;
+
+ console_update_silent();
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT1_SERIAL);
struct list_head *pos;
struct stdio_dev *dev;
+ console_update_silent();
+
#ifdef CONFIG_SPLASH_SCREEN
/*
* suppress all output if splash screen is enabled and we have
return 0;
}
-/* Emport the environment and generate CRC for it. */
+/* Export the environment and generate CRC for it. */
int env_export(env_t *env_out)
{
char *res;
location is used. Normally we put the device tree at the end of BSS
but with this option enabled, it goes at _image_binary_end.
+config SPL_DISPLAY_PRINT
+ depends on SPL
+ bool "Display a board-specific message in SPL"
+ help
+ If this option is enabled, U-Boot will call the function
+ spl_display_print() immediately after displaying the SPL console
+ banner ("U-Boot SPL ..."). This function should be provided by
+ the board.
+
config TPL
bool
depends on SPL && SUPPORT_TPL
starting U-Boot first. Enabling this option will make getenv()
and setenv() available in SPL.
+config SPL_SAVEENV
+ bool "Support save environment"
+ depends on SPL && SPL_ENV_SUPPORT
+ help
+ Enable save environment support in SPL after setenv. By default
+ the saveenv option is not provided in SPL, but some boards need
+ this support in 'Falcon' boot, where SPL need to boot from
+ different images based on environment variable set by OS. For
+ example OS may set "reboot_image" environment variable to
+ "recovery" inorder to boot recovery image by SPL. The SPL read
+ "reboot_image" and act accordingly and change the reboot_image
+ to default mode using setenv and save the environemnt.
+
config SPL_ETH_SUPPORT
bool "Support Ethernet"
depends on SPL_ENV_SUPPORT
obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
+obj-$(CONFIG_SPL_SPI_LOAD) += spl_spi.o
endif
#endif
u32 *boot_params_ptr = NULL;
-struct spl_image_info spl_image;
/* Define board data structure */
static bd_t bdata __attribute__ ((section(".data")));
/* Nothing to do! */
}
-void spl_set_header_raw_uboot(void)
+void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
{
- spl_image.size = CONFIG_SYS_MONITOR_LEN;
- spl_image.entry_point = CONFIG_SYS_UBOOT_START;
- spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
- spl_image.os = IH_OS_U_BOOT;
- spl_image.name = "U-Boot";
+ spl_image->size = CONFIG_SYS_MONITOR_LEN;
+ spl_image->entry_point = CONFIG_SYS_UBOOT_START;
+ spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image->os = IH_OS_U_BOOT;
+ spl_image->name = "U-Boot";
}
-int spl_parse_image_header(const struct image_header *header)
+int spl_parse_image_header(struct spl_image_info *spl_image,
+ const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
if (image_get_magic(header) == IH_MAGIC) {
- if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) {
+ if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) {
/*
* On some system (e.g. powerpc), the load-address and
* entry-point is located at address 0. We can't load
* to 0-0x40. So skip header in this case.
*/
- spl_image.load_addr = image_get_load(header);
- spl_image.entry_point = image_get_ep(header);
- spl_image.size = image_get_data_size(header);
+ spl_image->load_addr = image_get_load(header);
+ spl_image->entry_point = image_get_ep(header);
+ spl_image->size = image_get_data_size(header);
} else {
- spl_image.entry_point = image_get_load(header);
+ spl_image->entry_point = image_get_load(header);
/* Load including the header */
- spl_image.load_addr = spl_image.entry_point -
+ spl_image->load_addr = spl_image->entry_point -
header_size;
- spl_image.size = image_get_data_size(header) +
+ spl_image->size = image_get_data_size(header) +
header_size;
}
- spl_image.os = image_get_os(header);
- spl_image.name = image_get_name(header);
+ spl_image->os = image_get_os(header);
+ spl_image->name = image_get_name(header);
debug("spl: payload image: %.*s load addr: 0x%x size: %d\n",
- (int)sizeof(spl_image.name), spl_image.name,
- spl_image.load_addr, spl_image.size);
+ (int)sizeof(spl_image->name), spl_image->name,
+ spl_image->load_addr, spl_image->size);
} else {
#ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE
/*
ulong start, end;
if (!bootz_setup((ulong)header, &start, &end)) {
- spl_image.name = "Linux";
- spl_image.os = IH_OS_LINUX;
- spl_image.load_addr = CONFIG_SYS_LOAD_ADDR;
- spl_image.entry_point = CONFIG_SYS_LOAD_ADDR;
- spl_image.size = end - start;
+ spl_image->name = "Linux";
+ spl_image->os = IH_OS_LINUX;
+ spl_image->load_addr = CONFIG_SYS_LOAD_ADDR;
+ spl_image->entry_point = CONFIG_SYS_LOAD_ADDR;
+ spl_image->size = end - start;
debug("spl: payload zImage, load addr: 0x%x size: %d\n",
- spl_image.load_addr, spl_image.size);
+ spl_image->load_addr, spl_image->size);
return 0;
}
#endif
/* Signature not found - assume u-boot.bin */
debug("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
- spl_set_header_raw_uboot();
+ spl_set_header_raw_uboot(spl_image);
#endif
}
return 0;
return count;
}
-static int spl_ram_load_image(void)
+static int spl_ram_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
struct image_header *header;
header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
+#if defined(CONFIG_SPL_DFU_SUPPORT)
+ if (bootdev->boot_device == BOOT_DEVICE_DFU)
+ spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
+#endif
+
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
struct spl_load_info load;
debug("Found FIT\n");
load.bl_len = 1;
load.read = spl_ram_load_read;
- spl_load_simple_fit(&load, 0, header);
+ spl_load_simple_fit(spl_image, &load, 0, header);
} else {
debug("Legacy image\n");
/*
header = (struct image_header *)
(CONFIG_SYS_TEXT_BASE - sizeof(struct image_header));
- spl_parse_image_header(header);
+ spl_parse_image_header(spl_image, header);
}
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_RAM, spl_ram_load_image);
+#if defined(CONFIG_SPL_DFU_SUPPORT)
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_DFU, spl_ram_load_image);
+#endif
#endif
int spl_init(void)
#define BOOT_DEVICE_NONE 0xdeadbeef
#endif
-static u32 spl_boot_list[] = {
- BOOT_DEVICE_NONE,
- BOOT_DEVICE_NONE,
- BOOT_DEVICE_NONE,
- BOOT_DEVICE_NONE,
- BOOT_DEVICE_NONE,
-};
-
__weak void board_boot_order(u32 *spl_boot_list)
{
spl_boot_list[0] = spl_boot_device();
static inline void announce_boot_device(u32 boot_device) { }
#endif
-static int spl_load_image(u32 boot_device)
+static struct spl_image_loader *spl_ll_find_loader(uint boot_device)
{
- switch (boot_device) {
-#ifdef CONFIG_SPL_RAM_DEVICE
- case BOOT_DEVICE_RAM:
- return spl_ram_load_image();
-#endif
-#ifdef CONFIG_SPL_MMC_SUPPORT
- case BOOT_DEVICE_MMC1:
- case BOOT_DEVICE_MMC2:
- case BOOT_DEVICE_MMC2_2:
- return spl_mmc_load_image(boot_device);
-#endif
-#ifdef CONFIG_SPL_UBI
- case BOOT_DEVICE_NAND:
- case BOOT_DEVICE_ONENAND:
- return spl_ubi_load_image(boot_device);
-#else
-#ifdef CONFIG_SPL_NAND_SUPPORT
- case BOOT_DEVICE_NAND:
- return spl_nand_load_image();
-#endif
-#ifdef CONFIG_SPL_ONENAND_SUPPORT
- case BOOT_DEVICE_ONENAND:
- return spl_onenand_load_image();
-#endif
-#endif
-#ifdef CONFIG_SPL_NOR_SUPPORT
- case BOOT_DEVICE_NOR:
- return spl_nor_load_image();
-#endif
-#ifdef CONFIG_SPL_YMODEM_SUPPORT
- case BOOT_DEVICE_UART:
- return spl_ymodem_load_image();
-#endif
-#if defined(CONFIG_SPL_SPI_SUPPORT) || defined(CONFIG_SPL_SPI_FLASH_SUPPORT)
- case BOOT_DEVICE_SPI:
- return spl_spi_load_image();
-#endif
-#ifdef CONFIG_SPL_ETH_SUPPORT
- case BOOT_DEVICE_CPGMAC:
-#ifdef CONFIG_SPL_ETH_DEVICE
- return spl_net_load_image(CONFIG_SPL_ETH_DEVICE);
-#else
- return spl_net_load_image(NULL);
-#endif
-#endif
-#ifdef CONFIG_SPL_USBETH_SUPPORT
- case BOOT_DEVICE_USBETH:
- return spl_net_load_image("usb_ether");
-#endif
-#ifdef CONFIG_SPL_USB_SUPPORT
- case BOOT_DEVICE_USB:
- return spl_usb_load_image();
-#endif
-#ifdef CONFIG_SPL_DFU_SUPPORT
- case BOOT_DEVICE_DFU:
- spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
- return spl_ram_load_image();
-#endif
-#ifdef CONFIG_SPL_SATA_SUPPORT
- case BOOT_DEVICE_SATA:
- return spl_sata_load_image();
-#endif
-#ifdef CONFIG_SPL_BOARD_LOAD_IMAGE
- case BOOT_DEVICE_BOARD:
- return spl_board_load_image();
-#endif
- default:
-#if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
- puts("SPL: Unsupported Boot Device!\n");
-#endif
- return -ENODEV;
+ struct spl_image_loader *drv =
+ ll_entry_start(struct spl_image_loader, spl_image_loader);
+ const int n_ents =
+ ll_entry_count(struct spl_image_loader, spl_image_loader);
+ struct spl_image_loader *entry;
+
+ for (entry = drv; entry != drv + n_ents; entry++) {
+ if (boot_device == entry->boot_device)
+ return entry;
}
- return -EINVAL;
+ /* Not found */
+ return NULL;
+}
+
+static int spl_load_image(struct spl_image_info *spl_image, u32 boot_device)
+{
+ struct spl_boot_device bootdev;
+ struct spl_image_loader *loader = spl_ll_find_loader(boot_device);
+
+ bootdev.boot_device = boot_device;
+ bootdev.boot_device_name = NULL;
+ if (loader)
+ return loader->load_image(spl_image, &bootdev);
+
+#if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
+ puts("SPL: Unsupported Boot Device!\n");
+#endif
+ return -ENODEV;
}
void board_init_r(gd_t *dummy1, ulong dummy2)
{
+ u32 spl_boot_list[] = {
+ BOOT_DEVICE_NONE,
+ BOOT_DEVICE_NONE,
+ BOOT_DEVICE_NONE,
+ BOOT_DEVICE_NONE,
+ BOOT_DEVICE_NONE,
+ };
+ struct spl_image_info spl_image;
int i;
debug(">>spl:board_init_r()\n");
spl_board_init();
#endif
+ memset(&spl_image, '\0', sizeof(spl_image));
board_boot_order(spl_boot_list);
for (i = 0; i < ARRAY_SIZE(spl_boot_list) &&
spl_boot_list[i] != BOOT_DEVICE_NONE; i++) {
announce_boot_device(spl_boot_list[i]);
- if (!spl_load_image(spl_boot_list[i]))
+ if (!spl_load_image(&spl_image, spl_boot_list[i]))
break;
}
case IH_OS_LINUX:
debug("Jumping to Linux\n");
spl_board_prepare_for_linux();
- jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR);
+ jump_to_image_linux(&spl_image,
+ (void *)CONFIG_SYS_SPL_ARGS_ADDR);
#endif
default:
debug("Unsupported OS image.. Jumping nevertheless..\n");
#include <image.h>
#ifdef CONFIG_SPL_EXT_SUPPORT
-int spl_load_image_ext(struct blk_desc *block_dev,
- int partition,
- const char *filename)
+int spl_load_image_ext(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition,
+ const char *filename)
{
s32 err;
struct image_header *header;
goto end;
}
- err = spl_parse_image_header(header);
+ err = spl_parse_image_header(spl_image, header);
if (err < 0) {
puts("spl: ext: failed to parse image header\n");
goto end;
}
- err = ext4fs_read((char *)spl_image.load_addr, filelen, &actlen);
+ err = ext4fs_read((char *)spl_image->load_addr, filelen, &actlen);
end:
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
}
#ifdef CONFIG_SPL_OS_BOOT
-int spl_load_image_ext_os(struct blk_desc *block_dev, int partition)
+int spl_load_image_ext_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition)
{
int err;
__maybe_unused loff_t filelen, actlen;
}
file = getenv("falcon_image_file");
if (file) {
- err = spl_load_image_ext(block_dev, partition, file);
+ err = spl_load_image_ext(spl_image, block_dev,
+ partition, file);
if (err != 0) {
puts("spl: falling back to default\n");
goto defaults;
return -1;
}
- return spl_load_image_ext(block_dev, partition,
+ return spl_load_image_ext(spl_image, block_dev, partition,
CONFIG_SPL_FS_LOAD_KERNEL_NAME);
}
#else
-int spl_load_image_ext_os(struct blk_desc *block_dev, int partition)
+int spl_load_image_ext_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition)
{
return -ENOSYS;
}
return actread;
}
-int spl_load_image_fat(struct blk_desc *block_dev,
- int partition,
- const char *filename)
+int spl_load_image_fat(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition,
+ const char *filename)
{
int err;
struct image_header *header;
load.filename = (void *)filename;
load.priv = NULL;
- return spl_load_simple_fit(&load, 0, header);
+ return spl_load_simple_fit(spl_image, &load, 0, header);
} else {
- err = spl_parse_image_header(header);
+ err = spl_parse_image_header(spl_image, header);
if (err)
goto end;
err = file_fat_read(filename,
- (u8 *)(uintptr_t)spl_image.load_addr, 0);
+ (u8 *)(uintptr_t)spl_image->load_addr, 0);
}
end:
}
#ifdef CONFIG_SPL_OS_BOOT
-int spl_load_image_fat_os(struct blk_desc *block_dev, int partition)
+int spl_load_image_fat_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition)
{
int err;
__maybe_unused char *file;
}
file = getenv("falcon_image_file");
if (file) {
- err = spl_load_image_fat(block_dev, partition, file);
+ err = spl_load_image_fat(spl_image, block_dev,
+ partition, file);
if (err != 0) {
puts("spl: falling back to default\n");
goto defaults;
return -1;
}
- return spl_load_image_fat(block_dev, partition,
+ return spl_load_image_fat(spl_image, block_dev, partition,
CONFIG_SPL_FS_LOAD_KERNEL_NAME);
}
#else
-int spl_load_image_fat_os(struct blk_desc *block_dev, int partition)
+int spl_load_image_fat_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition)
{
return -ENOSYS;
}
return (data_size + info->bl_len - 1) / info->bl_len;
}
-int spl_load_simple_fit(struct spl_load_info *info, ulong sector, void *fit)
+int spl_load_simple_fit(struct spl_image_info *spl_image,
+ struct spl_load_info *info, ulong sector, void *fit)
{
int sectors;
ulong size, load;
data_size = fdt_getprop_u32(fit, node, "data-size");
load = fdt_getprop_u32(fit, node, "load");
debug("data_offset=%x, data_size=%x\n", data_offset, data_size);
- spl_image.load_addr = load;
- spl_image.entry_point = load;
- spl_image.os = IH_OS_U_BOOT;
+ spl_image->load_addr = load;
+ spl_image->entry_point = load;
+ spl_image->os = IH_OS_U_BOOT;
/*
* Work out where to place the image. We read it so that the first
DECLARE_GLOBAL_DATA_PTR;
-static int mmc_load_legacy(struct mmc *mmc, ulong sector,
- struct image_header *header)
+static int mmc_load_legacy(struct spl_image_info *spl_image, struct mmc *mmc,
+ ulong sector, struct image_header *header)
{
u32 image_size_sectors;
unsigned long count;
int ret;
- ret = spl_parse_image_header(header);
+ ret = spl_parse_image_header(spl_image, header);
if (ret)
return ret;
/* convert size to sectors - round up */
- image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) /
+ image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
mmc->read_bl_len;
/* Read the header too to avoid extra memcpy */
count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
- (void *)(ulong)spl_image.load_addr);
+ (void *)(ulong)spl_image->load_addr);
debug("read %x sectors to %x\n", image_size_sectors,
- spl_image.load_addr);
+ spl_image->load_addr);
if (count != image_size_sectors)
return -EIO;
return blk_dread(mmc_get_blk_desc(mmc), sector, count, buf);
}
-static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
+static int mmc_load_image_raw_sector(struct spl_image_info *spl_image,
+ struct mmc *mmc, unsigned long sector)
{
unsigned long count;
struct image_header *header;
load.filename = NULL;
load.bl_len = mmc->read_bl_len;
load.read = h_spl_load_read;
- ret = spl_load_simple_fit(&load, sector, header);
+ ret = spl_load_simple_fit(spl_image, &load, sector, header);
} else {
- ret = mmc_load_legacy(mmc, sector, header);
+ ret = mmc_load_legacy(spl_image, mmc, sector, header);
}
end:
}
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
-static int mmc_load_image_raw_partition(struct mmc *mmc, int partition)
+static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
+ struct mmc *mmc, int partition)
{
disk_partition_t info;
int err;
}
#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
- return mmc_load_image_raw_sector(mmc, info.start +
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
+ return mmc_load_image_raw_sector(spl_image, mmc,
+ info.start + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
#else
- return mmc_load_image_raw_sector(mmc, info.start);
+ return mmc_load_image_raw_sector(spl_image, mmc, info.start);
#endif
}
#else
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION -1
-static int mmc_load_image_raw_partition(struct mmc *mmc, int partition)
+static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
+ struct mmc *mmc, int partition)
{
return -ENOSYS;
}
#endif
#ifdef CONFIG_SPL_OS_BOOT
-static int mmc_load_image_raw_os(struct mmc *mmc)
+static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
+ struct mmc *mmc)
{
unsigned long count;
int ret;
return -1;
}
- ret = mmc_load_image_raw_sector(mmc,
+ ret = mmc_load_image_raw_sector(spl_image, mmc,
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR);
if (ret)
return ret;
- if (spl_image.os != IH_OS_LINUX) {
+ if (spl_image->os != IH_OS_LINUX) {
puts("Expected Linux image is not found. Trying to start U-boot\n");
return -ENOENT;
}
{
return 1;
}
-static int mmc_load_image_raw_os(struct mmc *mmc)
+static int mmc_load_image_raw_os(struct spl_image_info *spl_image,
+ struct mmc *mmc)
{
return -ENOSYS;
}
#endif
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
-int spl_mmc_do_fs_boot(struct mmc *mmc)
+static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc)
{
int err = -ENOSYS;
#ifdef CONFIG_SPL_FAT_SUPPORT
if (!spl_start_uboot()) {
- err = spl_load_image_fat_os(mmc_get_blk_desc(mmc),
+ err = spl_load_image_fat_os(spl_image, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION);
if (!err)
return err;
}
#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
- err = spl_load_image_fat(mmc_get_blk_desc(mmc),
+ err = spl_load_image_fat(spl_image, mmc_get_blk_desc(mmc),
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
if (!err)
#endif
#ifdef CONFIG_SPL_EXT_SUPPORT
if (!spl_start_uboot()) {
- err = spl_load_image_ext_os(&mmc->block_dev,
+ err = spl_load_image_ext_os(spl_image, &mmc->block_dev,
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION);
if (!err)
return err;
}
#ifdef CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
- err = spl_load_image_ext(&mmc->block_dev,
+ err = spl_load_image_ext(spl_image, &mmc->block_dev,
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
if (!err)
return err;
}
#else
-int spl_mmc_do_fs_boot(struct mmc *mmc)
+static int spl_mmc_do_fs_boot(struct spl_image_info *spl_image, struct mmc *mmc)
{
return -ENOSYS;
}
#endif
-int spl_mmc_load_image(u32 boot_device)
+static int spl_mmc_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
struct mmc *mmc = NULL;
u32 boot_mode;
int err = 0;
__maybe_unused int part;
- err = spl_mmc_find_device(&mmc, boot_device);
+ err = spl_mmc_find_device(&mmc, bootdev->boot_device);
if (err)
return err;
return err;
}
- boot_mode = spl_boot_mode(boot_device);
+ boot_mode = spl_boot_mode(bootdev->boot_device);
err = -EINVAL;
switch (boot_mode) {
case MMCSD_MODE_EMMCBOOT:
debug("spl: mmc boot mode: raw\n");
if (!spl_start_uboot()) {
- err = mmc_load_image_raw_os(mmc);
+ err = mmc_load_image_raw_os(spl_image, mmc);
if (!err)
return err;
}
- err = mmc_load_image_raw_partition(mmc,
+ err = mmc_load_image_raw_partition(spl_image, mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
if (!err)
return err;
#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR)
- err = mmc_load_image_raw_sector(mmc,
+ err = mmc_load_image_raw_sector(spl_image, mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
if (!err)
return err;
case MMCSD_MODE_FS:
debug("spl: mmc boot mode: fs\n");
- err = spl_mmc_do_fs_boot(mmc);
+ err = spl_mmc_do_fs_boot(spl_image, mmc);
if (!err)
return err;
return err;
}
+
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_MMC1, spl_mmc_load_image);
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_MMC2, spl_mmc_load_image);
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_MMC2_2, spl_mmc_load_image);
#include <fdt.h>
#if defined(CONFIG_SPL_NAND_RAW_ONLY)
-int spl_nand_load_image(void)
+int spl_nand_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
nand_init();
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
CONFIG_SYS_NAND_U_BOOT_SIZE,
(void *)CONFIG_SYS_NAND_U_BOOT_DST);
- spl_set_header_raw_uboot();
+ spl_set_header_raw_uboot(spl_image);
nand_deselect();
return 0;
return 0;
}
-static int spl_nand_load_element(int offset, struct image_header *header)
+static int spl_nand_load_element(struct spl_image_info *spl_image,
+ int offset, struct image_header *header)
{
int err;
load.filename = NULL;
load.bl_len = 1;
load.read = spl_nand_fit_read;
- return spl_load_simple_fit(&load, offset, header);
+ return spl_load_simple_fit(spl_image, &load, offset, header);
} else {
- err = spl_parse_image_header(header);
+ err = spl_parse_image_header(spl_image, header);
if (err)
return err;
- return nand_spl_load_image(offset, spl_image.size,
- (void *)(ulong)spl_image.load_addr);
+ return nand_spl_load_image(offset, spl_image->size,
+ (void *)(ulong)spl_image->load_addr);
}
}
-int spl_nand_load_image(void)
+static int spl_nand_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int err;
struct image_header *header;
/* load linux */
nand_spl_load_image(CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
sizeof(*header), (void *)header);
- err = spl_parse_image_header(header);
+ err = spl_parse_image_header(spl_image, header);
if (err)
return err;
if (header->ih_os == IH_OS_LINUX) {
/* happy - was a linux */
err = nand_spl_load_image(
CONFIG_SYS_NAND_SPL_KERNEL_OFFS,
- spl_image.size,
- (void *)spl_image.load_addr);
+ spl_image->size,
+ (void *)spl_image->load_addr);
nand_deselect();
return err;
} else {
}
#endif
#ifdef CONFIG_NAND_ENV_DST
- spl_nand_load_element(CONFIG_ENV_OFFSET, header);
+ spl_nand_load_element(spl_image, CONFIG_ENV_OFFSET, header);
#ifdef CONFIG_ENV_OFFSET_REDUND
- spl_nand_load_element(CONFIG_ENV_OFFSET_REDUND, header);
+ spl_nand_load_element(spl_image, CONFIG_ENV_OFFSET_REDUND, header);
#endif
#endif
/* Load u-boot */
- err = spl_nand_load_element(CONFIG_SYS_NAND_U_BOOT_OFFS, header);
+ err = spl_nand_load_element(spl_image, CONFIG_SYS_NAND_U_BOOT_OFFS,
+ header);
#ifdef CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
#if CONFIG_SYS_NAND_U_BOOT_OFFS != CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND
if (err)
- err = spl_nand_load_element(CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND,
+ err = spl_nand_load_element(spl_image,
+ CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND,
header);
#endif
#endif
return err;
}
#endif
+/* Use priorty 1 so that Ubi can override this */
+SPL_LOAD_IMAGE_METHOD(1, BOOT_DEVICE_NAND, spl_nand_load_image);
DECLARE_GLOBAL_DATA_PTR;
-int spl_net_load_image(const char *device)
+#if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
+static int spl_net_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int rv;
printf("No Ethernet devices found\n");
return -ENODEV;
}
- if (device)
- setenv("ethact", device);
+ if (bootdev->boot_device_name)
+ setenv("ethact", bootdev->boot_device_name);
rv = net_loop(BOOTP);
if (rv < 0) {
printf("Problem booting with BOOTP\n");
return rv;
}
- return spl_parse_image_header((struct image_header *)load_addr);
+ return spl_parse_image_header(spl_image,
+ (struct image_header *)load_addr);
}
+#endif
+
+#ifdef CONFIG_SPL_ETH_SUPPORT
+int spl_net_load_image_cpgmac(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+#ifdef CONFIG_SPL_ETH_DEVICE
+ bootdev->boot_device_name = CONFIG_SPL_ETH_DEVICE;
+#endif
+
+ return spl_net_load_image(spl_image, bootdev);
+}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_CPGMAC, spl_net_load_image_cpgmac);
+#endif
+
+#ifdef CONFIG_SPL_USBETH_SUPPORT
+int spl_net_load_image_usb(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ bootdev->boot_device_name = "usb_ether";
+
+ return spl_net_load_image(spl_image, bootdev);
+}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_USBETH, spl_net_load_image_usb);
+#endif
#include <common.h>
#include <spl.h>
-int spl_nor_load_image(void)
+static int spl_nor_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int ret;
/*
* Loading of the payload to SDRAM is done with skipping of
* the mkimage header in this SPL NOR driver
*/
- spl_image.flags |= SPL_COPY_PAYLOAD_ONLY;
+ spl_image->flags |= SPL_COPY_PAYLOAD_ONLY;
#ifdef CONFIG_SPL_OS_BOOT
if (!spl_start_uboot()) {
if (image_get_os(header) == IH_OS_LINUX) {
/* happy - was a Linux */
- ret = spl_parse_image_header(header);
+ ret = spl_parse_image_header(spl_image, header);
if (ret)
return ret;
- memcpy((void *)spl_image.load_addr,
+ memcpy((void *)spl_image->load_addr,
(void *)(CONFIG_SYS_OS_BASE +
sizeof(struct image_header)),
- spl_image.size);
+ spl_image->size);
/*
* Copy DT blob (fdt) to SDRAM. Passing pointer to
* Load real U-Boot from its location in NOR flash to its
* defined location in SDRAM
*/
- ret = spl_parse_image_header(
+ ret = spl_parse_image_header(spl_image,
(const struct image_header *)CONFIG_SYS_UBOOT_BASE);
if (ret)
return ret;
- memcpy((void *)(unsigned long)spl_image.load_addr,
+ memcpy((void *)(unsigned long)spl_image->load_addr,
(void *)(CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header)),
- spl_image.size);
+ spl_image->size);
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_NOR, spl_nor_load_image);
#include <asm/io.h>
#include <onenand_uboot.h>
-int spl_onenand_load_image(void)
+static int spl_onenand_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
struct image_header *header;
int ret;
/* Load u-boot */
onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,
CONFIG_SYS_ONENAND_PAGE_SIZE, (void *)header);
- ret = spl_parse_image_header(header);
+ ret = spl_parse_image_header(spl_image, header);
if (ret)
return ret;
onenand_spl_load_image(CONFIG_SYS_ONENAND_U_BOOT_OFFS,
- spl_image.size, (void *)spl_image.load_addr);
+ spl_image->size, (void *)spl_image->load_addr);
return 0;
}
+/* Use priorty 1 so that Ubi can override this */
+SPL_LOAD_IMAGE_METHOD(1, BOOT_DEVICE_ONENAND, spl_onenand_load_image);
DECLARE_GLOBAL_DATA_PTR;
-int spl_sata_load_image(void)
+static int spl_sata_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int err;
struct blk_desc *stor_dev;
}
#ifdef CONFIG_SPL_OS_BOOT
- if (spl_start_uboot() || spl_load_image_fat_os(stor_dev,
- CONFIG_SYS_SATA_FAT_BOOT_PARTITION))
+ if (spl_start_uboot() ||
+ spl_load_image_fat_os(spl_image, stor_dev,
+ CONFIG_SYS_SATA_FAT_BOOT_PARTITION))
#endif
- err = spl_load_image_fat(stor_dev,
- CONFIG_SYS_SATA_FAT_BOOT_PARTITION,
+ {
+ err = spl_load_image_fat(spl_image, stor_dev,
+ CONFIG_SYS_SATA_FAT_BOOT_PARTITION,
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
+ }
if (err) {
puts("Error loading sata device\n");
return err;
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_SATA, spl_sata_load_image);
--- /dev/null
+/*
+ * Copyright (C) 2011 OMICRON electronics GmbH
+ *
+ * based on drivers/mtd/nand/nand_spl_load.c
+ *
+ * Copyright (C) 2011
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spi.h>
+#include <spi_flash.h>
+#include <errno.h>
+#include <spl.h>
+
+#ifdef CONFIG_SPL_OS_BOOT
+/*
+ * Load the kernel, check for a valid header we can parse, and if found load
+ * the kernel and then device tree.
+ */
+static int spi_load_image_os(struct spl_image_info *spl_image,
+ struct spi_flash *flash,
+ struct image_header *header)
+{
+ int err;
+
+ /* Read for a header, parse or error out. */
+ spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40,
+ (void *)header);
+
+ if (image_get_magic(header) != IH_MAGIC)
+ return -1;
+
+ err = spl_parse_image_header(spl_image, header);
+ if (err)
+ return err;
+
+ spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
+ spl_image->size, (void *)spl_image->load_addr);
+
+ /* Read device tree. */
+ spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
+ CONFIG_SYS_SPI_ARGS_SIZE,
+ (void *)CONFIG_SYS_SPL_ARGS_ADDR);
+
+ return 0;
+}
+#endif
+
+static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
+ ulong count, void *buf)
+{
+ struct spi_flash *flash = load->dev;
+ ulong ret;
+
+ ret = spi_flash_read(flash, sector, count, buf);
+ if (!ret)
+ return count;
+ else
+ return 0;
+}
+/*
+ * The main entry for SPI booting. It's necessary that SDRAM is already
+ * configured and available since this code loads the main U-Boot image
+ * from SPI into SDRAM and starts it from there.
+ */
+static int spl_spi_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ int err = 0;
+ struct spi_flash *flash;
+ struct image_header *header;
+
+ /*
+ * Load U-Boot image from SPI flash into RAM
+ */
+
+ flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+ CONFIG_SF_DEFAULT_CS,
+ CONFIG_SF_DEFAULT_SPEED,
+ CONFIG_SF_DEFAULT_MODE);
+ if (!flash) {
+ puts("SPI probe failed.\n");
+ return -ENODEV;
+ }
+
+ /* use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_SPL_OS_BOOT
+ if (spl_start_uboot() || spi_load_image_os(spl_image, flash, header))
+#endif
+ {
+ /* Load u-boot, mkimage header is 64 bytes. */
+ err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40,
+ (void *)header);
+ if (err)
+ return err;
+
+ if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
+ struct spl_load_info load;
+
+ debug("Found FIT\n");
+ load.dev = flash;
+ load.priv = NULL;
+ load.filename = NULL;
+ load.bl_len = 1;
+ load.read = spl_spi_fit_read;
+ err = spl_load_simple_fit(spl_image, &load,
+ CONFIG_SYS_SPI_U_BOOT_OFFS,
+ header);
+ } else {
+ err = spl_parse_image_header(spl_image, header);
+ if (err)
+ return err;
+ err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS,
+ spl_image->size,
+ (void *)spl_image->load_addr);
+ }
+ }
+
+ return err;
+}
+/* Use priorty 1 so that boards can override this */
+SPL_LOAD_IMAGE_METHOD(1, BOOT_DEVICE_SPI, spl_spi_load_image);
#include <ubispl.h>
#include <spl.h>
-int spl_ubi_load_image(u32 boot_device)
+int spl_ubi_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
struct image_header *header;
struct ubispl_info info;
struct ubispl_load volumes[2];
int ret = 1;
- switch (boot_device) {
+ switch (bootdev->boot_device) {
#ifdef CONFIG_SPL_NAND_SUPPORT
case BOOT_DEVICE_NAND:
nand_init();
ret = ubispl_load_volumes(&info, volumes, 2);
if (!ret) {
header = (struct image_header *)volumes[0].load_addr;
- spl_parse_image_header(header);
+ spl_parse_image_header(spl_image, header);
puts("Linux loaded.\n");
goto out;
}
ret = ubispl_load_volumes(&info, volumes, 1);
if (!ret)
- spl_parse_image_header(header);
+ spl_parse_image_header(spl_image, header);
out:
#ifdef CONFIG_SPL_NAND_SUPPORT
- if (boot_device == BOOT_DEVICE_NAND)
+ if (bootdev->boot_device == BOOT_DEVICE_NAND)
nand_deselect();
#endif
return ret;
}
+/* Use priorty 0 so that Ubi will override NAND and ONENAND methods */
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_NAND, spl_ubi_load_image);
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_ONENAND, spl_ubi_load_image);
static int usb_stor_curr_dev = -1; /* current device */
#endif
-int spl_usb_load_image(void)
+static int spl_usb_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int err;
struct blk_desc *stor_dev;
debug("boot mode - FAT\n");
#ifdef CONFIG_SPL_OS_BOOT
- if (spl_start_uboot() || spl_load_image_fat_os(stor_dev,
- CONFIG_SYS_USB_FAT_BOOT_PARTITION))
+ if (spl_start_uboot() ||
+ spl_load_image_fat_os(spl_image, stor_dev,
+ CONFIG_SYS_USB_FAT_BOOT_PARTITION))
#endif
- err = spl_load_image_fat(stor_dev,
- CONFIG_SYS_USB_FAT_BOOT_PARTITION,
- CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
+ {
+ err = spl_load_image_fat(spl_image, stor_dev,
+ CONFIG_SYS_USB_FAT_BOOT_PARTITION,
+ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME);
+ }
if (err) {
puts("Error loading from USB device\n");
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_USB, spl_usb_load_image);
return size;
}
-int spl_ymodem_load_image(void)
+static int spl_ymodem_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int size = 0;
int err;
info.buf = buf;
info.image_read = BUF_SIZE;
load.read = ymodem_read_fit;
- ret = spl_load_simple_fit(&load, 0, (void *)buf);
+ ret = spl_load_simple_fit(spl_image, &load, 0, (void *)buf);
size = info.image_read;
while ((res = xyzModem_stream_read(buf, BUF_SIZE, &err)) > 0)
size += res;
} else {
- spl_parse_image_header((struct image_header *)buf);
- ret = spl_parse_image_header((struct image_header *)buf);
+ spl_parse_image_header(spl_image, (struct image_header *)buf);
+ ret = spl_parse_image_header(spl_image,
+ (struct image_header *)buf);
if (ret)
return ret;
- addr = spl_image.load_addr;
+ addr = spl_image->load_addr;
memcpy((void *)addr, buf, res);
size += res;
addr += res;
printf("Loaded %d bytes\n", size);
return 0;
}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_UART, spl_ymodem_load_image);
CONFIG_TARGET_AM57XX_EVM=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
CONFIG_FIT=y
CONFIG_TARGET_DRA7XX_EVM=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
CONFIG_FIT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="dra7-evm dra72-evm"
+CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc"
CONFIG_DM=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_HUSH_PARSER=y
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FASTBOOT_BUF_ADDR=0x82000000
+CONFIG_FASTBOOT_BUF_SIZE=0x2f000000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_ARM=y
CONFIG_TARGET_VEXPRESS_CA15_TC2=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
thus you should really consider if you can avoid it!
-There is two ways for JFFS2 to find the disk. The default way uses
-the flash_info structure to find the start of a JFFS2 disk (called
-partition in the code) and you can change where the partition is with
-two defines.
+There only one way for JFFS2 to find the disk. It uses the flash_info
+structure to find the start of a JFFS2 disk (called partition in the code)
+and you can change where the partition is with two defines.
CONFIG_SYS_JFFS2_FIRST_BANK
defined the first flash bank to use
CONFIG_SYS_JFFS2_FIRST_SECTOR
defines the first sector to use
-
-
-The second way is to define CONFIG_SYS_JFFS_CUSTOM_PART and implement the
-jffs2_part_info(int part_num) function in your board specific files.
-In this mode CONFIG_SYS_JFFS2_FIRST_BANK and CONFIG_SYS_JFFS2_FIRST_SECTOR is not
-used.
-
-The input is a partition number starting with 0.
-Return a pointer to struct part_info or NULL for error;
-
-Ex jffs2_part_info() for one partition.
----
-#if defined CONFIG_SYS_JFFS_CUSTOM_PART
-#include <jffs2/jffs2.h>
-
-static struct part_info part;
-
-struct part_info*
-jffs2_part_info(int part_num)
-{
- if(part_num==0){
- if(part.usr_priv==(void*)1)
- return ∂
-
- memset(&part, 0, sizeof(part));
- part.offset=(char*)0xFF800000;
- part.size=1024*1024*8;
-
- /* Mark the struct as ready */
- part.usr_priv=(void*)1;
-
- return ∂
- }
- return 0;
-}
-#endif
---
TODO.
To enable, use the following #define in the board configuration file:
-#define CONFIG_JFFS2_NAND 1
+#define CONFIG_JFFS2_NAND
Configuration of partitions is similar to how this is done in U-Boot
-for JFFS2 on top NOR flash. If a single partition is used, it can be
-configured using the following #defines in the configuration file:
-
-#define CONFIG_JFFS2_NAND_DEV 0 /* nand device jffs2 lives on */
-#define CONFIG_JFFS2_NAND_OFF 0 /* start of jffs2 partition */
-#define CONFIG_JFFS2_NAND_SIZE 2*1024*1024 /* size of jffs2 partition */
-
-If more than a single partition is desired, the user can define a
-CONFIG_SYS_JFFS_CUSTOM_PART macro and implement a
-
- struct part_info* jffs2_part_info(int part_num)
-
-function in a board-specific module. An example of such function is
-available in common/cmd_jffs2.c
-
-The default configuration for the DAVE board has a single JFFS2
-partition of 2 MB size.
+for JFFS2 on top NOR flash.
+++ /dev/null
- New C structure AT91 SoC access
-=================================
-
-The goal
---------
-
-Currently the at91 arch uses hundreds of address defines and special
-at91_xxxx_write/read functions to access the SOC.
-The u-boot project perferred method is to access memory mapped hw
-regisister via a c structure.
-
-e.g. old
-
- *AT91C_PIOA_IDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
- *AT91C_PIOC_PUDR = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
- *AT91C_PIOC_PER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
- *AT91C_PIOC_OER = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
- *AT91C_PIOC_PIO = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
-
- at91_sys_write(AT91_RSTC_CR,
- AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
-
-e.g new
- pin = AT91_PMX_AA_TWD | AT91_PMX_AA_TWCK;
- writel(pin, &pio->pioa.idr);
- writel(pin, &pio->pioa.pudr);
- writel(pin, &pio->pioa.per);
- writel(pin, &pio->pioa.oer);
- writel(pin, &pio->pioa.sodr);
-
- writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST |
- AT91_RSTC_CR_PERRST, &rstc->cr);
-
-The method for updating
-------------------------
-
-1. add's the temporary CONFIG_AT91_LEGACY to all at91 board configs
-2. Display a compile time warning, if the board has not been converted
-3. add new structures for SoC access
-4. Convert arch, driver and boards file to new SoC
-5. remove legacy code, if all boards and drives are ready
-
-2013-10-30 Andreas Bießmann <andreas@biessmann.org>:
-
-The goal is almost reached, we could remove the CONFIG_AT91_LEGACY switch but
-remain the CONFIG_ATMEL_LEGACY switch until the GPIO disaster is fixed. The
-AT91 spi driver has also some CONFIG_ATMEL_LEGACY stuff left, so another point
-to fix until this README can be removed.
+++ /dev/null
-U-Boot for Freescale i.MX31
-
-This file contains information for the port of U-Boot to the Freescale
-i.MX31 SoC.
-
-1. CONFIGURATION OPTIONS/SETTINGS
----------------------------------
-
-1.1 Configuration of MC13783 SPI bus
-------------------------------------
- The power management companion chip MC13783 is connected to the
- i.MX31 via an SPI bus. Use the following configuration options
- to setup the bus and chip select used for a particular board.
-
- CONFIG_MC13783_SPI_BUS -- defines the SPI bus the MC13783 is connected to.
- Note that 0 is CSPI1, 1 is CSPI2 and 2 is CSPI3.
- CONFIG_MC13783_SPI_CS -- define the chip select the MC13783 s connected to.
-
-1.2 Timer precision
--------------------
- CONFIG_MX31_TIMER_HIGH_PRECISION
-
- Enable higher precision timer. The low-precision timer
- (default) provides approximately 4% error, whereas the
- high-precision timer is about 0.4% accurate. The extra
- accuracy is achieved at the cost of higher computational
- overhead, which, in places where time is measured, should
- not be critical, so, it should be safe to enable this
- option.
CONFIG_MPC83xx MPC83xx family
CONFIG_MPC8349 MPC8349 specific
- CONFIG_MPC8349ADS MPC8349ADS board specific
CONFIG_TSEC_ENET Use on-chip 10/100/1000 ethernet
/*
* devnum is the device number to be used in nand commands
- * and in mtd->name. Must be less than CONFIG_SYS_NAND_MAX_DEVICE.
+ * and in mtd->name. Must be less than CONFIG_SYS_MAX_NAND_DEVICE.
*/
if (nand_register(devnum, mtd))
error out
Pass \-h as the compression to see the list of supported compression type.
.TP
-.BI "\-a [" "load addess" "]"
+.BI "\-a [" "load address" "]"
Set load address with a hex number.
.TP
* to the 256 byte-"opcodes" found on the 8086. The table which
* dispatches this is found in the files optab.[ch].
*
-* Each opcode proc has a comment preceeding it which gives it's table
+* Each opcode proc has a comment preceding it which gives it's table
* address. Several opcodes are missing (undefined) in the table.
*
* Each proc includes information for decoding (DECODE_PRINTF and
/*!
* CAAM page allocation:
* Allocates a partition from secure memory, with the id
- * equal to partion_num. This will de-allocate the page
+ * equal to partition_num. This will de-allocate the page
* if it is already allocated. The partition will have
* full access permissions. The permissions are set before,
* running a job descriptor. A memory page of secure RAM
}
if (mem_mask != 0) {
- /* motib redundent in KW28 */
+ /* motib redundant in KW28 */
CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type,
if_id,
CS_ENABLE_REG, 0, 0x8));
#include <errno.h>
#include <i2c.h>
+DECLARE_GLOBAL_DATA_PTR;
+
+struct cros_ec_i2c_bus {
+ int remote_bus;
+};
+
static int cros_ec_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
{
return 0;
static int cros_ec_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
int nmsgs)
{
- return cros_ec_i2c_tunnel(dev->parent, msg, nmsgs);
+ struct cros_ec_i2c_bus *i2c_bus = dev_get_priv(dev);
+
+ return cros_ec_i2c_tunnel(dev->parent, i2c_bus->remote_bus, msg, nmsgs);
+}
+
+static int cros_ec_i2c_ofdata_to_platdata(struct udevice *dev)
+{
+ struct cros_ec_i2c_bus *i2c_bus = dev_get_priv(dev);
+ const void *blob = gd->fdt_blob;
+ int node = dev->of_offset;
+
+ i2c_bus->remote_bus = fdtdec_get_uint(blob, node, "google,remote-bus",
+ 0);
+
+ return 0;
}
static const struct dm_i2c_ops cros_ec_i2c_ops = {
.name = "cros_ec_tunnel",
.id = UCLASS_I2C,
.of_match = cros_ec_i2c_ids,
+ .ofdata_to_platdata = cros_ec_i2c_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct cros_ec_i2c_bus),
.ops = &cros_ec_i2c_ops,
};
return 0;
}
-int cros_ec_i2c_tunnel(struct udevice *dev, struct i2c_msg *in, int nmsgs)
+int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *in,
+ int nmsgs)
{
struct cros_ec_dev *cdev = dev_get_uclass_priv(dev);
union {
int rv;
int i;
- p->port = 0;
+ p->port = port;
p->num_msgs = nmsgs;
size = sizeof(*p) + p->num_msgs * sizeof(*msg);
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
+obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o
else
obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
void *dst);
#endif
-#ifndef CONFIG_SPL_BUILD
-
+#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV))
unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start,
lbaint_t blkcnt);
const void *src);
#endif
-#else /* CONFIG_SPL_BUILD */
+#else /* CONFIG_SPL_BUILD and CONFIG_SPL_SAVEENV is not defined */
-/* SPL will never write or erase, declare dummies to reduce code size. */
+/* declare dummies to reduce code size. */
#ifdef CONFIG_BLK
static inline unsigned long mmc_berase(struct udevice *dev,
obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o
ifdef CONFIG_SPL_BUILD
-obj-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o
obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o
obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o
endif
#define ESPI_BOOT_IMAGE_ADDR 0x50
#define CONFIG_CFG_DATA_SECTOR 0
-void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)
+void fsl_spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)
{
struct spi_flash *flash;
* configured and available since this code loads the main U-Boot image
* from SPI into SDRAM and starts it from there.
*/
-void spi_boot(void)
+void fsl_spi_boot(void)
{
void (*uboot)(void) __noreturn;
u32 offset, code_len, copy_len = 0;
+++ /dev/null
-/*
- * Copyright (C) 2011 OMICRON electronics GmbH
- *
- * based on drivers/mtd/nand/nand_spl_load.c
- *
- * Copyright (C) 2011
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <spi.h>
-#include <spi_flash.h>
-#include <errno.h>
-#include <spl.h>
-
-#ifdef CONFIG_SPL_OS_BOOT
-/*
- * Load the kernel, check for a valid header we can parse, and if found load
- * the kernel and then device tree.
- */
-static int spi_load_image_os(struct spi_flash *flash,
- struct image_header *header)
-{
- int err;
-
- /* Read for a header, parse or error out. */
- spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40,
- (void *)header);
-
- if (image_get_magic(header) != IH_MAGIC)
- return -1;
-
- err = spl_parse_image_header(header);
- if (err)
- return err;
-
- spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
- spl_image.size, (void *)spl_image.load_addr);
-
- /* Read device tree. */
- spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
- CONFIG_SYS_SPI_ARGS_SIZE,
- (void *)CONFIG_SYS_SPL_ARGS_ADDR);
-
- return 0;
-}
-#endif
-
-static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
- ulong count, void *buf)
-{
- struct spi_flash *flash = load->dev;
- ulong ret;
-
- ret = spi_flash_read(flash, sector, count, buf);
- if (!ret)
- return count;
- else
- return 0;
-}
-/*
- * The main entry for SPI booting. It's necessary that SDRAM is already
- * configured and available since this code loads the main U-Boot image
- * from SPI into SDRAM and starts it from there.
- */
-int spl_spi_load_image(void)
-{
- int err = 0;
- struct spi_flash *flash;
- struct image_header *header;
-
- /*
- * Load U-Boot image from SPI flash into RAM
- */
-
- flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
- CONFIG_SF_DEFAULT_CS,
- CONFIG_SF_DEFAULT_SPEED,
- CONFIG_SF_DEFAULT_MODE);
- if (!flash) {
- puts("SPI probe failed.\n");
- return -ENODEV;
- }
-
- /* use CONFIG_SYS_TEXT_BASE as temporary storage area */
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
-
-#ifdef CONFIG_SPL_OS_BOOT
- if (spl_start_uboot() || spi_load_image_os(flash, header))
-#endif
- {
- /* Load u-boot, mkimage header is 64 bytes. */
- err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40,
- (void *)header);
- if (err)
- return err;
-
- if (IS_ENABLED(CONFIG_SPL_LOAD_FIT)) {
- struct spl_load_info load;
-
- debug("Found FIT\n");
- load.dev = flash;
- load.priv = NULL;
- load.filename = NULL;
- load.bl_len = 1;
- load.read = spl_spi_fit_read;
- err = spl_load_simple_fit(&load,
- CONFIG_SYS_SPI_U_BOOT_OFFS,
- header);
- } else {
- err = spl_parse_image_header(header);
- if (err)
- return err;
- err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS,
- spl_image.size,
- (void *)spl_image.load_addr);
- }
- }
-
- return err;
-}
/*****************************************************************************/
-int spl_spi_load_image(void)
+static int spl_spi_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
{
int err;
struct image_header *header;
spi0_init();
spi0_read_data((void *)header, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40);
- err = spl_parse_image_header(header);
+ err = spl_parse_image_header(spl_image, header);
if (err)
return err;
- spi0_read_data((void *)spl_image.load_addr, CONFIG_SYS_SPI_U_BOOT_OFFS,
- spl_image.size);
+ spi0_read_data((void *)spl_image->load_addr, CONFIG_SYS_SPI_U_BOOT_OFFS,
+ spl_image->size);
spi0_deinit();
return 0;
}
+/* Use priorty 0 to override the default if it happens to be linked in */
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_SPI, spl_spi_load_image);
* current transfer) have got the time to arrived before
* netloop calls eth_halt
*/
- printf ("About preceeding transfer (eth%d):\n"
+ printf ("About preceding transfer (eth%d):\n"
"- Sent packet number %d\n"
"- Received packet number %d\n"
"- Handled packet number %d\n",
* (C) Copyright 2014
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * Basic support for the pwm modul on imx6.
+ * Basic support for the pwm module on imx6.
*
* Based on linux:drivers/pwm/pwm-imx.c
* from
* (C) Copyright 2014
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * Basic support for the pwm modul on imx6.
+ * Basic support for the pwm module on imx6.
*
* SPDX-License-Identifier: GPL-2.0
*/
* (C) Copyright 2014
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
- * Basic support for the pwm modul on imx6.
+ * Basic support for the pwm module on imx6.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
-#include <linux/compiler.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
{
struct ns16550_platdata *plat = dev->platdata;
fdt_addr_t addr;
- __maybe_unused struct clk clk;
- __maybe_unused int err;
+ struct clk clk;
+ int err;
/* try Processor Local Bus device first */
addr = dev_get_addr(dev);
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 0);
-#ifdef CONFIG_CLK
err = clk_get_by_index(dev, 0, &clk);
if (!err) {
err = clk_get_rate(&clk);
if (!IS_ERR_VALUE(err))
plat->clock = err;
- } else if (err != -ENODEV && err != -ENOSYS) {
+ } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
debug("ns16550 failed to get clock\n");
return err;
}
-#endif
if (!plat->clock)
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
priv = dev_get_priv(bus);
- /* processor special prepartion work */
+ /* processor special preparation work */
cpu_dspi_claim_bus(bus->seq, slave_plat->cs);
/* configure transfer mode */
* @return 0 if OK, or a negative error code.
*/
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
+#else
+static inline int clk_get_by_index(struct udevice *dev, int index,
+ struct clk *clk)
+{
+ return -ENOSYS;
+}
+
+static inline int clk_get_by_name(struct udevice *dev, const char *name,
+ struct clk *clk)
+{
+ return -ENOSYS;
+}
+#endif
/**
* clk_request - Request a clock by provider-specific ID.
int clk_disable(struct clk *clk);
int soc_clk_dump(void);
-#else
-static inline int clk_get_by_index(struct udevice *dev, int index,
- struct clk *clk)
-{
- return -ENOSYS;
-}
-static inline int clk_get_by_name(struct udevice *dev, const char *name,
- struct clk *clk)
-{
- return -ENOSYS;
-}
-#endif
#endif
#define DFU_ALT_INFO_QSPI \
"dfu_alt_info_qspi=" \
- "MLO raw 0x0 0x010000;" \
- "MLO.backup1 raw 0x010000 0x010000;" \
- "MLO.backup2 raw 0x020000 0x010000;" \
- "MLO.backup3 raw 0x030000 0x010000;" \
+ "MLO raw 0x0 0x040000;" \
"u-boot.img raw 0x040000 0x0100000;" \
"u-boot-spl-os raw 0x140000 0x080000;" \
"u-boot-env raw 0x1C0000 0x010000;" \
DFU_ALT_INFO_EMMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_QSPI
-
-/* Fastboot */
-#define CONFIG_USB_FUNCTION_FASTBOOT
-#define CONFIG_CMD_FASTBOOT
-#define CONFIG_ANDROID_BOOT_IMAGE
-#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
-#define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000
-#define CONFIG_FASTBOOT_FLASH
-#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
+#else
+/* Discard fastboot in SPL build, to spare some space */
+#undef CONFIG_FASTBOOT
+#undef CONFIG_USB_FUNCTION_FASTBOOT
+#undef CONFIG_CMD_FASTBOOT
+#undef CONFIG_ANDROID_BOOT_IMAGE
+#undef CONFIG_FASTBOOT_BUF_ADDR
+#undef CONFIG_FASTBOOT_BUF_SIZE
+#undef CONFIG_FASTBOOT_FLASH
#endif
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_CMD_BOOTD
#ifdef CONFIG_SPL_DFU_SUPPORT
#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
-#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_HASH_SUPPORT
#define DFU_ALT_INFO_RAM \
"dfu_alt_info_ram=" \
/*
* Default to using SPI for environment, etc.
- * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
- * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
- * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
- * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
+ * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
* 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
* 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
* 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL
/* MC firmware */
-#define CONFIG_SYS_LS_MC_FW_IN_NOR
-#define CONFIG_SYS_LS_MC_FW_ADDR 0x580200000ULL
-
#define CONFIG_SYS_LS_MC_DPL_IN_NOR
#define CONFIG_SYS_LS_MC_DPL_ADDR 0x5806C0000ULL
#define CONFIG_CONS_INDEX 1
#ifndef CONFIG_SOC_K2G
-#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
+#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6)
#else
-#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2
+#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2
#endif
/* SPI Configuration */
#define CONFIG_DAVINCI_SPI
-#define CONFIG_SYS_SPI_CLK clk_get_rate(KS2_CLK1_6)
+#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6)
#define CONFIG_SF_DEFAULT_SPEED 30000000
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#define CONFIG_SYS_SPI0
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
#ifndef CONFIG_SOC_K2G
-#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
+#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
#else
#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
#endif
* So moving TEXT_BASE down to non-HS limit.
*/
#define CONFIG_SPL_TEXT_BASE 0x40300000
-#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
#define CONFIG_SPL_TEXT_BASE 0x40300000
#endif
-#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
(128 << 20))
* Tunnel an I2C transfer to the EC
*
* @param dev CROS-EC device
+ * @param port The remote port on EC to use
* @param msg List of messages to transfer
* @param nmsgs Number of messages to transfer
*/
-int cros_ec_i2c_tunnel(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
+int cros_ec_i2c_tunnel(struct udevice *dev, int port, struct i2c_msg *msg,
+ int nmsgs);
#endif
* shifts the remaining entries to the front. Replacing an entry is a
* combination of deleting the old value and adding the new one.
*
- * The environment is preceeded by a 32 bit CRC over the data part.
+ * The environment is preceded by a 32 bit CRC over the data part.
*
- **************************************************************************
- */
+ *************************************************************************/
#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef CONFIG_ENV_ADDR
* 2 data record with 24-bit address
* 3 data record with 32-bit address
* 4 symbol record (LSI extension)
- * 5 number of data records in preceeding block
+ * 5 number of data records in preceding block
* 6 unused
* 7 ending record for S3 records
* 8 ending record for S2 records
* Copyright (C) 2010-2013 Wolfgang Denk <wd@denx.de>
*/
-#ifndef _SEARCH_H
-#define _SEARCH_H 1
+#ifndef _SEARCH_H_
+#define _SEARCH_H_
#include <stddef.h>
env_op_overwrite,
};
-/* Action which shall be performed in the call the hsearch. */
+/* Action which shall be performed in the call to hsearch. */
typedef enum {
FIND,
ENTER
/*
* Family of hash table handling functions. The functions also
* have reentrant counterparts ending with _r. The non-reentrant
- * functions all work on a signle internal hashing table.
+ * functions all work on a single internal hash table.
*/
/* Data type for reentrant functions. */
unsigned int filled;
/*
* Callback function which will check whether the given change for variable
- * "item" to "newval" may be applied or not, and possibly apply such change.
+ * "__item" to "newval" may be applied or not, and possibly apply such change.
* When (flag & H_FORCE) is set, it shall not print out any error message and
* shall force overwriting of write-once variables.
-.* Must return 0 for approval, 1 for denial.
+ * Must return 0 for approval, 1 for denial.
*/
int (*change_ok)(const ENTRY *__item, const char *newval, enum env_op,
int flag);
};
-/* Create a new hashing table which will at most contain NEL elements. */
+/* Create a new hash table which will contain at most "__nel" elements. */
extern int hcreate_r(size_t __nel, struct hsearch_data *__htab);
-/* Destroy current internal hashing table. */
+/* Destroy current internal hash table. */
extern void hdestroy_r(struct hsearch_data *__htab);
/*
- * Search for entry matching ITEM.key in internal hash table. If
+ * Search for entry matching __item.key in internal hash table. If
* ACTION is `FIND' return found entry or signal error by returning
* NULL. If ACTION is `ENTER' replace existing data (if any) with
- * ITEM.data.
+ * __item.data.
* */
extern int hsearch_r(ENTRY __item, ACTION __action, ENTRY ** __retval,
struct hsearch_data *__htab, int __flag);
/*
- * Search for an entry matching `MATCH'. Otherwise, Same semantics
+ * Search for an entry matching "__match". Otherwise, Same semantics
* as hsearch_r().
*/
extern int hmatch_r(const char *__match, int __last_idx, ENTRY ** __retval,
struct hsearch_data *__htab);
-/* Search and delete entry matching ITEM.key in internal hash table. */
+/* Search and delete entry matching "__key" in internal hash table. */
extern int hdelete_r(const char *__key, struct hsearch_data *__htab,
int __flag);
/*
* nvars: length of vars array
* vars: array of strings (variable names) to import (nvars == 0 means all)
- * do_apply: whether to call callback function to check the new argument,
- * and possibly apply changes (false means accept everything)
*/
extern int himport_r(struct hsearch_data *__htab,
const char *__env, size_t __size, const char __sep,
#define H_PROGRAMMATIC (1 << 9) /* indicate that an import is from setenv() */
#define H_ORIGIN_FLAGS (H_INTERACTIVE | H_PROGRAMMATIC)
-#endif /* search.h */
+#endif /* _SEARCH_H_ */
return flash->flash_unlock(flash, ofs, len);
}
-void spi_boot(void) __noreturn;
-void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
-
#endif /* _SPI_FLASH_H_ */
/**
* spl_load_simple_fit() - Loads a fit image from a device.
+ * @spl_image: Image description to set up
* @info: Structure containing the information required to load data.
* @sector: Sector number where FIT image is located in the device
* @fdt: Pointer to the copied FIT header.
* specified load address and copies the dtb to end of u-boot image.
* Returns 0 on success.
*/
-int spl_load_simple_fit(struct spl_load_info *info, ulong sector, void *fdt);
+int spl_load_simple_fit(struct spl_image_info *spl_image,
+ struct spl_load_info *info, ulong sector, void *fdt);
#define SPL_COPY_PAYLOAD_ONLY 1
-extern struct spl_image_info spl_image;
-
/* SPL common functions */
void preloader_console_init(void);
u32 spl_boot_device(void);
u32 spl_boot_mode(const u32 boot_device);
-void spl_set_header_raw_uboot(void);
-int spl_parse_image_header(const struct image_header *header);
-void spl_board_prepare_for_linux(void);
-void spl_board_prepare_for_boot(void);
-int spl_board_ubi_load_image(u32 boot_device);
-void __noreturn jump_to_image_linux(void *arg);
-int spl_start_uboot(void);
-void spl_display_print(void);
-/* NAND SPL functions */
-int spl_nand_load_image(void);
+/**
+ * spl_set_header_raw_uboot() - Set up a standard SPL image structure
+ *
+ * This sets up the given spl_image which the standard values obtained from
+ * config options: CONFIG_SYS_MONITOR_LEN, CONFIG_SYS_UBOOT_START,
+ * CONFIG_SYS_TEXT_BASE.
+ *
+ * @spl_image: Image description to set up
+ */
+void spl_set_header_raw_uboot(struct spl_image_info *spl_image);
-/* OneNAND SPL functions */
-int spl_onenand_load_image(void);
+/**
+ * spl_parse_image_header() - parse the image header and set up info
+ *
+ * This parses the legacy image header information at @header and sets up
+ * @spl_image according to what is found. If no image header is found, then
+ * a raw image or bootz is assumed. If CONFIG_SPL_PANIC_ON_RAW_IMAGE is
+ * enabled, then this causes a panic. If CONFIG_SPL_ABORT_ON_RAW_IMAGE is
+ * enabled then U-Boot gives up. Otherwise U-Boot sets up the image using
+ * spl_set_header_raw_uboot(), or possibly the bootz header.
+ *
+ * @spl_image: Image description to set up
+ * @header image header to parse
+ * @return 0 if a header was correctly parsed, -ve on error
+ */
+int spl_parse_image_header(struct spl_image_info *spl_image,
+ const struct image_header *header);
-/* NOR SPL functions */
-int spl_nor_load_image(void);
+void spl_board_prepare_for_linux(void);
+void spl_board_prepare_for_boot(void);
+int spl_board_ubi_load_image(u32 boot_device);
-/* UBI SPL functions */
-int spl_ubi_load_image(u32 boot_device);
+/**
+ * jump_to_image_linux() - Jump to a Linux kernel from SPL
+ *
+ * This jumps into a Linux kernel using the information in @spl_image.
+ *
+ * @spl_image: Image description to set up
+ * @arg: Argument to pass to Linux (typically a device tree pointer)
+ */
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image,
+ void *arg);
-/* MMC SPL functions */
-int spl_mmc_load_image(u32 boot_device);
+/**
+ * spl_start_uboot() - Check if SPL should start the kernel or U-Boot
+ *
+ * This is called by the various SPL loaders to determine whether the board
+ * wants to load the kernel or U-Boot. This function should be provided by
+ * the board.
+ *
+ * @return 0 if SPL should start the kernel, 1 if U-Boot must be started
+ */
+int spl_start_uboot(void);
-/* YMODEM SPL functions */
-int spl_ymodem_load_image(void);
+/**
+ * spl_display_print() - Display a board-specific message in SPL
+ *
+ * If CONFIG_SPL_DISPLAY_PRINT is enabled, U-Boot will call this function
+ * immediately after displaying the SPL console banner ("U-Boot SPL ...").
+ * This function should be provided by the board.
+ */
+void spl_display_print(void);
-/* SPI SPL functions */
-int spl_spi_load_image(void);
+/**
+ * struct spl_boot_device - Describes a boot device used by SPL
+ *
+ * @boot_device: A number indicating the BOOT_DEVICE type. There are various
+ * BOOT_DEVICE... #defines and enums in U-Boot and they are not consistently
+ * numbered.
+ * @boot_device_name: Named boot device, or NULL if none.
+ *
+ * Note: Additional fields can be added here, bearing in mind that SPL is
+ * size-sensitive and common fields will be present on all boards. This
+ * struct can also be used to return additional information about the load
+ * process if that becomes useful.
+ */
+struct spl_boot_device {
+ uint boot_device;
+ const char *boot_device_name;
+};
-/* Ethernet SPL functions */
-int spl_net_load_image(const char *device);
+/**
+ * Holds information about a way of loading an SPL image
+ *
+ * @boot_device: Boot device that this loader supports
+ * @load_image: Function to call to load image
+ */
+struct spl_image_loader {
+ uint boot_device;
+ /**
+ * load_image() - Load an SPL image
+ *
+ * @spl_image: place to put image information
+ * @bootdev: describes the boot device to load from
+ */
+ int (*load_image)(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev);
+};
-/* USB SPL functions */
-int spl_usb_load_image(void);
+/* Declare an SPL image loader */
+#define SPL_LOAD_IMAGE(__name) \
+ ll_entry_declare(struct spl_image_loader, __name, spl_image_loader)
-/* SATA SPL functions */
-int spl_sata_load_image(void);
+/*
+ * __priority is the priority of this method, 0 meaning it will be the top
+ * choice for this device, 9 meaning it is the bottom choice.
+ * __boot_device is the BOOT_DEVICE_... value
+ * __method is the load_image function to call
+ */
+#define SPL_LOAD_IMAGE_METHOD(__priority, __boot_device, __method) \
+ SPL_LOAD_IMAGE(__method ## __priority ## __boot_device) = { \
+ .boot_device = __boot_device, \
+ .load_image = __method, \
+ }
/* SPL FAT image functions */
-int spl_load_image_fat(struct blk_desc *block_dev, int partition,
+int spl_load_image_fat(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition,
const char *filename);
-int spl_load_image_fat_os(struct blk_desc *block_dev, int partition);
+int spl_load_image_fat_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition);
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image);
/* SPL EXT image functions */
-int spl_load_image_ext(struct blk_desc *block_dev, int partition,
+int spl_load_image_ext(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition,
const char *filename);
-int spl_load_image_ext_os(struct blk_desc *block_dev, int partition);
+int spl_load_image_ext_os(struct spl_image_info *spl_image,
+ struct blk_desc *block_dev, int partition);
/**
* spl_init() - Set up device tree and driver model in SPL if enabled
* @return 0 on success, otherwise error code
*/
int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr);
+
#endif
obj-$(CONFIG_$(SPL_)SHA1) += sha1.o
obj-$(CONFIG_$(SPL_)SHA256) += sha256.o
+obj-$(CONFIG_SPL_SAVEENV) += qsort.o
obj-$(CONFIG_$(SPL_)OF_LIBFDT) += libfdt/
ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_SPL_OF_PLATDATA),yy)
obj-$(CONFIG_$(SPL_)OF_CONTROL) += fdtdec_common.o
exit_data_size, exit_data);
loaded_image_info->exit_status = exit_status;
- longjmp(&loaded_image_info->exit_jmp);
+ longjmp(&loaded_image_info->exit_jmp, 1);
panic("EFI application exited");
}
#include <console.h>
#include <image.h>
#include <malloc.h>
+#include <memalign.h>
#include <u-boot/zlib.h>
#include <div64.h>
s.next_in = src + i;
s.avail_in = payload_size+8;
- writebuf = (unsigned char *)malloc(szwritebuf);
+ writebuf = (unsigned char *)malloc_cache_aligned(szwritebuf);
/* decompress until deflate stream ends or end of file */
do {
return 1;
}
+#if !(defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_SAVEENV))
/*
* hexport()
*/
-#ifndef CONFIG_SPL_BUILD
/*
* Export the data stored in the hash table in linearized form.
*
*
* If the separator character is different from NUL, then any
* separator characters and backslash characters in the values will
- * be escaped by a preceeding backslash in output. This is needed for
+ * be escaped by a preceding backslash in output. This is needed for
* example to enable multi-line values, especially when the output
* shall later be parsed (for example, for re-import).
*
-MQ include/config/auto.conf $(srctree)/include/common.h > $@ || { \
rm $@; false; \
}
-include/autoconf.mk.dep: FORCE
+include/autoconf.mk.dep: include/config.h FORCE
$(call cmd,autoconf_dep)
# We are migrating from board headers to Kconfig little by little.
# same CONFIG macros
quiet_cmd_autoconf = GEN $@
cmd_autoconf = \
- $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \
- sed -n -f $(srctree)/tools/scripts/define2mk.sed $@.tmp | \
+ sed -n -f $(srctree)/tools/scripts/define2mk.sed $< | \
while read line; do \
if [ -n "${KCONFIG_IGNORE_DUPLICATES}" ] || \
! grep -q "$${line%=*}=" include/config/auto.conf; then \
echo "$$line"; \
fi \
- done > $@; \
- rm $@.tmp; \
- } || { \
- rm $@.tmp; false; \
+ done > $@
+
+quiet_cmd_u_boot_cfg = CFG $@
+ cmd_u_boot_cfg = \
+ $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \
+ grep 'define CONFIG_' $@.tmp > $@; \
+ rm $@.tmp; \
+ } || { \
+ rm $@.tmp; false; \
}
-include/autoconf.mk: FORCE
- $(call cmd,autoconf)
+u-boot.cfg: include/config.h FORCE
+ $(call cmd,u_boot_cfg)
-spl/include/autoconf.mk: FORCE
+spl/u-boot.cfg: include/config.h FORCE
$(Q)mkdir -p $(dir $@)
- $(call cmd,autoconf,-DCONFIG_SPL_BUILD)
+ $(call cmd,u_boot_cfg,-DCONFIG_SPL_BUILD)
-tpl/include/autoconf.mk: FORCE
+tpl/u-boot.cfg: include/config.h FORCE
$(Q)mkdir -p $(dir $@)
- $(call cmd,autoconf,-DCONFIG_SPL_BUILD -DCONFIG_TPL_BUILD)
+ $(call cmd,u_boot_cfg,-DCONFIG_SPL_BUILD -DCONFIG_TPL_BUILD)
+
+include/autoconf.mk: u-boot.cfg
+ $(call cmd,autoconf)
-include/autoconf.mk include/autoconf.mk.dep \
- spl/include/autoconf.mk tpl/include/autoconf.mk: include/config.h
+spl/include/autoconf.mk: spl/u-boot.cfg
+ $(Q)mkdir -p $(dir $@)
+ $(call cmd,autoconf)
+
+tpl/include/autoconf.mk: tpl/u-boot.cfg
+ $(Q)mkdir -p $(dir $@)
+ $(call cmd,autoconf)
# include/config.h
# Prior to Kconfig, it was generated by mkconfig. Now it is created here.
$(call if_changed,mkimage)
endif
-ALL-y += $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).cfg
+ALL-y += $(obj)/$(SPL_BIN).bin
ifdef CONFIG_SAMSUNG
ALL-y += $(obj)/$(BOARD)-spl.bin
$(obj)/$(SPL_BIN).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE
$(call if_changed,fdtgrep)
-quiet_cmd_cpp_cfg = CFG $@
-cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \
- -DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $<
-
-# If .u-boot.cfg.d is still present, then either:
-# a) The previous build used a Makefile that used if_changed rather than
-# if_changed_dep when building u-boot.cfg, and hence any later builds will
-# be unaware of the dependencies for u-boot.cfg. In this case, we must
-# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the
-# correct way.
-# b) The previous build failed or was interrupted while building u-boot.cfg,
-# so deleting u-boot.cfg isn't going to cause any additional work.
-ifneq ($(wildcard $(obj)/.$(SPL_BIN).d),)
- unused := $(shell rm -f $(obj)/$(SPL_BIN).cfg)
-endif
-$(obj)/$(SPL_BIN).cfg: include/config.h FORCE
- $(call if_changed_dep,cpp_cfg)
-
pythonpath = PYTHONPATH=tools
quiet_cmd_dtocc = DTOC C $@
# Use only the options that are present in the first file but not the second.
comm -23 scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2 \
- |sort |uniq >scripts/config_whitelist.txt
-rm scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2
+ |sort |uniq >scripts/config_whitelist.txt.tmp3
+
+# If scripts/config_whitelist.txt already exists, take the intersection of the
+# current list and the new one. We do not want to increase whitelist options.
+if [ -r scripts/config_whitelist.txt ]; then
+ comm -12 scripts/config_whitelist.txt.tmp3 scripts/config_whitelist.txt \
+ > scripts/config_whitelist.txt.tmp4
+ mv scripts/config_whitelist.txt.tmp4 scripts/config_whitelist.txt
+else
+ mv scripts/config_whitelist.txt.tmp3 scripts/config_whitelist.txt
+fi
+
+rm scripts/config_whitelist.txt.tmp*
unset LC_ALL LC_COLLATE
# Check that the u-boot.cfg file provided does not introduce any new
# ad-hoc CONFIG options
#
-# You can generate the list of current ad-hoc CONFIG options (those which are
-# not in Kconfig) with this command:
-#
-# export LC_ALL=C LC_COLLATE=C
-# git grep CONFIG_ |tr ' \t' '\n\n' |sed -n 's/^\(CONFIG_[A-Z0-9_]*\).*/\1/p' \
-# |sort |uniq >scripts/config_whitelist.txt;
-# unset LC_ALL LC_COLLATE
+# Use scripts/build-whitelist.sh to generate the list of current ad-hoc
+# CONFIG options (those which are not in Kconfig).
# Usage
# check-config.sh <path to u-boot.cfg> <path to whitelist file> <source dir>
}
}
-# check for case / default statements not preceeded by break/fallthrough/switch
+# check for case / default statements not preceded by break/fallthrough/switch
if ($line =~ /^.\s*(?:case\s+(?:$Ident|$Constant)\s*|default):/) {
my $has_break = 0;
my $has_statement = 0;
}
if (!$has_break && $has_statement) {
WARN("MISSING_BREAK",
- "Possible switch case/default not preceeded by break or fallthrough comment\n" . $herecurr);
+ "Possible switch case/default not preceded by break or fallthrough comment\n" . $herecurr);
}
}
-CONFIG_
CONFIG_16BIT
CONFIG_33
CONFIG_400MHZ_MODE
CONFIG_DNET_AUTONEG_TIMEOUT
CONFIG_DNP5370_EXT_WD_DISABLE
CONFIG_DOS_PARTITION
-CONFIG_DPLL_SSC_RATE_1PER
CONFIG_DP_DDR_CTRL
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
CONFIG_DP_DDR_NUM_CTRLS
CONFIG_FMAN_ENET
CONFIG_FM_PLAT_CLK_DIV
CONFIG_FO300
-CONFIG_FOO
CONFIG_FORCE_DDR_DATA_BUS_WIDTH_32
CONFIG_FORMIKE
-CONFIG_FPGA
CONFIG_FPGA_ALTERA
CONFIG_FPGA_COUNT
CONFIG_FPGA_CYCLON2
CONFIG_FPGA_SPARTAN2
CONFIG_FPGA_SPARTAN3
CONFIG_FPGA_STRATIX_V
-CONFIG_FPGA_XILINX
CONFIG_FPGA_ZYNQPL
CONFIG_FSLDMAFEC
CONFIG_FSL_CADMUS
CONFIG_ICACHE_OFF
CONFIG_ICON
CONFIG_ICS307_REFCLK_HZ
-CONFIG_IDENT_STRING
CONFIG_IDE_8xx_DIRECT
CONFIG_IDE_8xx_PCCARD
CONFIG_IDE_INIT_POSTRESET
CONFIG_IRDA_BASE
CONFIG_ISO_PARTITION
CONFIG_ISP1362_USB
-CONFIG_IS_
CONFIG_IS_BUILTIN
CONFIG_IS_ENABLED
CONFIG_IS_INVALID
CONFIG_SC_TIMER_CLK
CONFIG_SDCARD
CONFIG_SDHCI
-CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT
-CONFIG_SDHCI_CMD_MAX_TIMEOUT
CONFIG_SDRAM_BANK0
CONFIG_SDRAM_BANK1
CONFIG_SDRAM_ECC
CONFIG_SPL_BOOT_DEVICE
CONFIG_SPL_BSS_MAX_SIZE
CONFIG_SPL_BSS_START_ADDR
-CONFIG_SPL_BUILD
CONFIG_SPL_CMT
CONFIG_SPL_CMT_DEBUG
CONFIG_SPL_COMMON_INIT_DDR
CONFIG_SPL_DISPLAY_PRINT
CONFIG_SPL_ETH_DEVICE
CONFIG_SPL_FLUSH_IMAGE
-CONFIG_SPL_FOO
CONFIG_SPL_FRAMEWORK
CONFIG_SPL_FSL_PBL
CONFIG_SPL_FS_LOAD_ARGS_NAME
CONFIG_SYS_XLB_PIPELINING
CONFIG_SYS_XSVF_DEFAULT_ADDR
CONFIG_SYS_XWAY_EBU_BOOTCFG
-CONFIG_SYS_XXX
CONFIG_SYS_ZYNQ_QSPI_WAIT
CONFIG_SYS_ZYNQ_SPI_WAIT
CONFIG_SYS_i2C_FSL
CONFIG_TMU_CMD_DTT
CONFIG_TMU_TIMER
CONFIG_TOTAL5200
-CONFIG_TPL_BUILD
CONFIG_TPL_DRIVERS_MISC_SUPPORT
CONFIG_TPL_PAD_TO
CONFIG_TPM_TIS_BASE_ADDRESS
CONFIG_ZYNQ_SDHCI_MIN_FREQ
CONFIG_ZYNQ_SERIAL
CONFIG_eTSEC_MDIO_BUS
-CONFIG_n
-CONFIG_prefix
-CONFIG_xxx
--- /dev/null
+#! /bin/bash
+#
+# Copyright (C) 2016, Lukasz Majewski <l.majewski@majess.pl>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+# This file extracts default envs from built u-boot
+# usage: get_default_envs.sh > u-boot-env-default.txt
+set -ue
+
+ENV_OBJ_FILE="env_common.o"
+ENV_OBJ_FILE_COPY="copy_${ENV_OBJ_FILE}"
+
+echoerr() { echo "$@" 1>&2; }
+
+path=$(readlink -f $0)
+env_obj_file_path=$(find ${path%/scripts*} -not -path "*/spl/*" \
+ -name "${ENV_OBJ_FILE}")
+[ -z "${env_obj_file_path}" ] && \
+ { echoerr "File '${ENV_OBJ_FILE}' not found!"; exit 1; }
+
+cp ${env_obj_file_path} ${ENV_OBJ_FILE_COPY}
+
+# NOTE: objcopy saves its output to file passed in
+# (copy_env_common.o in this case)
+objcopy -O binary -j ".rodata.default_environment" ${ENV_OBJ_FILE_COPY}
+
+# Replace default '\0' with '\n' and sort entries
+tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort -u
+
+rm ${ENV_OBJ_FILE_COPY}
+
+exit 0
return ret;
}
+/**
+ * environment_end() - compute offset of first byte right after environemnt
+ * @dev - index of enviroment buffer
+ * Return:
+ * device offset of first byte right after environemnt
+ */
+off_t environment_end(int dev)
+{
+ /* environment is block aligned */
+ return DEVOFFSET(dev) + ENVSECTORS(dev) * DEVESIZE(dev);
+}
+
/*
* Test for bad block on NAND, just returns 0 on NOR, on NAND:
* 0 - block is good
* > 0 - block is bad
* < 0 - failed to test
*/
-static int flash_bad_block (int fd, uint8_t mtd_type, loff_t *blockstart)
+static int flash_bad_block(int fd, uint8_t mtd_type, loff_t blockstart)
{
if (mtd_type == MTD_NANDFLASH) {
- int badblock = ioctl (fd, MEMGETBADBLOCK, blockstart);
+ int badblock = ioctl(fd, MEMGETBADBLOCK, &blockstart);
if (badblock < 0) {
perror ("Cannot read bad block mark");
if (badblock) {
#ifdef DEBUG
fprintf (stderr, "Bad block at 0x%llx, skipping\n",
- (unsigned long long) *blockstart);
+ (unsigned long long)blockstart);
#endif
return badblock;
}
* the DEVOFFSET (dev) block. On NOR the loop is only run once.
*/
static int flash_read_buf (int dev, int fd, void *buf, size_t count,
- off_t offset, uint8_t mtd_type)
+ off_t offset)
{
size_t blocklen; /* erase / write length - one block on NAND,
0 on NOR */
size_t processed = 0; /* progress counter */
size_t readlen = count; /* current read length */
- off_t top_of_range; /* end of the last block we may use */
off_t block_seek; /* offset inside the current block to the start
of the data */
loff_t blockstart; /* running start of the current block -
/* Offset inside a block */
block_seek = offset - blockstart;
- if (mtd_type == MTD_NANDFLASH) {
+ if (DEVTYPE(dev) == MTD_NANDFLASH) {
/*
* NAND: calculate which blocks we are reading. We have
* to read one block at a time to skip bad blocks.
*/
blocklen = DEVESIZE (dev);
- /*
- * To calculate the top of the range, we have to use the
- * global DEVOFFSET (dev), which can be different from offset
- */
- top_of_range = ((DEVOFFSET(dev) / blocklen) +
- ENVSECTORS (dev)) * blocklen;
-
/* Limit to one block for the first read */
if (readlen > blocklen - block_seek)
readlen = blocklen - block_seek;
} else {
blocklen = 0;
- top_of_range = offset + count;
}
/* This only runs once on NOR flash */
while (processed < count) {
- rc = flash_bad_block (fd, mtd_type, &blockstart);
+ rc = flash_bad_block(fd, DEVTYPE(dev), blockstart);
if (rc < 0) /* block test failed */
return -1;
- if (blockstart + block_seek + readlen > top_of_range) {
+ if (blockstart + block_seek + readlen > environment_end(dev)) {
/* End of range is reached */
fprintf (stderr,
"Too few good blocks within range\n");
}
/*
- * Write count bytes at offset, but stay within ENVSECTORS (dev) sectors of
+ * Write count bytes from begin of environment, but stay within
+ * ENVSECTORS(dev) sectors of
* DEVOFFSET (dev). Similar to the read case above, on NOR and dataflash we
* erase and write the whole data at once.
*/
-static int flash_write_buf (int dev, int fd, void *buf, size_t count,
- off_t offset, uint8_t mtd_type)
+static int flash_write_buf(int dev, int fd, void *buf, size_t count)
{
void *data;
struct erase_info_user erase;
below offset */
off_t block_seek; /* offset inside the erase block to the start
of the data */
- off_t top_of_range; /* end of the last block we may use */
loff_t blockstart; /* running start of the current block -
MEMGETBADBLOCK needs 64 bits */
int rc;
/*
* For mtd devices only offset and size of the environment do matter
*/
- if (mtd_type == MTD_ABSENT) {
+ if (DEVTYPE(dev) == MTD_ABSENT) {
blocklen = count;
- top_of_range = offset + count;
erase_len = blocklen;
- blockstart = offset;
+ blockstart = DEVOFFSET(dev);
block_seek = 0;
write_total = blocklen;
} else {
blocklen = DEVESIZE(dev);
- top_of_range = ((DEVOFFSET(dev) / blocklen) +
- ENVSECTORS(dev)) * blocklen;
-
- erase_offset = (offset / blocklen) * blocklen;
+ erase_offset = DEVOFFSET(dev);
/* Maximum area we may use */
- erase_len = top_of_range - erase_offset;
+ erase_len = environment_end(dev) - erase_offset;
blockstart = erase_offset;
+
/* Offset inside a block */
- block_seek = offset - erase_offset;
+ block_seek = DEVOFFSET(dev) - erase_offset;
/*
* Data size we actually write: from the start of the block
return -1;
}
- rc = flash_read_buf (dev, fd, data, write_total, erase_offset,
- mtd_type);
+ rc = flash_read_buf(dev, fd, data, write_total, erase_offset);
if (write_total != rc)
return -1;
data = buf;
}
- if (mtd_type == MTD_NANDFLASH) {
+ if (DEVTYPE(dev) == MTD_NANDFLASH) {
/*
* NAND: calculate which blocks we are writing. We have
* to write one block at a time to skip bad blocks.
/* This only runs once on NOR flash and SPI-dataflash */
while (processed < write_total) {
- rc = flash_bad_block (fd, mtd_type, &blockstart);
+ rc = flash_bad_block(fd, DEVTYPE(dev), blockstart);
if (rc < 0) /* block test failed */
return rc;
- if (blockstart + erasesize > top_of_range) {
+ if (blockstart + erasesize > environment_end(dev)) {
fprintf (stderr, "End of range reached, aborting\n");
return -1;
}
continue;
}
- if (mtd_type != MTD_ABSENT) {
+ if (DEVTYPE(dev) != MTD_ABSENT) {
erase.start = blockstart;
ioctl(fd, MEMUNLOCK, &erase);
/* These do not need an explicit erase cycle */
- if (mtd_type != MTD_DATAFLASH)
+ if (DEVTYPE(dev) != MTD_DATAFLASH)
if (ioctl(fd, MEMERASE, &erase) != 0) {
fprintf(stderr,
"MTD erase error on %s: %s\n",
return -1;
}
- if (mtd_type != MTD_ABSENT)
+ if (DEVTYPE(dev) != MTD_ABSENT)
ioctl(fd, MEMLOCK, &erase);
processed += erasesize;
#endif
rc = flash_write_buf(dev_target, fd_target, environment.image,
- CUR_ENVSIZE, DEVOFFSET(dev_target),
- DEVTYPE(dev_target));
+ CUR_ENVSIZE);
if (rc < 0)
return rc;
int rc;
rc = flash_read_buf(dev_current, fd, environment.image, CUR_ENVSIZE,
- DEVOFFSET(dev_current), DEVTYPE(dev_current));
+ DEVOFFSET(dev_current));
if (rc != CUR_ENVSIZE)
return -1;
#endif
int aes_flag; /* Is AES encryption used? */
uint8_t aes_key[AES_KEY_LENGTH];
+ char *lockname;
};
int parse_aes_key(char *key, uint8_t *bin_key);
{"help", no_argument, NULL, 'h'},
{"script", required_argument, NULL, 's'},
{"noheader", required_argument, NULL, 'n'},
+ {"lock", required_argument, NULL, 'l'},
{NULL, 0, NULL, 0}
};
" -c, --config configuration file, default:" CONFIG_FILE "\n"
#endif
" -n, --noheader do not repeat variable name in output\n"
+ " -l, --lock lock node, default:/var/lock\n"
"\n");
}
#ifdef CONFIG_FILE
" -c, --config configuration file, default:" CONFIG_FILE "\n"
#endif
+ " -l, --lock lock node, default:/var/lock\n"
" -s, --script batch mode to minimize writes\n"
"\n"
"Examples:\n"
env_opts.config_file = CONFIG_FILE;
#endif
- while ((c = getopt_long(argc, argv, ":a:c:h", long_options, NULL)) !=
+ while ((c = getopt_long(argc, argv, ":a:c:l:h", long_options, NULL)) !=
EOF) {
switch (c) {
case 'a':
env_opts.config_file = optarg;
break;
#endif
+ case 'l':
+ env_opts.lockname = optarg;
+ break;
case 'h':
do_printenv ? usage_printenv() : usage_setenv();
exit(EXIT_SUCCESS);
parse_common_args(argc, argv);
- while ((c = getopt_long(argc, argv, "a:c:ns:h", long_options, NULL)) !=
- EOF) {
+ while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+ != EOF) {
switch (c) {
case 'n':
noheader = 1;
case 'a':
case 'c':
case 'h':
+ case 'l':
/* ignore common options */
break;
default: /* '?' */
parse_common_args(argc, argv);
- while ((c = getopt_long(argc, argv, "a:c:ns:h", long_options, NULL)) !=
- EOF) {
+ while ((c = getopt_long(argc, argv, "a:c:ns:l:h", long_options, NULL))
+ != EOF) {
switch (c) {
case 's':
script_file = optarg;
case 'a':
case 'c':
case 'h':
+ case 'l':
/* ignore common options */
break;
default: /* '?' */
int main(int argc, char *argv[])
{
- const char *lockname = "/var/lock/" CMD_PRINTENV ".lock";
+ char *lockname = "/var/lock/" CMD_PRINTENV ".lock";
int lockfd = -1;
int retval = EXIT_SUCCESS;
char *_cmdname;
argc -= optind;
argv += optind;
+ if (env_opts.lockname) {
+ lockname = malloc(sizeof(env_opts.lockname) +
+ sizeof(CMD_PRINTENV) + 10);
+ if (!lockname) {
+ fprintf(stderr, "Unable allocate memory");
+ exit(EXIT_FAILURE);
+ }
+
+ sprintf(lockname, "%s/%s.lock",
+ env_opts.lockname, CMD_PRINTENV);
+ }
+
lockfd = open(lockname, O_WRONLY | O_CREAT | O_TRUNC, 0666);
if (-1 == lockfd) {
fprintf(stderr, "Error opening lock file %s\n", lockname);
}
}
+ if (env_opts.lockname)
+ free(lockname);
+
flock(lockfd, LOCK_UN);
close(lockfd);
return retval;
* The output of this function may or may not be a valid FDT. To ensure it
* is, these disp->flags must be set:
*
- * FDT_REG_SUPERNODES: ensures that subnodes are preceeded by their
+ * FDT_REG_SUPERNODES: ensures that subnodes are preceded by their
* parents. Without this option, fragments of subnode data may be
* output without the supernodes above them. This is useful for
* hashing but cannot produce a valid FDT.
projects / u-boot / commitdiff