]> git.sur5r.net Git - u-boot/commitdiff
ARM: Add register defines for am33xx ePWM registers
authortomas.melin@vaisala.com <tomas.melin@vaisala.com>
Fri, 16 Sep 2016 10:21:39 +0000 (10:21 +0000)
committerTom Rini <trini@konsulko.com>
Fri, 7 Oct 2016 01:00:53 +0000 (21:00 -0400)
Register definitions needed for configuring the
ePWM module.

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
arch/arm/include/asm/arch-am33xx/cpu.h
arch/arm/include/asm/arch-am33xx/hardware_am33xx.h

index 62bca8cc17455eb0c294f99c4b1da87ddddd9dee..1cc486d24e776553859d8163ac260de85df177d3 100644 (file)
@@ -579,6 +579,8 @@ struct pwmss_regs {
 };
 #define ECAP_CLK_EN            BIT(0)
 #define ECAP_CLK_STOP_REQ      BIT(1)
+#define EPWM_CLK_EN            BIT(8)
+#define EPWM_CLK_STOP_REQ      BIT(9)
 
 struct pwmss_ecap_regs {
        unsigned int tsctr;
@@ -592,6 +594,40 @@ struct pwmss_ecap_regs {
        unsigned short ecctl2;
 };
 
+struct pwmss_epwm_regs {
+       unsigned short tbctl;
+       unsigned short tbsts;
+       unsigned short tbphshr;
+       unsigned short tbphs;
+       unsigned short tbcnt;
+       unsigned short tbprd;
+       unsigned short res1;
+       unsigned short cmpctl;
+       unsigned short cmpahr;
+       unsigned short cmpa;
+       unsigned short cmpb;
+       unsigned short aqctla;
+       unsigned short aqctlb;
+       unsigned short aqsfrc;
+       unsigned short aqcsfrc;
+       unsigned short dbctl;
+       unsigned short dbred;
+       unsigned short dbfed;
+       unsigned short tzsel;
+       unsigned short tzctl;
+       unsigned short tzflg;
+       unsigned short tzclr;
+       unsigned short tzfrc;
+       unsigned short etsel;
+       unsigned short etps;
+       unsigned short etflg;
+       unsigned short etclr;
+       unsigned short etfrc;
+       unsigned short pcctl;
+       unsigned int res2[66];
+       unsigned short hrcnfg;
+};
+
 /* Capture Control register 2 */
 #define ECTRL2_SYNCOSEL_MASK   (0x03 << 6)
 #define ECTRL2_MDSL_ECAP       BIT(9)
index d1aed58503fcd8ccb8ff313168650e31e0f188fd..fa9b84f95b4deca64b56e24654e976ab536d7765 100644 (file)
@@ -67,5 +67,6 @@
 /* PWMSS */
 #define PWMSS0_BASE                    0x48300000
 #define AM33XX_ECAP0_BASE              0x48300100
+#define AM33XX_EPWM_BASE               0x48300200
 
 #endif /* __AM33XX_HARDWARE_AM33XX_H */