#include <asm/arch/usb_phy.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <nand.h>
 #include <net.h>
 
 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
        setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0));
        setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1);
 }
+
+void board_nand_init(void)
+{
+       nand_pinmux_setup();
+       nand_clock_setup();
+}
 #endif
 
 #ifdef CONFIG_GENERIC_MMC
        power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT);
 #endif
 
-#ifdef CONFIG_SPL_NAND_SUNXI
-       nand_pinmux_setup();
-       nand_clock_setup();
-#endif
-
        printf("DRAM:");
        ramsize = sunxi_dram_init();
        printf(" %lu MiB\n", ramsize >> 20);
 
 config SPL_NAND_SUNXI
        bool "Support for NAND on Allwinner A20 in SPL"
        depends on MACH_SUN7I
+       select SYS_NAND_SELF_INIT
        ---help---
        Enable support for NAND. This option allows SPL to read from
        sunxi NAND using DMA transfers.