]> git.sur5r.net Git - u-boot/commitdiff
x86: ivybridge: Probe the LPC in CPU init
authorSimon Glass <sjg@chromium.org>
Sun, 17 Jan 2016 23:11:19 +0000 (16:11 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 24 Jan 2016 04:08:16 +0000 (12:08 +0800)
We can drop the explicit probe of the PCH since the LPC is a child device
and this will happen automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/cpu/ivybridge/cpu.c

index f32b4a18e12d730f0ebc1c2353e3132776066fe6..65eea1f9eec586deb8897f4d3d0b1639ddf202ac 100644 (file)
@@ -212,7 +212,7 @@ int print_cpuinfo(void)
 {
        enum pei_boot_mode_t boot_mode = PEI_BOOT_NONE;
        char processor_name[CPU_MAX_NAME_LEN];
-       struct udevice *dev;
+       struct udevice *dev, *lpc;
        const char *name;
        uint32_t pm1_cnt;
        uint16_t pm1_sts;
@@ -245,12 +245,11 @@ int print_cpuinfo(void)
        /* Early chipset init required before RAM init can work */
        uclass_first_device(UCLASS_NORTHBRIDGE, &dev);
 
-       ret = uclass_first_device(UCLASS_PCH, &dev);
+       ret = uclass_first_device(UCLASS_LPC, &lpc);
        if (ret)
                return ret;
        if (!dev)
                return -ENODEV;
-
        sandybridge_early_init(SANDYBRIDGE_MOBILE);
 
        /* Check PM1_STS[15] to see if we are waking from Sx */