kirkwood: define CONFIG_SYS_CACHELINE_SIZE

By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/include/asm/arch-kirkwood/config.h
index f17f82d3f4d4535db909a5e1e4f431eb234dc308..d1c199825fd36a6415168b32d00a314a7482c2be 100644 (file)
--- a/arch/arm/include/asm/arch-kirkwood/config.h
+++ b/arch/arm/include/asm/arch-kirkwood/config.h
@@ -41,7 +41,8 @@
 
 #include <asm/arch/kirkwood.h>
 #define CONFIG_ARM926EJS       1       /* Basic Architecture */
-
+#define CONFIG_SYS_CACHELINE_SIZE      32
+                               /* default Dcache Line length for kirkwood */
 #define CONFIG_MD5     /* get_random_hex on krikwood needs MD5 support */
 #define CONFIG_KIRKWOOD_EGIGA_INIT     /* Enable GbePort0/1 for kernel */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */