]> git.sur5r.net Git - u-boot/commitdiff
ARM: tegra: add function to clear pinmux CLAMPING bit
authorStephen Warren <swarren@nvidia.com>
Wed, 18 Feb 2015 20:27:03 +0000 (13:27 -0700)
committerTom Warren <twarren@nvidia.com>
Wed, 4 Mar 2015 17:08:57 +0000 (10:08 -0700)
This is needed to correctly apply the new Jetson TK1 pinmux config.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/include/asm/arch-tegra/pinmux.h
arch/arm/mach-tegra/pinmux-common.c

index da477697bf029513db8fe4a605a8fc46c54ae3d9..ab764960fa7faf82ace592a55734fadcdd77d66a 100644 (file)
@@ -81,8 +81,9 @@ struct pmux_pingrp_config {
 };
 
 #if !defined(CONFIG_TEGRA20) && !defined(CONFIG_TEGRA30)
-/* Set the pinmux CLAMP_INPUTS_WHEN_TRISTATED bit */
+/* Set/clear the pinmux CLAMP_INPUTS_WHEN_TRISTATED bit */
 void pinmux_set_tristate_input_clamping(void);
+void pinmux_clear_tristate_input_clamping(void);
 #endif
 
 /* Set the mux function for a pin group */
index 6e3ab0c14ca2b477451d1b8b0bd7004938daff00..64baed45d591e9c06d55c0b76eef0d8505f0ba09 100644 (file)
 void pinmux_set_tristate_input_clamping(void)
 {
        u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0);
-       u32 val;
 
-       val = readl(reg);
-       val |= CLAMP_INPUTS_WHEN_TRISTATED;
-       writel(val, reg);
+       setbits_le32(reg, CLAMP_INPUTS_WHEN_TRISTATED);
+}
+
+void pinmux_clear_tristate_input_clamping(void)
+{
+       u32 *reg = _R(APB_MISC_PP_PINMUX_GLOBAL_0);
+
+       clrbits_le32(reg, CLAMP_INPUTS_WHEN_TRISTATED);
 }
 #endif