This define is used by the DDR training code for Armada XP. With the
upcoming addition of Armada 38x support, lets only define it for
Armada XP in this common header.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
/*
* This file should be included in board config header file.
*
- * It supports common definitions for Armada XP platforms
+ * It supports common definitions for MVEBU platforms
*/
#ifndef _MVEBU_CONFIG_H
#include <asm/arch/soc.h>
+#if defined(CONFIG_ARMADA_XP)
#define MV88F78X60 /* for the DDR training bin_hdr code */
+#endif
#define CONFIG_SYS_CACHELINE_SIZE 32