#include <asm/arch/mem.h>
 #include <asm/arch/omap_gpmc.h>
 #include <linux/mtd/nand_ecc.h>
+#include <linux/compiler.h>
 #include <nand.h>
 
 static uint8_t cs;
-static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
+static __maybe_unused struct nand_ecclayout hw_nand_oob =
+       GPMC_NAND_HW_ECC_LAYOUT;
 
 /*
  * omap_nand_hwcontrol - Set the address pointers corretly for the
  * @mtd:        MTD device structure
  *
  */
-static void omap_hwecc_init(struct nand_chip *chip)
+static void __maybe_unused omap_hwecc_init(struct nand_chip *chip)
 {
        /*
         * Init ECC Control Register
  *
  * @return 0 if data is OK or corrected, else returns -1
  */
-static int omap_correct_data(struct mtd_info *mtd, uint8_t *dat,
+static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat,
                                uint8_t *read_ecc, uint8_t *calc_ecc)
 {
        uint32_t orig_ecc, new_ecc, res, hm;
  *  @dat:      unused
  *  @ecc_code: ecc_code buffer
  */
-static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat,
-                               uint8_t *ecc_code)
+static int __maybe_unused omap_calculate_ecc(struct mtd_info *mtd,
+               const uint8_t *dat, uint8_t *ecc_code)
 {
        u_int32_t val;
 
  * @mtd:        MTD device structure
  * @mode:       Read/Write mode
  */
-static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
+static void __maybe_unused omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
 {
        struct nand_chip *chip = mtd->priv;
        uint32_t val, dev_width = (chip->options & NAND_BUSWIDTH_16) >> 1;