sunxi: Add sun5i support

Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner
sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based
boards.

The only differences compared to the already supported sun4i and sun7i
families are all in the DRAM controller initialization:

-Different hcpr values
-Different MBUS settings
-Some other small initialization changes

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Oliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index 856d3535281307365a32bdf98be6c627a541c7a5..6c706393d39005d8fc8f82e8e30b17dc97c4eca5 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -12,6 +12,7 @@ obj-y += board.o
 obj-y  += clock.o
 obj-y  += pinmux.o
 obj-$(CONFIG_SUN4I)    += clock_sun4i.o
+obj-$(CONFIG_SUN5I)    += clock_sun4i.o
 obj-$(CONFIG_SUN7I)    += clock_sun4i.o
 
 ifndef CONFIG_SPL_BUILD
@@ -20,6 +21,7 @@ endif
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SUN4I)    += dram.o
+obj-$(CONFIG_SUN5I)    += dram.o
 obj-$(CONFIG_SUN7I)    += dram.o
 ifdef CONFIG_SPL_FEL
 obj-y  += start.o

diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index c80b42121c29c2b5e3c905b1509405c86e67a4f9..0118f5b418447843b3522a2438ed4b3c497ad60b 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -47,9 +47,21 @@ u32 spl_boot_mode(void)
 
 int gpio_init(void)
 {
+#if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
        sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
        sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
        sunxi_gpio_set_pull(SUNXI_GPB(23), 1);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_SUN5I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN5I_GPB19_UART0_TX);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN5I_GPB20_UART0_RX);
+       sunxi_gpio_set_pull(SUNXI_GPB(20), 1);
+#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_SUN5I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX);
+       sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX);
+       sunxi_gpio_set_pull(SUNXI_GPG(4), 1);
+#else
+#error Unsupported console port number. Please fix pin mux settings in board.c
+#endif
 
        return 0;
 }

diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index b4b5089fec3d0fb5a4928b3f673549f704b4a45f..5cf35acc1e60127df04bc9b2c178ed5f46d8671c 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -15,6 +15,14 @@ int print_cpuinfo(void)
 {
 #ifdef CONFIG_SUN4I
        puts("CPU:   Allwinner A10 (SUN4I)\n");
+#elif defined CONFIG_SUN5I
+       u32 val = readl(SUNXI_SID_BASE + 0x08);
+       switch ((val >> 12) & 0xf) {
+       case 0: puts("CPU:   Allwinner A12 (SUN5I)\n"); break;
+       case 3: puts("CPU:   Allwinner A13 (SUN5I)\n"); break;
+       case 7: puts("CPU:   Allwinner A10s (SUN5I)\n"); break;
+       default: puts("CPU:   Allwinner A1X (SUN5I)\n");
+       }
 #elif defined CONFIG_SUN7I
        puts("CPU:   Allwinner A20 (SUN7I)\n");
 #else

diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 1de752904b5a8aca3339d2404c348b18e8834015..0f1ceecc1d4e72a47ee576a92456d8674c33805c 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/dram.c
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -155,6 +155,16 @@ static void mctl_enable_dllx(u32 phase)
 }
 
 static u32 hpcr_value[32] = {
+#ifdef CONFIG_SUN5I
+       0, 0, 0, 0,
+       0, 0, 0, 0,
+       0, 0, 0, 0,
+       0, 0, 0, 0,
+       0x1031, 0x1031, 0x0735, 0x1035,
+       0x1035, 0x0731, 0x1031, 0,
+       0x0301, 0x0301, 0x0301, 0x0301,
+       0x0301, 0x0301, 0x0301, 0
+#endif
 #ifdef CONFIG_SUN4I
        0x0301, 0x0301, 0x0301, 0x0301,
        0x0301, 0x0301, 0, 0,
@@ -257,9 +267,15 @@ static void mctl_setup_dram_clock(u32 clk)
 #if defined(CONFIG_SUN5I) || defined(CONFIG_SUN7I)
        /* setup MBUS clock */
        reg_val = CCM_MBUS_CTRL_GATE |
+#ifdef CONFIG_SUN7I
                  CCM_MBUS_CTRL_CLK_SRC(CCM_MBUS_CTRL_CLK_SRC_PLL6) |
                  CCM_MBUS_CTRL_N(CCM_MBUS_CTRL_N_X(2)) |
                  CCM_MBUS_CTRL_M(CCM_MBUS_CTRL_M_X(2));
+#else /* defined(CONFIG_SUN5I) */
+                 CCM_MBUS_CTRL_CLK_SRC(CCM_MBUS_CTRL_CLK_SRC_PLL5) |
+                 CCM_MBUS_CTRL_N(CCM_MBUS_CTRL_N_X(1)) |
+                 CCM_MBUS_CTRL_M(CCM_MBUS_CTRL_M_X(2));
+#endif
        writel(reg_val, &ccm->mbus_clk_cfg);
 #endif
 
@@ -468,6 +484,11 @@ unsigned long dramc_init(struct dram_para *para)
        /* setup DRAM relative clock */
        mctl_setup_dram_clock(para->clock);
 
+#ifdef CONFIG_SUN5I
+       /* Disable any pad power save control */
+       writel(0, &dram->ppwrsctl);
+#endif
+
        /* reset external DRAM */
 #ifndef CONFIG_SUN7I
        mctl_ddr3_reset();

diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index 4902d708347ed842f25af0ac2b70cbd10e65f783..708363290a03953ba60974bb8f1f2e9095bbce1c 100644 (file)
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -10,5 +10,7 @@
 #
 obj-y  += board.o
 obj-$(CONFIG_SUNXI_GMAC)       += gmac.o
+obj-$(CONFIG_A13_OLINUXINOM)   += dram_a13_oli_micro.o
 obj-$(CONFIG_CUBIEBOARD)       += dram_cubieboard.o
 obj-$(CONFIG_CUBIETRUCK)       += dram_cubietruck.o
+obj-$(CONFIG_R7DONGLE)         += dram_r7dongle.o

diff --git a/board/sunxi/dram_a13_oli_micro.c b/board/sunxi/dram_a13_oli_micro.c
new file mode 100644 (file)
index 0000000..8154ea2
--- /dev/null
+++ b/board/sunxi/dram_a13_oli_micro.c
@@ -0,0 +1,32 @@
+/* this file is generated, don't edit it yourself */
+
+#include <common.h>
+#include <asm/arch/dram.h>
+
+static struct dram_para dram_para = {
+       .clock = 408,
+       .type = 3,
+       .rank_num = 1,
+       .density = 2048,
+       .io_width = 16,
+       .bus_width = 16,
+       .cas = 9,
+       .zq = 123,
+       .odt_en = 0,
+       .size = 256,
+       .tpr0 = 0x42d899b7,
+       .tpr1 = 0xa090,
+       .tpr2 = 0x22a00,
+       .tpr3 = 0,
+       .tpr4 = 0,
+       .tpr5 = 0,
+       .emr1 = 0,
+       .emr2 = 0x10,
+       .emr3 = 0,
+
+};
+
+unsigned long sunxi_dram_init(void)
+{
+       return dramc_init(&dram_para);
+}

diff --git a/board/sunxi/dram_r7dongle.c b/board/sunxi/dram_r7dongle.c
new file mode 100644 (file)
index 0000000..59343cb
--- /dev/null
+++ b/board/sunxi/dram_r7dongle.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include <common.h>
+#include <asm/arch/dram.h>
+
+static struct dram_para dram_para = {
+       .clock = 384,
+       .type = 3,
+       .rank_num = 1,
+       .density = 2048,
+       .io_width = 8,
+       .bus_width = 32,
+       .cas = 9,
+       .zq = 123,
+       .odt_en = 0,
+       .size = 1024,
+       .tpr0 = 0x42d899b7,
+       .tpr1 = 0xa090,
+       .tpr2 = 0x22a00,
+       .tpr3 = 0,
+       .tpr4 = 0,
+       .tpr5 = 0,
+       .emr1 = 0x04,
+       .emr2 = 0x10,
+       .emr3 = 0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+       return dramc_init(&dram_para);
+}

diff --git a/boards.cfg b/boards.cfg
index af241283c7e897c45d1af01d196fb56007c9c8c1..20ad48868dbf530242a6486787c9a57d29aa0b03 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -377,9 +377,11 @@ Active  arm         armv7          rmobile     renesas         lager
 Active  arm         armv7          s5pc1xx     samsung         goni                s5p_goni                              -                                                                                                                                 Robert Baldyga <r.baldyga@samsung.com>
 Active  arm         armv7          s5pc1xx     samsung         smdkc100            smdkc100                              -                                                                                                                                 Minkyu Kang <mk7.kang@samsung.com>
 Active  arm         armv7          socfpga     altera          socfpga             socfpga_cyclone5                      -                                                                                                                                 -
+Active  arm         armv7          sunxi       -               sunxi               A13-OLinuXinoM                        sun5i:A13_OLINUXINOM,SPL,CONS_INDEX=2                                                                                             Hans de Goede <hdegoede@redhat.com>
 Active  arm         armv7          sunxi       -               sunxi               Cubieboard                            sun4i:CUBIEBOARD,SPL                                                                                                              Hans de Goede <hdegoede@redhat.com>
 Active  arm         armv7          sunxi       -               sunxi               Cubietruck                            sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII                                                                                             -
 Active  arm         armv7          sunxi       -               sunxi               Cubietruck_FEL                        sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII                                                                                         -
+Active  arm         armv7          sunxi       -               sunxi               r7-tv-dongle                          sun5i:R7DONGLE,SPL                                                                                                                Hans de Goede <hdegoede@redhat.com>
 Active  arm         armv7          u8500       st-ericsson     snowball            snowball                              -                                                                                                                                 Mathieu Poirier <mathieu.poirier@linaro.org>
 Active  arm         armv7          u8500       st-ericsson     u8500               u8500_href                            -                                                                                                                                 -
 Active  arm         armv7          vf610       freescale       vf610twr            vf610twr                              vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg                                                                         Alison Wang <b18965@freescale.com>

diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
new file mode 100644 (file)
index 0000000..43f0d67
--- /dev/null
+++ b/include/configs/sun5i.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
+ *
+ * Configuration settings for the Allwinner A13 (sun5i) CPU
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_SUN5I           /* sun5i SoC generation */
+
+#define CONFIG_SYS_PROMPT              "sun5i# "
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include <configs/sunxi-common.h>
+
+#endif /* __CONFIG_H */

diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index fd02d0dc8323a485d256766526308978033fa2fb..1d1c87d000b54ead35d4c55b16b61e167519d552 100644 (file)
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -161,7 +161,9 @@
 #undef CONFIG_CMD_NET
 #undef CONFIG_CMD_NFS
 
+#ifndef CONFIG_CONS_INDEX
 #define CONFIG_CONS_INDEX              1       /* UART0 */
+#endif
 
 #ifdef CONFIG_SUNXI_GMAC
 #define CONFIG_DESIGNWARE_ETH          /* GMAC can use designware driver */