]> git.sur5r.net Git - u-boot/commitdiff
omap: Update the base address of the MMC controllers
authorJean-Jacques Hiblot <jjhiblot@ti.com>
Thu, 21 Sep 2017 14:51:33 +0000 (16:51 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 19 Jan 2018 03:04:21 +0000 (22:04 -0500)
Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.

Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
arch/arm/include/asm/arch-am33xx/mmc_host_def.h
arch/arm/include/asm/arch-omap4/mmc_host_def.h
arch/arm/include/asm/arch-omap5/mmc_host_def.h
arch/arm/include/asm/omap_mmc.h
arch/arm/mach-keystone/include/mach/mmc_host_def.h

index 724e252946d4daa7b23f5ac0e140797c011f9d09..5a2ea8faefdcfc9e55d0e718fe125edbaf92b217 100644 (file)
@@ -21,8 +21,8 @@
 /*
  * OMAP HSMMC register definitions
  */
-#define OMAP_HSMMC1_BASE               0x48060100
-#define OMAP_HSMMC2_BASE               0x481D8100
+#define OMAP_HSMMC1_BASE               0x48060000
+#define OMAP_HSMMC2_BASE               0x481D8000
 
 #if defined(CONFIG_TI814X)
 #undef MMC_CLOCK_REFERENCE
index 9c8ccb6c839b5b069c39274d26bd832633939914..d06779956f6e438846da1d4bbdb286c12952aa90 100644 (file)
@@ -31,8 +31,8 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE       0x4809C100
-#define OMAP_HSMMC2_BASE       0x480B4100
-#define OMAP_HSMMC3_BASE       0x480AD100
+#define OMAP_HSMMC1_BASE       0x4809C000
+#define OMAP_HSMMC2_BASE       0x480B4000
+#define OMAP_HSMMC3_BASE       0x480AD000
 
 #endif /* MMC_HOST_DEF_H */
index 9c8ccb6c839b5b069c39274d26bd832633939914..d06779956f6e438846da1d4bbdb286c12952aa90 100644 (file)
@@ -31,8 +31,8 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE       0x4809C100
-#define OMAP_HSMMC2_BASE       0x480B4100
-#define OMAP_HSMMC3_BASE       0x480AD100
+#define OMAP_HSMMC1_BASE       0x4809C000
+#define OMAP_HSMMC2_BASE       0x480B4000
+#define OMAP_HSMMC3_BASE       0x480AD000
 
 #endif /* MMC_HOST_DEF_H */
index 297e6a73802f27b156d699d72dfbc9ce829da5be..77278a36aa8478674997f75e4a67509add58a17c 100644 (file)
@@ -28,7 +28,7 @@
 #include <mmc.h>
 
 struct hsmmc {
-#ifdef CONFIG_DM_MMC
+#ifndef CONFIG_OMAP34XX
        unsigned char res0[0x100];
 #endif
        unsigned char res1[0x10];
index a5050ac0f1a224196a49aa29b426f329ed283ac8..b8eed7d29b0939be85e17029b718793a3ce45bdc 100644 (file)
@@ -16,7 +16,7 @@
  * OMAP HSMMC register definitions
  */
 
-#define OMAP_HSMMC1_BASE       0x23000100
-#define OMAP_HSMMC2_BASE       0x23100100
+#define OMAP_HSMMC1_BASE       0x23000000
+#define OMAP_HSMMC2_BASE       0x23100000
 
 #endif /* K2G_MMC_HOST_DEF_H */