]> git.sur5r.net Git - u-boot/commitdiff
powerpc/fsl: Introduce common enum for PHY types
authorKumar Gala <galak@kernel.crashing.org>
Thu, 30 Sep 2010 14:14:40 +0000 (09:14 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 20 Oct 2010 07:27:18 +0000 (02:27 -0500)
Have a common enum for phy types that we use in the UCC driver.  We will
also use this enum for dealing with phy connection fixup in the device
tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/include/asm/fsl_enet.h [new file with mode: 0644]
drivers/qe/uec.c
drivers/qe/uec.h
drivers/qe/uec_phy.c

diff --git a/arch/powerpc/include/asm/fsl_enet.h b/arch/powerpc/include/asm/fsl_enet.h
new file mode 100644 (file)
index 0000000..8596157
--- /dev/null
@@ -0,0 +1,31 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef __ASM_PPC_FSL_ENET_H
+#define __ASM_PPC_FSL_ENET_H
+
+enum fsl_phy_enet_if {
+       MII,
+       RMII,
+       GMII,
+       RGMII,
+       RGMII_ID,
+       RGMII_RXID,
+       RGMII_TXID,
+       SGMII,
+       TBI,
+       RTBI,
+       XAUI,
+       FSL_ETH_IF_NONE,
+};
+
+#endif /* __ASM_PPC_FSL_ENET_H */
index 48033d750c3cee5eb649ee67889e37a0405220c0..282ab237516d89876d5b07a9526bcecd2f25b24a 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2010 Freescale Semiconductor, Inc.
  *
  * Dave Liu <daveliu@freescale.com>
  *
@@ -324,9 +324,9 @@ static int uec_set_mac_duplex(uec_private_t *uec, int duplex)
 }
 
 static int uec_set_mac_if_mode(uec_private_t *uec,
-               enet_interface_type_e if_mode, int speed)
+               enum fsl_phy_enet_if if_mode, int speed)
 {
-       enet_interface_type_e   enet_if_mode;
+       enum fsl_phy_enet_if    enet_if_mode;
        uec_info_t              *uec_info;
        uec_t                   *uec_regs;
        u32                     upsmr;
@@ -521,7 +521,7 @@ static void adjust_link(struct eth_device *dev)
        struct uec_mii_info     *mii_info = uec->mii_info;
 
        extern void change_phy_interface_mode(struct eth_device *dev,
-                                enet_interface_type_e mode, int speed);
+                                enum fsl_phy_enet_if mode, int speed);
        uec_regs = uec->uec_regs;
 
        if (mii_info->link) {
@@ -539,7 +539,7 @@ static void adjust_link(struct eth_device *dev)
                }
 
                if (mii_info->speed != uec->oldspeed) {
-                       enet_interface_type_e   mode = \
+                       enum fsl_phy_enet_if    mode = \
                                uec->uec_info->enet_interface_type;
                        if (uec->uec_info->uf_info.eth_type == GIGA_ETH) {
                                switch (mii_info->speed) {
index 2a9e2dcd9c2b6e806783b4a7bfd8e42d872146f3..94eb9a26d7f95d8c9cf2111f0119d4c19a6569d0 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2010 Freescale Semiconductor, Inc.
  *
  * Dave Liu <daveliu@freescale.com>
  * based on source code of Shlomi Gridish
@@ -25,6 +25,7 @@
 
 #include "qe.h"
 #include "uccf.h"
+#include <asm/fsl_enet.h>
 
 #define MAX_TX_THREADS                         8
 #define MAX_RX_THREADS                         8
@@ -660,21 +661,6 @@ typedef enum uec_num_of_threads {
        UEC_NUM_OF_THREADS_8  = 0x4   /* 8 */
 } uec_num_of_threads_e;
 
-/* UEC ethernet interface type
-*/
-typedef enum enet_interface_type {
-       MII,
-       RMII,
-       RGMII,
-       GMII,
-       RGMII_ID,
-       RGMII_RXID,
-       RGMII_TXID,
-       TBI,
-       RTBI,
-       SGMII
-} enet_interface_type_e;
-
 /* UEC initialization info struct
 */
 #define STD_UEC_INFO(num) \
@@ -705,7 +691,7 @@ typedef struct uec_info {
        u16                             rx_bd_ring_len;
        u16                             tx_bd_ring_len;
        u8                              phy_address;
-       enet_interface_type_e           enet_interface_type;
+       enum fsl_phy_enet_if            enet_interface_type;
        int                             speed;
 } uec_info_t;
 
index 9be784e6add8063ebf7fe72efa92e808fa4fadaa..35f2368a808a28f93c18ae3b2cc439b5b463db4f 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2005 Freescale Semiconductor, Inc.
+ * Copyright (C) 2005,2010 Freescale Semiconductor, Inc.
  *
  * Author: Shlomi Gridish
  *
@@ -485,7 +485,7 @@ static int marvell_init(struct uec_mii_info *mii_info)
 {
        struct eth_device *edev = mii_info->dev;
        uec_private_t *uec = edev->priv;
-       enum enet_interface_type iface = uec->uec_info->enet_interface_type;
+       enum fsl_phy_enet_if iface = uec->uec_info->enet_interface_type;
        int     speed = uec->uec_info->speed;
 
        if ((speed == 1000) &&
@@ -853,7 +853,7 @@ struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info)
 }
 
 void marvell_phy_interface_mode (struct eth_device *dev,
-                                enet_interface_type_e type,
+                                enum fsl_phy_enet_if type,
                                 int speed
                                )
 {
@@ -907,7 +907,7 @@ void marvell_phy_interface_mode (struct eth_device *dev,
 }
 
 void change_phy_interface_mode (struct eth_device *dev,
-                               enet_interface_type_e type, int speed)
+                               enum fsl_phy_enet_if type, int speed)
 {
 #ifdef CONFIG_PHY_MODE_NEED_CHANGE
        marvell_phy_interface_mode (dev, type, speed);