]> git.sur5r.net Git - u-boot/commitdiff
ARM: DRA7xx: Correct the SYS_CLK to 20MHZ
authorSricharan R <r.sricharan@ti.com>
Thu, 30 May 2013 03:19:34 +0000 (03:19 +0000)
committerTom Rini <trini@ti.com>
Mon, 10 Jun 2013 12:43:10 +0000 (08:43 -0400)
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
And also moving V_SCLK, V_OSCK defines to
arch/clock.h for OMAP4+ boards.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
arch/arm/cpu/armv7/omap-common/timer.c
arch/arm/include/asm/arch-omap4/clock.h
arch/arm/include/asm/arch-omap5/clock.h
include/configs/omap4_common.h
include/configs/omap5_common.h

index 507f6873e91d27f8a56e67fffc7ea073c793de21..5926a5a810f4885c589900ae7825a0ff0b2c1367 100644 (file)
@@ -35,6 +35,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
+#include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index f544edfbd0afa3e3ace5055a8a1f744ece35d330..d7b61c298a43d6d0291bc2689df7c446a373659a 100644 (file)
 #define DPLL_NO_LOCK   0
 #define DPLL_LOCK      1
 
+/* Clock Defines */
+#define V_OSCK                 38400000        /* Clock output from T2 */
+#define V_SCLK                   V_OSCK
+
 struct omap4_scrm_regs {
        u32 revision;           /* 0x0000 */
        u32 pad00[63];
index 6d02835ead57ccb2fb0b341cb9bf7cd28f918db9..86d4711a14367b0a45ee9f0ed15292a4edd22a86 100644 (file)
  * into microsec and passing the value.
  */
 #define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC        31219
+
+#ifdef CONFIG_DRA7XX
+#define V_OSCK                 20000000        /* Clock output from T2 */
+#else
+#define V_OSCK                 19200000        /* Clock output from T2 */
+#endif
+
+#define V_SCLK V_OSCK
 #endif /* _CLOCKS_OMAP5_H_ */
index d6448b0529eb4ce596faa8095aab33543bf513be..3e5d36b21e0d552b031df9dd8ad1906d6036eeba 100644 (file)
 #define CONFIG_DISPLAY_CPUINFO         1
 #define CONFIG_DISPLAY_BOARDINFO       1
 
-/* Clock Defines */
-#define V_OSCK                 38400000        /* Clock output from T2 */
-#define V_SCLK                   V_OSCK
-
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_OF_LIBFDT               1
index d57c0daed14127ea5a3c0908597030d9d12aeee7..83b91d1590dbd3358b078544408a015fa2e72f49 100644 (file)
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-/* Clock Defines */
-#define V_OSCK                 19200000        /* Clock output from T2 */
-#define V_SCLK V_OSCK
-
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_OF_LIBFDT