]> git.sur5r.net Git - u-boot/commitdiff
MX: RTC13783 uses general function to access PMIC
authorStefano Babic <sbabic@denx.de>
Fri, 16 Apr 2010 15:11:19 +0000 (17:11 +0200)
committerTom <Tom@bumblecow.com>
Mon, 10 May 2010 16:21:54 +0000 (11:21 -0500)
The RTC is part of the Freescale's PMIC controller.
Use general function to access to PMIC internal registers.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
drivers/rtc/mc13783-rtc.c
include/configs/imx31_litekit.h
include/configs/mx31ads.h
include/configs/mx31pdk.h

index 416f50d01f9e7503cf329406d37f998305a9078d..4e18f80e93b175a9449d34eade1b1e25eea9eddd 100644 (file)
 #include <common.h>
 #include <rtc.h>
 #include <spi.h>
-
-static struct spi_slave *slave;
+#include <fsl_pmic.h>
 
 int rtc_get(struct rtc_time *rtc)
 {
        u32 day1, day2, time;
-       u32 reg;
-       int err, tim, i = 0;
-
-       if (!slave) {
-               /* FIXME: Verify the max SCK rate */
-               slave = spi_setup_slave(CONFIG_MC13783_SPI_BUS,
-                               CONFIG_MC13783_SPI_CS, 1000000,
-                               SPI_MODE_2 | SPI_CS_HIGH);
-               if (!slave)
-                       return -1;
-       }
-
-       if (spi_claim_bus(slave))
-               return -1;
+       int tim, i = 0;
 
        do {
-               reg = 0x2c000000;
-               err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day1,
-                               SPI_XFER_BEGIN | SPI_XFER_END);
-
-               if (err)
-                       return err;
-
-               reg = 0x28000000;
-               err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
-                               SPI_XFER_BEGIN | SPI_XFER_END);
+               day1 = pmic_reg_read(REG_RTC_DAY);
+               if (day1 < 0)
+                       return -1;
 
-               if (err)
-                       return err;
+               time = pmic_reg_read(REG_RTC_TIME);
+               if (time < 0)
+                       return -1;
 
-               reg = 0x2c000000;
-               err = spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day2,
-                               SPI_XFER_BEGIN | SPI_XFER_END);
+               day2 = pmic_reg_read(REG_RTC_DAY);
+               if (day2 < 0)
+                       return -1;
 
-               if (err)
-                       return err;
        } while (day1 != day2 && i++ < 3);
 
-       spi_release_bus(slave);
-
        tim = day1 * 86400 + time;
+
        to_tm(tim, rtc);
 
        rtc->tm_yday = 0;
@@ -80,34 +57,15 @@ int rtc_get(struct rtc_time *rtc)
 
 int rtc_set(struct rtc_time *rtc)
 {
-       u32 time, day, reg;
-
-       if (!slave) {
-               /* FIXME: Verify the max SCK rate */
-               slave = spi_setup_slave(CONFIG_MC13783_SPI_BUS,
-                               CONFIG_MC13783_SPI_CS, 1000000,
-                               SPI_MODE_2 | SPI_CS_HIGH);
-               if (!slave)
-                       return -1;
-       }
+       u32 time, day;
 
        time = mktime(rtc->tm_year, rtc->tm_mon, rtc->tm_mday,
                      rtc->tm_hour, rtc->tm_min, rtc->tm_sec);
        day = time / 86400;
        time %= 86400;
 
-       if (spi_claim_bus(slave))
-               return -1;
-
-       reg = 0x2c000000 | day | 0x80000000;
-       spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&day,
-                       SPI_XFER_BEGIN | SPI_XFER_END);
-
-       reg = 0x28000000 | time | 0x80000000;
-       spi_xfer(slave, 32, (uchar *)&reg, (uchar *)&time,
-                       SPI_XFER_BEGIN | SPI_XFER_END);
-
-       spi_release_bus(slave);
+       pmic_reg_write(REG_RTC_DAY, day);
+       pmic_reg_write(REG_RTC_TIME, time);
 
        return 0;
 }
index d58ca8a2a10e1bb7f6e7140cd95eaad4245a5277..49048563cb5cd5a9a9475471cc76288c1d761b30 100644 (file)
 #define CONFIG_DEFAULT_SPI_BUS 1
 #define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_2 | SPI_CS_HIGH)
 
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS    1
+#define CONFIG_FSL_PMIC_CS     0
+#define CONFIG_FSL_PMIC_CLK    1000000
+#define CONFIG_FSL_PMIC_MODE   (SPI_MODE_2 | SPI_CS_HIGH)
+
 #define CONFIG_RTC_MC13783     1
-/* MC13783 connected to CSPI2 and SS0 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS  0
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
index ec1c90540341d134eb6dcaf930087dd43391e7af..dedecd7fb6a2eee2a2b32d4880eeb522f20885d1 100644 (file)
 #define CONFIG_DEFAULT_SPI_BUS 1
 #define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_2 | SPI_CS_HIGH)
 
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS    1
+#define CONFIG_FSL_PMIC_CS     0
+#define CONFIG_FSL_PMIC_CLK    1000000
+#define CONFIG_FSL_PMIC_MODE   (SPI_MODE_2 | SPI_CS_HIGH)
 #define CONFIG_RTC_MC13783     1
-/* MC13783 connected to CSPI2 and SS0 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS  0
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
index bee2f45a15804f7f6f277952bd9e8bbe614ac9e0..0414cc37a7a94388950b576b9d4ddd47bd20c655 100644 (file)
 #define CONFIG_DEFAULT_SPI_BUS 1
 #define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_2 | SPI_CS_HIGH)
 
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS    1
+#define CONFIG_FSL_PMIC_CS     2
+#define CONFIG_FSL_PMIC_CLK    1000000
+#define CONFIG_FSL_PMIC_MODE   (SPI_MODE_2 | SPI_CS_HIGH)
 #define CONFIG_RTC_MC13783     1
 
-/* MC13783 connected to CSPI2 and SS2 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS  2
-
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_CONS_INDEX              1