]> git.sur5r.net Git - u-boot/commitdiff
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
authorTom Rini <trini@ti.com>
Mon, 25 Nov 2013 15:42:13 +0000 (10:42 -0500)
committerTom Rini <trini@ti.com>
Mon, 25 Nov 2013 15:42:13 +0000 (10:42 -0500)
12 files changed:
1  2 
board/ti/am335x/board.c
include/configs/am335x_evm.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/devkit8000.h
include/configs/mcx.h
include/configs/omap3_beagle.h
include/configs/omap3_igep00x0.h
include/configs/omap3_overo.h
include/configs/siemens-am33x-common.h
include/configs/tam3517-common.h
include/configs/tricorder.h

diff --combined board/ti/am335x/board.c
index 8edd21b119dcb16b490b6036b430504951bc7df3,0299dd6486f093679ac2b6fbf2591bd03ced2dd4..db225ce1d9fdcaae7f3c19e036210ed683ae5e7f
@@@ -397,7 -397,7 +397,7 @@@ const struct dpll_params *get_dpll_ddr_
        struct am335x_baseboard_id header;
  
        enable_i2c0_pin_mux();
 -      i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 +      i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
        if (read_eeprom(&header) < 0)
                puts("Could not get board ID.\n");
  
@@@ -481,26 -481,14 +481,14 @@@ void sdram_init(void
   */
  int board_init(void)
  {
- #ifdef CONFIG_NOR
-       const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1,
-               STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4,
-               STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
- #endif
  #if defined(CONFIG_HW_WATCHDOG)
        hw_watchdog_init();
  #endif
  
        gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+ #if defined(CONFIG_NOR) || defined(CONFIG_NAND)
        gpmc_init();
- #ifdef CONFIG_NOR
-       /* Reconfigure CS0 for NOR instead of NAND. */
-       enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0],
-                             CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M);
  #endif
        return 0;
  }
  
index f35ed6fba0c102bafeb2d7b2937dd8cfeb7f4bc4,1d5916753db09248706e0001188311aae871edd5..d75df927976ac5cc03ef16e6a2a631901739247e
  #define CONFIG_SYS_NS16550_COM6               0x481aa000      /* UART5 */
  #define CONFIG_BAUDRATE                       115200
  
 -/* I2C Configuration */
  #define CONFIG_CMD_EEPROM
  #define CONFIG_ENV_EEPROM_IS_ON_I2C
  #define CONFIG_SYS_I2C_EEPROM_ADDR    0x50    /* Main EEPROM */
  #define CONFIG_SPL_LDSCRIPT           "$(CPUDIR)/am33xx/u-boot-spl.lds"
  
  #ifdef CONFIG_NAND
+ #define CONFIG_NAND_OMAP_GPMC
+ #define CONFIG_NAND_OMAP_ELM
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_PAGE_COUNT    (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
  
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      14
+ #define CONFIG_SYS_NAND_ONFI_DETECTION
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_BCH8_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  #endif
index 6fd3fb9045cc3d0c0b985ebcf2c9d60c8b023679,b24ef5414381d57198f63a0a820f5785bae51c79..468fb43ea8e4b88106c9472b2f7738becd076146
  #undef CONFIG_CMD_IMLS                /* List all found images        */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C                       1
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  
  #undef CONFIG_CMD_NET
  #undef CONFIG_CMD_NFS
                                                10, 11, 12, 13}
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  
index 7e9c55edf1d4a655ea05c91edc19e60714583c6b,f13fd7001cc5b65ffea0a22c285bade7a4a35289..a3473b51bd475a2dd62ddccbe9507dc76b57fd9f
  #undef CONFIG_CMD_IMLS                /* List all found images        */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C                       1
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  
  #undef CONFIG_CMD_NET
  #undef CONFIG_CMD_NFS
                                                10, 11, 12, 13}
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  
index 474a5687a95df1b8b3b5c73dc1d6177fda0913d4,13315dc4b6b70151e9f242992288c3e2cf1ad906..4f43ba988227d0b067b482118473374e52197a35
  #define CONFIG_DOS_PARTITION          1
  
  /* I2C */
 -#define CONFIG_HARD_I2C                       1
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  
  /* TWL4030 */
  #define CONFIG_TWL4030_POWER          1
  
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  
  #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  
diff --combined include/configs/mcx.h
index a2f7cf711d0b223b7d4eeee6d62734216e3e11c4,56102f5712fc54a6de8215d620d570301a9da9b5..dcd29ce7cbd29fc83d39c888814fded51074accc
  #undef CONFIG_CMD_IMLS                /* List all found images        */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  
  /* RTC */
  #define CONFIG_RTC_DS1337
  #define CONFIG_SPL_FRAMEWORK
  #define CONFIG_SPL_BOARD_INIT
  #define CONFIG_SPL_NAND_SIMPLE
- #define CONFIG_SPL_NAND_SOFTECC
  
  #define CONFIG_SPL_LIBCOMMON_SUPPORT
  #define CONFIG_SPL_LIBDISK_SUPPORT
                                         56, 57, 58, 59, 60, 61, 62, 63}
  #define CONFIG_SYS_NAND_ECCSIZE               256
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_SW
  
  #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
  
index bba39d428654fc94d71d7f6bb7559b742792f77a,8b686356685c81e6403a9f9a04868a48332c9861..9eab1903ff8aec2e9ccc11e2b530c84f02c50817
  #undef CONFIG_CMD_IMLS                /* List all found images        */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C                       1
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_I2C_MULTI_BUS          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  #define CONFIG_VIDEO_OMAP3    /* DSS Support                  */
  
  /*
                                                10, 11, 12, 13}
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  
index 75d7d70d291981f66edd60bb87bf504826e680e5,cdaa9ba9a442ce63f6944867f1f2893a6d8a95b8..71062a601fa884c75ab8c87203cb0482dbebea3e
  #undef CONFIG_CMD_IMLS                /* List all found images        */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C                       1
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_I2C_OMAP34XX
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
  
  /*
   * TWL4030
                                                10, 11, 12, 13}
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  #endif
index 84b4aeee2abb32e6eaa301eec1f4e63d8780df58,00d7c6cebca4976d86563b34de48ae0602eadaf1..e0f026269fc497ffb814e89d47c88d3c940d23e2
  #define CONFIG_CMD_NET                /* bootp, tftpboot, rarpboot    */
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_I2C_MULTI_BUS
 -#define CONFIG_DRIVER_OMAP34XX_I2C
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  
  /*
   * TWL4030
                                                10, 11, 12, 13}
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_HW
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  #define CONFIG_SYS_NAND_U_BOOT_OFFS   0x80000
  
index 745e3bea58e403c52add644506d75c61f57f5948,e3944782f68210c2c93218a796bec53c0f783150..f37653fea3f0ee89647762e9c33ea9bb538abab2
  /* I2C Configuration */
  #define CONFIG_I2C
  #define CONFIG_CMD_I2C
 -#define CONFIG_HARD_I2C
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_I2C_MULTI_BUS
 -#define CONFIG_DRIVER_OMAP24XX_I2C
 -
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   OMAP_I2C_STANDARD
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP24XX
  
  /* Defines for SPL */
  #define CONFIG_SPL
  
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      14
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_BCH8_CODE_HW
  
  #define CONFIG_SYS_NAND_ECCSTEPS      4
  #define       CONFIG_SYS_NAND_ECCTOTAL        (CONFIG_SYS_NAND_ECCBYTES * \
                "\0"
  
  #define CONFIG_NAND_OMAP_GPMC
+ #define CONFIG_NAND_OMAP_ELM
  #define GPMC_NAND_ECC_LP_x16_LAYOUT   1
  #define CONFIG_SYS_NAND_BASE          (0x08000000)    /* physical address */
                                                        /* to access nand at */
index 6112c1b7a698bdf25d8649919e9aa81c2ec130a1,48698b57da40acfab64e6705165906735cf920bb..439fc47eb85171183cbb10ef3f76751fd3f5ae54
  #undef CONFIG_CMD_IMLS
  
  #define CONFIG_SYS_NO_FLASH
 -#define CONFIG_HARD_I2C
 -#define CONFIG_SYS_I2C_SPEED          400000
 -#define CONFIG_SYS_I2C_SLAVE          1
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   400000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
  #define CONFIG_SYS_I2C_EEPROM_ADDR    0x50            /* base address */
  #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN        1               /* bytes of address */
  #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW   0x07
 -#define CONFIG_DRIVER_OMAP34XX_I2C
 -
  
  /*
   * Board NAND Info.
  #define CONFIG_SPL_BOARD_INIT
  #define CONFIG_SPL_CONSOLE
  #define CONFIG_SPL_NAND_SIMPLE
- #define CONFIG_SPL_NAND_SOFTECC
  #define CONFIG_SPL_NAND_WORKSPACE     0x8f07f000 /* below BSS */
  
  #define CONFIG_SPL_LIBCOMMON_SUPPORT
                                         56, 57, 58, 59, 60, 61, 62, 63}
  #define CONFIG_SYS_NAND_ECCSIZE               256
  #define CONFIG_SYS_NAND_ECCBYTES      3
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_HAM1_CODE_SW
  
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE
  
@@@ -368,7 -369,7 +368,7 @@@ struct tam3517_module_info 
  
  #define TAM3517_READ_EEPROM(info, ret) \
  do {                                                          \
 -      i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);   \
 +      i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
        if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
                (void *)info, sizeof(*info)))                   \
                ret = 1;                                        \
index afd870762b713db75f89bb8849b6f73c7a89598d,3ca1fd0e657a7177a419ca3eca16dc7c72bb61a0..cc4001fcd13a1cee45585f3d9b35846aef7263d5
  #define CONFIG_DOS_PARTITION
  
  /* I2C */
 -#define CONFIG_HARD_I2C
 -#define CONFIG_SYS_I2C_SPEED          100000
 -#define CONFIG_SYS_I2C_SLAVE          1
 -#define CONFIG_DRIVER_OMAP34XX_I2C    1
 -#define CONFIG_I2C_MULTI_BUS
 +#define CONFIG_SYS_I2C
 +#define CONFIG_SYS_OMAP24_I2C_SPEED   100000
 +#define CONFIG_SYS_OMAP24_I2C_SLAVE   1
 +#define CONFIG_SYS_I2C_OMAP34XX
 + 
  
  /* EEPROM */
  #define CONFIG_SYS_I2C_MULTI_EEPROMS
  
  #define CONFIG_SYS_MAX_NAND_DEVICE    1               /* Max number of NAND */
                                                        /* devices */
- #define CONFIG_NAND_OMAP_BCH8
  #define CONFIG_BCH
+ #define CONFIG_SYS_NAND_MAX_OOBFREE   2
+ #define CONFIG_SYS_NAND_MAX_ECCPOS    56
  
  /* commands to include */
  #include <config_cmd_default.h>
  
  #define CONFIG_SYS_NAND_ECCSIZE               512
  #define CONFIG_SYS_NAND_ECCBYTES      13
+ #define CONFIG_NAND_OMAP_ECCSCHEME    OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
  
  #define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_SYS_TEXT_BASE