]> git.sur5r.net Git - u-boot/commitdiff
ppc/P1_P2_RDB: On-chip BootROM support
authorDipen Dudhat <dipen.dudhat@freescale.com>
Thu, 8 Oct 2009 08:03:29 +0000 (13:33 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 16 Oct 2009 15:21:39 +0000 (10:21 -0500)
On Chip BootROM support for P1 and P2 series RDB platforms.

This patch is derived from latest On Chip BootROM support on MPC8536DS

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
MAKEALL
Makefile
board/freescale/p1_p2_rdb/config.mk
include/configs/P1_P2_RDB.h

diff --git a/MAKEALL b/MAKEALL
index cfb94725c37a24c8d61835b2609abad9f07d4a71..07d24146f2c3c265182b492e56fa44ea0cf4da97 100755 (executable)
--- a/MAKEALL
+++ b/MAKEALL
@@ -405,12 +405,20 @@ LIST_85xx="               \
        P2020DS_36BIT   \
        P1011RDB        \
        P1011RDB_NAND   \
+       P1011RDB_SDCARD \
+       P1011RDB_SPIFLASH       \
        P1020RDB        \
        P1020RDB_NAND   \
+       P1020RDB_SDCARD \
+       P1020RDB_SPIFLASH       \
        P2010RDB        \
        P2010RDB_NAND   \
+       P2010RDB_SDCARD \
+       P2010RDB_SPIFLASH       \
        P2020RDB        \
        P2020RDB_NAND   \
+       P2020RDB_SDCARD \
+       P2020RDB_SPIFLASH       \
        PM854           \
        PM856           \
        sbc8540         \
index b067a4c7b96e5954abccebd80a0e0d3b8175138b..77ca51d662ab3178e8d02fd9f9eee7ac2932aaf3 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -2512,12 +2512,20 @@ P2020DS_config:         unconfig
 
 P1011RDB_config        \
 P1011RDB_NAND_config \
+P1011RDB_SDCARD_config \
+P1011RDB_SPIFLASH_config \
 P1020RDB_config        \
 P1020RDB_NAND_config \
+P1020RDB_SDCARD_config \
+P1020RDB_SPIFLASH_config \
 P2010RDB_config \
 P2010RDB_NAND_config \
+P2010RDB_SDCARD_config \
+P2010RDB_SPIFLASH_config \
 P2020RDB_config \
-P2020RDB_NAND_config:  unconfig
+P2020RDB_NAND_config \
+P2020RDB_SDCARD_config \
+P2020RDB_SPIFLASH_config:      unconfig
        @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale
 
 PM854_config:  unconfig
index 17abcf8f779b294d8df29dfa20bf3062aad98484..0f7a0487e07f82c6117cd778b839a20496579e30 100644 (file)
@@ -31,8 +31,20 @@ LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds
 endif
 endif
 
+ifeq ($(CONFIG_MK_SDCARD), y)
+TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+RESET_VECTOR_ADDRESS = 0xf8fffffc
+endif
+
+ifeq ($(CONFIG_MK_SPIFLASH), y)
+TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE)
+RESET_VECTOR_ADDRESS = 0xf8fffffc
+endif
+
 ifndef TEXT_BASE
 TEXT_BASE = 0xeff80000
 endif
 
+ifndef RESET_VECTOR_ADDRESS
 RESET_VECTOR_ADDRESS = 0xeffffffc
+endif
index aacd4ca852788262644d76353ee7c79b98a076c5..310242e0bd64857df80ad098c375bc3fcec27050 100644 (file)
 #define CONFIG_RAMBOOT_TEXT_BASE       0xf8f82000
 #endif
 
+#ifdef CONFIG_MK_SDCARD
+#define CONFIG_RAMBOOT_SDCARD          1
+#define CONFIG_RAMBOOT_TEXT_BASE       0xf8f80000
+#endif
+
+#ifdef CONFIG_MK_SPIFLASH
+#define CONFIG_RAMBOOT_SPIFLASH                1
+#define CONFIG_RAMBOOT_TEXT_BASE       0xf8f80000
+#endif
+
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
@@ -182,7 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MONITOR_BASE        TEXT_BASE       /* start of monitor */
 
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
+       || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
 #define CONFIG_SYS_RAMBOOT
 #else
 #undef CONFIG_SYS_RAMBOOT
@@ -426,6 +437,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
        #define CONFIG_ENV_IS_IN_NAND   1
        #define CONFIG_ENV_SIZE         CONFIG_SYS_NAND_BLOCK_SIZE
        #define CONFIG_ENV_OFFSET       ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
+       #define CONFIG_ENV_IS_NOWHERE   1       /* Store ENV in memory only */
+       #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
+       #define CONFIG_ENV_SIZE         0x2000
 #endif
 #else
        #define CONFIG_ENV_IS_IN_FLASH  1