]> git.sur5r.net Git - u-boot/commitdiff
sunxi: H3: Do not clear usb companion clk-gate / reset on remove
authorHans de Goede <hdegoede@redhat.com>
Sat, 9 Apr 2016 13:00:52 +0000 (15:00 +0200)
committerHans de Goede <hdegoede@redhat.com>
Tue, 12 Apr 2016 06:58:03 +0000 (08:58 +0200)
On the H3 we need to enable the clk and de-assert the reset of the
companion to be able to talk to the actual usb host controller.

Before this commit we were also disabling the companion clk-gate /
asserting its reset on remove, causing the later remove callback of
the companion itself to (sometimes) fail with:

ERROR: USB HC reset timed out!

This commit fixes this by not disabling the companion's clk-gate nor
asserting its reset on remove.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
drivers/usb/host/ehci-sunxi.c
drivers/usb/host/ohci-sunxi.c

index d5eb492169672b6cfd88261edf830c92f0d1f998..f2d83e34bc1b89ebca17aee5a966c94ae490f10e 100644 (file)
@@ -38,6 +38,7 @@ static int ehci_usb_probe(struct udevice *dev)
        struct ehci_sunxi_priv *priv = dev_get_priv(dev);
        struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
        struct ehci_hcor *hcor;
+       int extra_ahb_gate_mask = 0;
 
        /*
         * This should go away once we've moved to the driver model for
@@ -45,15 +46,18 @@ static int ehci_usb_probe(struct udevice *dev)
         */
        priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
 #ifdef CONFIG_MACH_SUN8I_H3
-       priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0;
+       extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
 #endif
        priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
        priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+       extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
        priv->phy_index++; /* Non otg phys start at 1 */
 
-       setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+       setbits_le32(&ccm->ahb_gate0,
+                    priv->ahb_gate_mask | extra_ahb_gate_mask);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-       setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+       setbits_le32(&ccm->ahb_reset0_cfg,
+                    priv->ahb_gate_mask | extra_ahb_gate_mask);
 #endif
 
        sunxi_usb_phy_init(priv->phy_index);
index 6f3f4cec16a50357aafc4fa7c1f4876b7bac42a2..2a1e8bf1e897f20d2d4ea1b3201c38093e6d8dda 100644 (file)
@@ -38,6 +38,7 @@ static int ohci_usb_probe(struct udevice *dev)
        struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
        struct ohci_sunxi_priv *priv = dev_get_priv(dev);
        struct ohci_regs *regs = (struct ohci_regs *)dev_get_addr(dev);
+       int extra_ahb_gate_mask = 0;
 
        bus_priv->companion = true;
 
@@ -47,18 +48,21 @@ static int ohci_usb_probe(struct udevice *dev)
         */
        priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
 #ifdef CONFIG_MACH_SUN8I_H3
-       priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0;
+       extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
 #endif
        priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK;
        priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST;
        priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+       extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
        priv->usb_gate_mask <<= priv->phy_index;
        priv->phy_index++; /* Non otg phys start at 1 */
 
-       setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
+       setbits_le32(&ccm->ahb_gate0,
+                    priv->ahb_gate_mask | extra_ahb_gate_mask);
        setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask);
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-       setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
+       setbits_le32(&ccm->ahb_reset0_cfg,
+                    priv->ahb_gate_mask | extra_ahb_gate_mask);
 #endif
 
        sunxi_usb_phy_init(priv->phy_index);