TQM85xx MPC8540/8541/8555/8560
+ acadia PPC405EZ
alpr PPC440GX
bamboo PPC440EP
bunbinga PPC405EP
Timur Tabi <timur@freescale.com>
MPC8349E-mITX MPC8349
+ MPC8349E-mITX-GP MPC8349
Kim Phillips <kim.phillips@freescale.com>
#########################################################################
LIST_4xx=" \
- ADCIOP alpr AP1000 AR405 \
- ASH405 bamboo bubinga CANBT \
- CMS700 CPCI2DP CPCI405 CPCI4052 \
- CPCI405AB CPCI405DT CPCI440 CPCIISER4 \
- CRAYL1 csb272 csb472 DASA_SIM \
- DP405 DU405 ebony ERIC \
- EXBITGEN G2000 HH405 HUB405 \
- JSE KAREF katmai luan \
- METROBOX MIP405 MIP405T ML2 \
- ml300 ocotea OCRTC ORSG \
- p3p440 PCI405 pcs440ep PIP405 \
- PLU405 PMC405 PPChameleonEVB sbc405 \
- sc3 sequoia sequoia_nand taishan \
- VOH405 VOM405 W7OLMC W7OLMG \
- walnut WUH405 XPEDITE1K yellowstone \
- yosemite yucca \
+ acadia ADCIOP alpr AP1000 \
+ AR405 ASH405 bamboo bubinga \
+ CANBT CMS700 CPCI2DP CPCI405 \
+ CPCI4052 CPCI405AB CPCI405DT CPCI440 \
+ CPCIISER4 CRAYL1 csb272 csb472 \
+ DASA_SIM DP405 DU405 ebony \
+ ERIC EXBITGEN G2000 HH405 \
+ HUB405 JSE KAREF katmai \
+ luan METROBOX MIP405 MIP405T \
+ ML2 ml300 ocotea OCRTC \
+ ORSG p3p440 PCI405 pcs440ep \
+ PIP405 PLU405 PMC405 PPChameleonEVB \
+ sbc405 sc3 sequoia sequoia_nand \
+ taishan VOH405 VOM405 W7OLMC \
+ W7OLMG walnut WUH405 XPEDITE1K \
+ yellowstone yosemite yucca \
"
#########################################################################
#########################################################################
LIST_83xx=" \
- TQM834x MPC8349EMDS MPC8349ITX MPC8360EMDS \
+ MPC832XEMDS MPC8349EMDS MPC8349ITX MPC8349ITXGP \
+ MPC8360EMDS sbc8349 TQM834x \
"
export ARCH CPU BOARD VENDOR SOC
ifndef CROSS_COMPILE
-ifeq ($(HOSTARCH),ppc)
+ifeq ($(HOSTARCH),$(ARCH))
CROSS_COMPILE =
else
ifeq ($(ARCH),ppc)
CROSS_COMPILE = arm-linux-
endif
ifeq ($(ARCH),i386)
-ifeq ($(HOSTARCH),i386)
-CROSS_COMPILE =
-else
CROSS_COMPILE = i386-linux-
endif
-endif
ifeq ($(ARCH),mips)
CROSS_COMPILE = mips_4KC-
endif
LIBS += drivers/qe/qe.a
endif
LIBS += drivers/sk98lin/libsk98lin.a
-LIBS += post/libpost.a post/cpu/libcpu.a
+LIBS += post/libpost.a post/drivers/libpostdrivers.a
+LIBS += $(shell if [ -d post/lib_$(ARCH) ]; then echo \
+ "post/lib_$(ARCH)/libpost$(ARCH).a"; fi)
+LIBS += $(shell if [ -d post/cpu/$(CPU) ]; then echo \
+ "post/cpu/$(CPU)/libpost$(CPU).a"; fi)
+LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
+ "post/board/$(BOARDDIR)/libpost$(BOARD).a"; fi)
LIBS += common/libcommon.a
LIBS += $(BOARDLIBS)
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
SUBDIRS = tools \
- examples \
- post \
- post/cpu
+ examples
+
.PHONY : $(SUBDIRS)
ifeq ($(CONFIG_NAND_U_BOOT),y)
}
@$(MKCONFIG) -a IceCube ppc mpc5xxx icecube
+jupiter_config: unconfig
+ @$(MKCONFIG) jupiter ppc mpc5xxx jupiter
+
v38b_config: unconfig
@./mkconfig -a v38b ppc mpc5xxx v38b
#########################################################################
xtract_4xx = $(subst _25,,$(subst _33,,$(subst _BA,,$(subst _ME,,$(subst _HI,,$(subst _config,,$1))))))
+ acadia_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx acadia amcc
+
ADCIOP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx adciop esd
## MPC83xx Systems
#########################################################################
-TQM834x_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
+MPC832XEMDS_config \
+MPC832XEMDS_HOST_33_config \
+MPC832XEMDS_HOST_66_config \
+MPC832XEMDS_SLAVE_config: unconfig
+ @echo "" >include/config.h ; \
+ if [ "$(findstring _HOST_,$@)" ] ; then \
+ echo -n "... PCI HOST " ; \
+ echo "#define CONFIG_PCI" >>include/config.h ; \
+ fi ; \
+ if [ "$(findstring _SLAVE_,$@)" ] ; then \
+ echo "...PCI SLAVE 66M" ; \
+ echo "#define CONFIG_PCI" >>include/config.h ; \
+ echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
+ fi ; \
+ if [ "$(findstring _33_,$@)" ] ; then \
+ echo -n "...33M ..." ; \
+ echo "#define PCI_33M" >>include/config.h ; \
+ fi ; \
+ if [ "$(findstring _66_,$@)" ] ; then \
+ echo -n "...66M..." ; \
+ echo "#define PCI_66M" >>include/config.h ; \
+ fi ;
+ @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds
MPC8349EMDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds
+MPC8349ITX_config \
+MPC8349ITX_LOWBOOT_config \
+MPC8349ITXGP_config: unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/mpc8349itx
+ @echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h
+ @if [ "$(findstring GP,$@)" ] ; then \
+ echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \
+ fi
+ @if [ "$(findstring LOWBOOT,$@)" ] ; then \
+ echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \
+ fi
+ @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx
+
MPC8360EMDS_config \
MPC8360EMDS_HOST_33_config \
MPC8360EMDS_HOST_66_config \
fi ;
@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds
-MPC8349ITX_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349itx
+sbc8349_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
+
+TQM834x_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x
+
#########################################################################
## MPC85xx Systems
#endif /* CONFIG_IOP480 */
/*****************************************************************************/
- #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405) || defined(CONFIG_405EP)
+ #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
+ defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
+ defined(CONFIG_405)
/*----------------------------------------------------------------------- */
/* Clear and set up some registers. */
/*----------------------------------------------------------------------- */
/*----------------------------------------------------------------------- */
/* Enable two 128MB cachable regions. */
/*----------------------------------------------------------------------- */
- addis r4,r0,0x8000
- addi r4,r4,0x0001
+ lis r4,0x8000
+ ori r4,r4,0x0001
mticcr r4 /* instruction cache */
isync
- addis r4,r0,0x0000
- addi r4,r4,0x0000
+ lis r4,0x0000
+ ori r4,r4,0x0000
mtdccr r4 /* data cache */
#if !(defined(CFG_EBC_PB0AP) && defined(CFG_EBC_PB0CR))
#endif /* CONFIG_405EP */
#if defined(CFG_OCM_DATA_ADDR) && defined(CFG_OCM_DATA_SIZE)
+ /* test-only... (clean up later when NAND booting is supported) */
+ #if defined(CONFIG_405EZ)
+ /********************************************************************
+ * Setup OCM - On Chip Memory - PPC405EZ uses OCM Controller V2
+ *******************************************************************/
+ /*
+ * We can map the OCM on the PLB3, so map it at
+ * CFG_OCM_DATA_ADDR + 0x8000
+ */
+ lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
+ ori r3,r3,CFG_OCM_DATA_ADDR@l
+ ori r3,r3,0x8270 /* 32K Offset, 16K for Bank 1, R/W/Enable */
+ mtdcr ocmplb3cr1,r3 /* Set PLB Access */
+ ori r3,r3,0x4000 /* Add 0x4000 for bank 2 */
+ mtdcr ocmplb3cr2,r3 /* Set PLB Access */
+ isync
+
+ lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
+ ori r3,r3,CFG_OCM_DATA_ADDR@l
+ ori r3,r3,0x0270 /* 16K for Bank 1, R/W/Enable */
+ mtdcr ocmdscr1, r3 /* Set Data Side */
+ mtdcr ocmiscr1, r3 /* Set Instruction Side */
+ ori r3,r3,0x4000 /* Add 0x4000 for bank 2 */
+ mtdcr ocmdscr2, r3 /* Set Data Side */
+ mtdcr ocmiscr2, r3 /* Set Instruction Side */
+ addis r3,0,0x0800 /* OCM Data Parity Disable - 1 Wait State */
+ mtdcr ocmdsisdpc,r4
+
+ isync
+
+ #if defined(CONFIG_NAND_SPL)
+ /*
+ * 405EZ can boot from NAND Flash.
+ * If we are booting the SPL (Pre-loader), copy code from
+ * the mapped 4K NAND Flash to the OCM
+ */
+ li r4,(CFG_NAND_BOOT_SPL_SIZE >> 2) - 1
+ mtctr r4
+ lis r2,CFG_NAND_BOOT_SPL_SRC@h
+ ori r2,r2,CFG_NAND_BOOT_SPL_SRC@l
+ lis r3,CFG_NAND_BOOT_SPL_DST@h
+ ori r3,r3,CFG_NAND_BOOT_SPL_DST@l
+ spl_loop:
+ lwzu r4,4(r2)
+ stwu r4,4(r3)
+ bdnz spl_loop
+
+ /*
+ * Jump to code in OCM Ram
+ */
+ bl 00f
+ 00: mflr r10
+ lis r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@h
+ ori r3,r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@l
+ sub r10,r10,r3
+ addi r10,r10,28
+ mtlr r10
+ blr
+ start_ram:
+ sync
+ isync
+ #endif
+ #else
+ /* ...test-only */
/********************************************************************
* Setup OCM - On Chip Memory
*******************************************************************/
addis r4, 0, 0xC000 /* OCM data area enabled */
mtdcr ocmdscntl, r4
isync
+ #endif /* CONFIG_405EZ */
#endif
/*----------------------------------------------------------------------- */
relocate_code:
#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
- defined(CONFIG_440SPE)
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
/*
* On some 440er platforms the cache is enabled in the first TLB (Boot-CS)
* to speed up the boot process. Now this cache needs to be disabled.
/*----------------------------------------------------------------------------+
| dcbz_area.
+----------------------------------------------------------------------------*/
- function_prolog(dcbz_area)
- rlwinm. r5,r4,0,27,31
- rlwinm r5,r4,27,5,31
- beq ..d_ra2
- addi r5,r5,0x0001
+ function_prolog(dcbz_area)
+ rlwinm. r5,r4,0,27,31
+ rlwinm r5,r4,27,5,31
+ beq ..d_ra2
+ addi r5,r5,0x0001
..d_ra2:mtctr r5
..d_ag2:dcbz r0,r3
- addi r3,r3,32
- bdnz ..d_ag2
- sync
- blr
- function_epilog(dcbz_area)
+ addi r3,r3,32
+ bdnz ..d_ag2
+ sync
+ blr
+ function_epilog(dcbz_area)
/*----------------------------------------------------------------------------+
| dflush. Assume 32K at vector address is cachable.
+----------------------------------------------------------------------------*/
- function_prolog(dflush)
- mfmsr r9
- rlwinm r8,r9,0,15,13
- rlwinm r8,r8,0,17,15
- mtmsr r8
- addi r3,r0,0x0000
- mtspr dvlim,r3
- mfspr r3,ivpr
- addi r4,r0,1024
- mtctr r4
+ function_prolog(dflush)
+ mfmsr r9
+ rlwinm r8,r9,0,15,13
+ rlwinm r8,r8,0,17,15
+ mtmsr r8
+ addi r3,r0,0x0000
+ mtspr dvlim,r3
+ mfspr r3,ivpr
+ addi r4,r0,1024
+ mtctr r4
..dflush_loop:
- lwz r6,0x0(r3)
- addi r3,r3,32
- bdnz ..dflush_loop
- addi r3,r3,-32
- mtctr r4
+ lwz r6,0x0(r3)
+ addi r3,r3,32
+ bdnz ..dflush_loop
+ addi r3,r3,-32
+ mtctr r4
..ag: dcbf r0,r3
- addi r3,r3,-32
- bdnz ..ag
- sync
- mtmsr r9
- blr
- function_epilog(dflush)
+ addi r3,r3,-32
+ bdnz ..ag
+ sync
+ mtmsr r9
+ blr
+ function_epilog(dflush)
#endif /* CONFIG_440 */
projects / u-boot / commitdiff