Add ddr voltage rail (dcdc3) configuration. Set the dcdc3
DDR supply to 1.35V.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
printf("%s failure\n", __func__);
return;
}
+
+ /* Set DCDC3 (DDR) voltage */
+ if (tps65218_voltage_update(TPS65218_DCDC3,
+ TPS65218_DCDC3_VOLT_SEL_1350MV)) {
+ printf("%s failure\n", __func__);
+ return;
+ }
}
void scale_vcores_idk(u32 m)
#define TPS65218_DCDC_VOLT_SEL_1200MV 0x23
#define TPS65218_DCDC_VOLT_SEL_1260MV 0x29
#define TPS65218_DCDC_VOLT_SEL_1330MV 0x30
+#define TPS65218_DCDC3_VOLT_SEL_1350MV 0x12
#define TPS65218_CC_STAT (BIT(0) | BIT(1))
#define TPS65218_STATE (BIT(2) | BIT(3))