]> git.sur5r.net Git - u-boot/commitdiff
rockchip: dts: evb-rk3399: add gmac support
authorKever Yang <kever.yang@rock-chips.com>
Mon, 1 May 2017 22:16:01 +0000 (16:16 -0600)
committerSimon Glass <sjg@chromium.org>
Wed, 10 May 2017 19:37:21 +0000 (13:37 -0600)
Enable gmac for evb-rk3399.

Change-Id: I85e35667e08e22e38577e63eb0e65731fc9c69b6
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3399-evb.dts
configs/evb-rk3399_defconfig
include/dt-bindings/pinctrl/rockchip.h

index 574eb1cf960fe5e9c7ddd7ec29288602ab98b2e9..77b452198186a1da7db4bced0e2330f665f38161 100644 (file)
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
 
                gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
        };
 
+       clkin_gmac: external-gmac-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <125000000>;
+               clock-output-names = "clkin_gmac";
+               #clock-cells = <0>;
+       };
 };
 
 &emmc_phy {
                };
        };
 };
+
+&gmac {
+        phy-supply = <&vcc_phy>;
+       phy-mode = "rgmii";
+       clock_in_out = "input";
+       snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 50000>;
+       assigned-clocks = <&cru SCLK_RMII_SRC>;
+       assigned-clock-parents = <&clkin_gmac>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       tx_delay = <0x10>;
+       rx_delay = <0x10>;
+       status = "okay";
+};
+
+&gmac {
+        phy-supply = <&vcc_phy>;
+       phy-mode = "rgmii";
+       clock_in_out = "input";
+       snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       snps,reset-delays-us = <0 10000 50000>;
+       assigned-clocks = <&cru SCLK_RMII_SRC>;
+       assigned-clock-parents = <&clkin_gmac>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_pins>;
+       tx_delay = <0x10>;
+       rx_delay = <0x10>;
+       status = "okay";
+};
index eb5e7aa9e71fc9b1dce15599799c32647c4ee6a9..76401260311fb7b1ff2f3114d87786d953c2e3ea 100644 (file)
@@ -34,6 +34,10 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_ROCKCHIP_RK3399=y
index ecb76c7808afc10a316ea8202e2a2b6421b643f7..7d454a29f1fdb49210f40d4affa294f75539056c 100644 (file)
@@ -17,6 +17,8 @@
 #define RK_GPIO4       4
 #define RK_GPIO6       6
 
+#define RK_PB7         15
+
 #define RK_FUNC_GPIO   0
 #define RK_FUNC_1      1
 #define RK_FUNC_2      2