injected into the FIT creation (i.e. the blobs would have been pre-
processed before being added to the FIT image).
+config SPL_DFU_SUPPORT
+ bool "Enable SPL with DFU to load binaries to memory device"
+ depends on USB
+ help
+ Currently the SPL does not have capability to load the
+ binaries or boot images to boot devices like ram,eMMC,SPI,etc.
+ This feature enables the DFU (Device Firmware Upgarde) in SPL with
+ RAM memory device support. The ROM code will load and execute
+ the SPL built with dfu. The user can load binaries (u-boot/kernel) to
+ selected device partition from host-pc using dfu-utils.
+ This feature will be useful to flash the binaries to factory
+ or bare-metal boards using USB interface.
+
+choice
+ bool "DFU device selection"
+ depends on SPL_DFU_SUPPORT
+
+config SPL_DFU_RAM
+ bool "RAM device"
+ depends on SPL_DFU_SUPPORT
+ help
+ select RAM/DDR memory device for loading binary images
+ (u-boot/kernel) to the selected device partition using
+ DFU and execute the u-boot/kernel from RAM.
+
+endchoice
+
config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
case BOOT_DEVICE_CPGMAC:
sys_boot_device = 1;
break;
+#endif
+#if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU_SUPPORT)
+ case BOOT_DEVICE_DFU:
+ sys_boot_device = 1;
+ break;
#endif
}
};
};
+&ehci0 {
+ dr_mode = "otg";
+ fsl,cdet-gpio = <&gpio3 6 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&ehci1 {
+ dr_mode = "host";
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
* SPDX-License-Identifier: GPL-2.0+ or X11
*/
/include/ "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial5 = &uart5;
spi0 = &dspi0;
spi1 = &dspi1;
+ ehci0 = &ehci0;
+ ehci1 = &ehci1;
};
soc {
reg = <0x400ff100 0x40>;
#gpio-cells = <2>;
};
+
+ ehci0: ehci@40034000 {
+ compatible = "fsl,vf610-usb";
+ reg = <0x40034000 0x800>;
+ status = "disabled";
+ };
};
aips1: aips-bus@40080000 {
status = "disabled";
};
+ ehci1: ehci@400b4000 {
+ compatible = "fsl,vf610-usb";
+ reg = <0x400b4000 0x800>;
+ status = "disabled";
+ };
};
};
};
#define BOOT_DEVICE_QSPI_1 0x0A
#define BOOT_DEVICE_QSPI_4 0x0B
#define BOOT_DEVICE_UART 0x43
-#define BOOT_DEVICE_USB 0x45
+#define BOOT_DEVICE_DFU 0x45
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2_2
FT_FSL_PCI_SETUP;
#if defined(CONFIG_HAS_FSL_DR_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
#endif
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
return 0;
}
/* remove dts usb node */
fdt_del_node_compat(blob, "fsl-usb2-dr");
} else {
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_del_node_and_alias(blob, "serial2");
}
}
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
fdt_fixup_memory_banks(blob, base, size, 2);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
fdt_fixup_memory_banks(blob, base, size, 2);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_FSL_MC_ENET
fdt_fixup_board_enet(blob);
int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_fixup_esdhc(blob, bd);
return 0;
#ifdef CONFIG_PCI
ft_pci_setup(blob, bd);
#endif
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_tsec1_fixup(blob, bd);
return 0;
{
ft_cpu_setup(blob, bd);
ft_tsec_fixup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_fixup_esdhc(blob, bd);
#ifdef CONFIG_PCI
ft_pci_setup(blob, bd);
ft_pci_setup(blob, bd);
#endif
ft_cpu_setup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_fixup_esdhc(blob, bd);
return 0;
#endif
#ifdef CONFIG_HAS_FSL_MPH_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
return 0;
fdt_fixup_memory(blob, (u64)base, (u64)size);
#if defined(CONFIG_HAS_FSL_DR_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
/* P1014 and it's derivatives don't support CAN and eTSEC3 */
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
FT_FSL_PCI_SETUP;
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
fdt_fixup_fman_ethernet(blob);
#endif
#if defined(CONFIG_HAS_FSL_DR_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH)
#if defined(CONFIG_TWR_P1025)
fdt_board_fixup_qe_pins(blob);
#endif
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
return 0;
}
fdt_fixup_memory(blob, (u64)base, (u64)size);
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_PCI
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
fdt_fixup_memory(blob, (u64)base, (u64)size);
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
return 0;
}
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_fixup_esdhc(blob, bd);
return 0;
int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
fdt_fixup_esdhc(blob, bd);
return 0;
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
FT_FSL_PCI_SETUP;
fdt_fixup_memory(blob, (u64)base, (u64)size);
#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_PCI
int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
return 0;
}
#endif
fdt_fixup_liodn(blob);
- fdt_fixup_dr_usb(blob, bd);
+ fsl_fdt_fixup_dr_usb(blob, bd);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_ethernet(blob);
static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
- bool dfu_reset = false;
if (argc < 4)
return CMD_RET_USAGE;
char *interface = argv[2];
char *devstring = argv[3];
- int ret, i = 0;
+ int ret;
#ifdef CONFIG_DFU_TFTP
unsigned long addr = 0;
if (!strcmp(argv[1], "tftp")) {
}
int controller_index = simple_strtoul(usb_controller, NULL, 0);
- board_usb_init(controller_index, USB_INIT_DEVICE);
- g_dnl_clear_detach();
- g_dnl_register("usb_dnl_dfu");
- while (1) {
- if (g_dnl_detach()) {
- /*
- * Check if USB bus reset is performed after detach,
- * which indicates that -R switch has been passed to
- * dfu-util. In this case reboot the device
- */
- if (dfu_usb_get_reset()) {
- dfu_reset = true;
- goto exit;
- }
- /*
- * This extra number of usb_gadget_handle_interrupts()
- * calls is necessary to assure correct transmission
- * completion with dfu-util
- */
- if (++i == 10000)
- goto exit;
- }
+ run_usb_dnl_gadget(controller_index, "usb_dnl_dfu");
- if (ctrlc())
- goto exit;
-
- if (dfu_get_defer_flush()) {
- /*
- * Call to usb_gadget_handle_interrupts() is necessary
- * to act on ZLP OUT transaction from HOST PC after
- * transmitting the whole file.
- *
- * If this ZLP OUT packet is NAK'ed, the HOST libusb
- * function fails after timeout (by default it is set to
- * 5 seconds). In such situation the dfu-util program
- * exits with error message.
- */
- usb_gadget_handle_interrupts(controller_index);
- ret = dfu_flush(dfu_get_defer_flush(), NULL, 0, 0);
- dfu_set_defer_flush(NULL);
- if (ret) {
- error("Deferred dfu_flush() failed!");
- goto exit;
- }
- }
-
- WATCHDOG_RESET();
- usb_gadget_handle_interrupts(controller_index);
- }
-exit:
- g_dnl_unregister();
- board_usb_cleanup(controller_index, USB_INIT_DEVICE);
done:
dfu_free_entities();
-
- if (dfu_reset)
- run_command("reset", 0);
-
- g_dnl_clear_detach();
-
return ret;
}
endif # !CONFIG_SPL_BUILD
ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_DFU_SUPPORT) += dfu.o
+obj-$(CONFIG_SPL_DFU_SUPPORT) += cli_hush.o
obj-$(CONFIG_SPL_HASH_SUPPORT) += hash.o
obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o
obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o
obj-y += cli.o
obj-$(CONFIG_CMDLINE) += cli_readline.o
+obj-$(CONFIG_CMD_DFU) += dfu.o
obj-y += command.o
obj-y += s_record.o
obj-y += xyzModem.o
--- /dev/null
+/*
+ * dfu.c -- dfu command
+ *
+ * Copyright (C) 2015
+ * Lukasz Majewski <l.majewski@majess.pl>
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * authors: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
+ * Lukasz Majewski <l.majewski@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <dfu.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <usb.h>
+#include <net.h>
+
+int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget)
+{
+ bool dfu_reset = false;
+ int ret, i = 0;
+
+ board_usb_init(usbctrl_index, USB_INIT_DEVICE);
+ g_dnl_clear_detach();
+ ret = g_dnl_register(usb_dnl_gadget);
+ if (ret) {
+ error("g_dnl_register failed");
+ return CMD_RET_FAILURE;
+ }
+
+ while (1) {
+ if (g_dnl_detach()) {
+ /*
+ * Check if USB bus reset is performed after detach,
+ * which indicates that -R switch has been passed to
+ * dfu-util. In this case reboot the device
+ */
+ if (dfu_usb_get_reset()) {
+ dfu_reset = true;
+ goto exit;
+ }
+
+ /*
+ * This extra number of usb_gadget_handle_interrupts()
+ * calls is necessary to assure correct transmission
+ * completion with dfu-util
+ */
+ if (++i == 10000)
+ goto exit;
+ }
+
+ if (ctrlc())
+ goto exit;
+
+ if (dfu_get_defer_flush()) {
+ /*
+ * Call to usb_gadget_handle_interrupts() is necessary
+ * to act on ZLP OUT transaction from HOST PC after
+ * transmitting the whole file.
+ *
+ * If this ZLP OUT packet is NAK'ed, the HOST libusb
+ * function fails after timeout (by default it is set to
+ * 5 seconds). In such situation the dfu-util program
+ * exits with error message.
+ */
+ usb_gadget_handle_interrupts(usbctrl_index);
+ ret = dfu_flush(dfu_get_defer_flush(), NULL, 0, 0);
+ dfu_set_defer_flush(NULL);
+ if (ret) {
+ error("Deferred dfu_flush() failed!");
+ goto exit;
+ }
+ }
+
+ WATCHDOG_RESET();
+ usb_gadget_handle_interrupts(usbctrl_index);
+ }
+exit:
+ g_dnl_unregister();
+ board_usb_cleanup(usbctrl_index, USB_INIT_DEVICE);
+
+ if (dfu_reset)
+ run_command("reset", 0);
+
+ g_dnl_clear_detach();
+
+ return ret;
+}
obj-$(CONFIG_SPL_FAT_SUPPORT) += spl_fat.o
obj-$(CONFIG_SPL_EXT_SUPPORT) += spl_ext.o
obj-$(CONFIG_SPL_SATA_SUPPORT) += spl_sata.o
+obj-$(CONFIG_SPL_DFU_SUPPORT) += spl_dfu.o
endif
# define CONFIG_SPL_LOAD_FIT_ADDRESS 0
#endif
-#ifdef CONFIG_SPL_RAM_DEVICE
+#if defined(CONFIG_SPL_RAM_DEVICE) || defined(CONFIG_SPL_DFU_SUPPORT)
static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
ulong count, void *buf)
{
#ifdef CONFIG_SPL_USB_SUPPORT
{ BOOT_DEVICE_USB, "USB" },
#endif
+#ifdef CONFIG_SPL_DFU_SUPPORT
+ { BOOT_DEVICE_DFU, "USB DFU" },
+#endif
#ifdef CONFIG_SPL_SATA_SUPPORT
{ BOOT_DEVICE_SATA, "SATA" },
#endif
case BOOT_DEVICE_USB:
return spl_usb_load_image();
#endif
+#ifdef CONFIG_SPL_DFU_SUPPORT
+ case BOOT_DEVICE_DFU:
+ spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0");
+ return spl_ram_load_image();
+#endif
#ifdef CONFIG_SPL_SATA_SUPPORT
case BOOT_DEVICE_SATA:
return spl_sata_load_image();
--- /dev/null
+/*
+ * (C) Copyright 2016
+ * Texas Instruments, <www.ti.com>
+ *
+ * Ravi B <ravibabu@ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <spl.h>
+#include <linux/compiler.h>
+#include <errno.h>
+#include <watchdog.h>
+#include <console.h>
+#include <g_dnl.h>
+#include <usb.h>
+#include <dfu.h>
+#include <environment.h>
+
+static int run_dfu(int usb_index, char *interface, char *devstring)
+{
+ int ret;
+
+ ret = dfu_init_env_entities(interface, devstring);
+ if (ret) {
+ dfu_free_entities();
+ goto exit;
+ }
+
+ run_usb_dnl_gadget(usb_index, "usb_dnl_dfu");
+exit:
+ dfu_free_entities();
+ return ret;
+}
+
+int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr)
+{
+ char *str_env;
+ int ret;
+
+ /* set default environment */
+ set_default_env(0);
+ str_env = getenv(dfu_alt_info);
+ if (!str_env) {
+ error("\"dfu_alt_info\" env variable not defined!\n");
+ return -EINVAL;
+ }
+
+ ret = setenv("dfu_alt_info", str_env);
+ if (ret) {
+ error("unable to set env variable \"dfu_alt_info\"!\n");
+ return -EINVAL;
+ }
+
+ /* invoke dfu command */
+ return run_dfu(usbctrl, interface, devstr);
+}
CONFIG_FSL_DSPI=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
+CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
return node_offset;
}
-static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
- const char *controller_type, int start_offset)
+static int fsl_fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
+ const char *controller_type,
+ int start_offset)
{
int node_offset, err;
const char *node_type = NULL;
return node_offset;
}
-static int fdt_fixup_erratum(int *usb_erratum_off, void *blob,
- const char *controller_type, char *str,
- bool (*has_erratum)(void))
+static int fsl_fdt_fixup_erratum(int *usb_erratum_off, void *blob,
+ const char *controller_type, char *str,
+ bool (*has_erratum)(void))
{
char buf[32] = {0};
snprintf(buf, sizeof(buf), "fsl,usb-erratum-%s", str);
if (!has_erratum())
return -EINVAL;
- *usb_erratum_off = fdt_fixup_usb_erratum(blob, buf, controller_type,
- *usb_erratum_off);
+ *usb_erratum_off = fsl_fdt_fixup_usb_erratum(blob, buf, controller_type,
+ *usb_erratum_off);
if (*usb_erratum_off < 0)
return -ENOSPC;
debug("Adding USB erratum %s\n", str);
return 0;
}
-void fdt_fixup_dr_usb(void *blob, bd_t *bd)
+void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
static const char * const modes[] = { "host", "peripheral", "otg" };
static const char * const phys[] = { "ulpi", "utmi", "utmi_dual" };
if (usb_phy_off < 0)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a006261_off, blob,
- CHIPIDEA_USB2, "a006261",
- has_erratum_a006261);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a006261_off, blob,
+ CHIPIDEA_USB2, "a006261",
+ has_erratum_a006261);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a007075_off, blob,
- CHIPIDEA_USB2, "a007075",
- has_erratum_a007075);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a007075_off, blob,
+ CHIPIDEA_USB2, "a007075",
+ has_erratum_a007075);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a007792_off, blob,
- CHIPIDEA_USB2, "a007792",
- has_erratum_a007792);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a007792_off, blob,
+ CHIPIDEA_USB2, "a007792",
+ has_erratum_a007792);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
- CHIPIDEA_USB2, "a005697",
- has_erratum_a005697);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a005697_off, blob,
+ CHIPIDEA_USB2, "a005697",
+ has_erratum_a005697);
if (ret == -ENOSPC)
return;
- ret = fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
- SNPS_DWC3, "a008751",
- has_erratum_a008751);
+ ret = fsl_fdt_fixup_erratum(&usb_erratum_a008751_off, blob,
+ SNPS_DWC3, "a008751",
+ has_erratum_a008751);
if (ret == -ENOSPC)
return;
return false;
}
+bool has_erratum_a010151(void)
+{
+ u32 svr = get_svr();
+ u32 soc = SVR_SOC_VER(svr);
+
+ switch (soc) {
+#ifdef CONFIG_ARM64
+ case SVR_LS2080A:
+ case SVR_LS2085A:
+ case SVR_LS1046A:
+ case SVR_LS1012A:
+ return IS_SVR_REV(svr, 1, 0);
+ case SVR_LS1043A:
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+#ifdef CONFIG_LS102XA
+ case SOC_VER_LS1020:
+ case SOC_VER_LS1021:
+ case SOC_VER_LS1022:
+ case SOC_VER_SLS1020:
+ return IS_SVR_REV(svr, 2, 0);
+#endif
+ }
+ return false;
+}
+
#endif
AX_MEDIUM_AC | AX_MEDIUM_RE)
/* AX88772 & AX88178 RX_CTL values */
-#define AX_RX_CTL_RH2M 0x0200 /* 32-bit aligned RX IP header */
-#define AX_RX_CTL_RH1M 0x0100 /* Enable RX header format type 1 */
-#define AX_RX_CTL_SO 0x0080
-#define AX_RX_CTL_AB 0x0008
-#define AX_RX_HEADER_DEFAULT (AX_RX_CTL_RH1M | AX_RX_CTL_RH2M)
+#define AX_RX_CTL_SO 0x0080
+#define AX_RX_CTL_AB 0x0008
#define AX_DEFAULT_RX_CTL \
(AX_RX_CTL_SO | AX_RX_CTL_AB)
#define FLAG_TYPE_AX88772B (1U << 2)
#define FLAG_EEPROM_MAC (1U << 3) /* initial mac address in eeprom */
-#define ASIX_USB_VENDOR_ID 0x0b95
-#define AX88772B_USB_PRODUCT_ID 0x772b
/* driver private */
struct asix_private {
int timeout = 0;
#define TIMEOUT_RESOLUTION 50 /* ms */
int link_detected;
- u32 ctl = AX_DEFAULT_RX_CTL;
debug("** %s()\n", __func__);
- if ((dev->pusb_dev->descriptor.idVendor == ASIX_USB_VENDOR_ID) &&
- (dev->pusb_dev->descriptor.idProduct == AX88772B_USB_PRODUCT_ID))
- ctl |= AX_RX_HEADER_DEFAULT;
-
- if (asix_write_rx_ctl(dev, ctl) < 0)
+ if (asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL) < 0)
goto out_err;
if (asix_write_hwaddr_common(dev, enetaddr) < 0)
return -1;
}
- if ((dev->pusb_dev->descriptor.idVendor ==
- ASIX_USB_VENDOR_ID) &&
- (dev->pusb_dev->descriptor.idProduct ==
- AX88772B_USB_PRODUCT_ID))
- buf_ptr += 2;
-
/* Notify net stack */
net_process_received_packet(buf_ptr + sizeof(packet_len),
packet_len);
}
*packetp = ptr + sizeof(packet_len);
-
- if ((ueth->pusb_dev->descriptor.idVendor == ASIX_USB_VENDOR_ID) &&
- (ueth->pusb_dev->descriptor.idProduct == AX88772B_USB_PRODUCT_ID))
- *packetp += 2;
-
return packet_len;
err:
*/
#include <common.h>
+#include <dm.h>
#include <usb.h>
#include <errno.h>
#include <linux/compiler.h>
#include <asm/io.h>
+#include <asm-generic/gpio.h>
#include <asm/arch/clock.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/crm_regs.h>
#include <asm/imx-common/iomux-v3.h>
#include <asm/imx-common/regs-usbphy.h>
#include <usb/ehci-ci.h>
+#include <libfdt.h>
+#include <fdtdec.h>
#include "ehci.h"
#define UCMD_RUN_STOP (1 << 0) /* controller run/stop */
#define UCMD_RESET (1 << 1) /* controller reset */
+DECLARE_GLOBAL_DATA_PTR;
+
static const unsigned phy_bases[] = {
USB_PHY0_BASE_ADDR,
USB_PHY1_BASE_ADDR,
return 0;
}
+int ehci_vf_common_init(struct usb_ehci *ehci, int index)
+{
+ int ret;
+
+ /* Do board specific initialisation */
+ ret = board_ehci_hcd_init(index);
+ if (ret)
+ return ret;
+
+ usb_power_config(index);
+ usb_oc_config(index);
+ usb_internal_phy_clock_gate(index);
+ usb_phy_enable(index, ehci);
+
+ return 0;
+}
+
+#ifndef CONFIG_DM_USB
int ehci_hcd_init(int index, enum usb_init_type init,
struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
struct usb_ehci *ehci;
enum usb_init_type type;
+ int ret;
if (index >= ARRAY_SIZE(nc_reg_bases))
return -EINVAL;
ehci = (struct usb_ehci *)nc_reg_bases[index];
- /* Do board specific initialisation */
- board_ehci_hcd_init(index);
-
- usb_power_config(index);
- usb_oc_config(index);
- usb_internal_phy_clock_gate(index);
- usb_phy_enable(index, ehci);
+ ret = ehci_vf_common_init(index);
+ if (ret)
+ return ret;
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
{
return 0;
}
+#else
+/* Possible port types (dual role mode) */
+enum dr_mode {
+ DR_MODE_NONE = 0,
+ DR_MODE_HOST, /* supports host operation */
+ DR_MODE_DEVICE, /* supports device operation */
+ DR_MODE_OTG, /* supports both */
+};
+
+struct ehci_vf_priv_data {
+ struct ehci_ctrl ctrl;
+ struct usb_ehci *ehci;
+ struct gpio_desc cdet_gpio;
+ enum usb_init_type init_type;
+ enum dr_mode dr_mode;
+ u32 portnr;
+};
+
+static int vf_usb_ofdata_to_platdata(struct udevice *dev)
+{
+ struct ehci_vf_priv_data *priv = dev_get_priv(dev);
+ const void *dt_blob = gd->fdt_blob;
+ int node = dev->of_offset;
+ const char *mode;
+
+ priv->portnr = dev->seq;
+
+ priv->ehci = (struct usb_ehci *)dev_get_addr(dev);
+ mode = fdt_getprop(dt_blob, node, "dr_mode", NULL);
+ if (mode) {
+ if (0 == strcmp(mode, "host")) {
+ priv->dr_mode = DR_MODE_HOST;
+ priv->init_type = USB_INIT_HOST;
+ } else if (0 == strcmp(mode, "peripheral")) {
+ priv->dr_mode = DR_MODE_DEVICE;
+ priv->init_type = USB_INIT_DEVICE;
+ } else if (0 == strcmp(mode, "otg")) {
+ priv->dr_mode = DR_MODE_OTG;
+ /*
+ * We set init_type to device by default when OTG
+ * mode is requested. If a valid gpio is provided
+ * we will switch the init_type based on the state
+ * of the gpio pin.
+ */
+ priv->init_type = USB_INIT_DEVICE;
+ } else {
+ debug("%s: Cannot decode dr_mode '%s'\n",
+ __func__, mode);
+ return -EINVAL;
+ }
+ } else {
+ priv->dr_mode = DR_MODE_HOST;
+ priv->init_type = USB_INIT_HOST;
+ }
+
+ if (priv->dr_mode == DR_MODE_OTG) {
+ gpio_request_by_name_nodev(dt_blob, node, "fsl,cdet-gpio", 0,
+ &priv->cdet_gpio, GPIOD_IS_IN);
+ if (dm_gpio_is_valid(&priv->cdet_gpio)) {
+ if (dm_gpio_get_value(&priv->cdet_gpio))
+ priv->init_type = USB_INIT_DEVICE;
+ else
+ priv->init_type = USB_INIT_HOST;
+ }
+ }
+
+ return 0;
+}
+
+static int vf_init_after_reset(struct ehci_ctrl *dev)
+{
+ struct ehci_vf_priv_data *priv = dev->priv;
+ enum usb_init_type type = priv->init_type;
+ struct usb_ehci *ehci = priv->ehci;
+ int ret;
+
+ ret = ehci_vf_common_init(priv->ehci, priv->portnr);
+ if (ret)
+ return ret;
+
+ if (type == USB_INIT_DEVICE)
+ return 0;
+
+ setbits_le32(&ehci->usbmode, CM_HOST);
+ writel((PORT_PTS_UTMI | PORT_PTS_PTW), &ehci->portsc);
+ setbits_le32(&ehci->portsc, USB_EN);
+
+ mdelay(10);
+
+ return 0;
+}
+
+static const struct ehci_ops vf_ehci_ops = {
+ .init_after_reset = vf_init_after_reset
+};
+
+static int vf_usb_bind(struct udevice *dev)
+{
+ static int num_controllers;
+
+ /*
+ * Without this hack, if we return ENODEV for USB Controller 0, on
+ * probe for the next controller, USB Controller 1 will be given a
+ * sequence number of 0. This conflicts with our requirement of
+ * sequence numbers while initialising the peripherals.
+ */
+ dev->req_seq = num_controllers;
+ num_controllers++;
+
+ return 0;
+}
+
+static int ehci_usb_probe(struct udevice *dev)
+{
+ struct usb_platdata *plat = dev_get_platdata(dev);
+ struct ehci_vf_priv_data *priv = dev_get_priv(dev);
+ struct usb_ehci *ehci = priv->ehci;
+ struct ehci_hccr *hccr;
+ struct ehci_hcor *hcor;
+ int ret;
+
+ ret = ehci_vf_common_init(ehci, priv->portnr);
+ if (ret)
+ return ret;
+
+ if (priv->init_type != plat->init_type)
+ return -ENODEV;
+
+ if (priv->init_type == USB_INIT_HOST) {
+ setbits_le32(&ehci->usbmode, CM_HOST);
+ writel((PORT_PTS_UTMI | PORT_PTS_PTW), &ehci->portsc);
+ setbits_le32(&ehci->portsc, USB_EN);
+ }
+
+ mdelay(10);
+
+ hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
+ hcor = (struct ehci_hcor *)((uint32_t)hccr +
+ HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
+
+ return ehci_register(dev, hccr, hcor, &vf_ehci_ops, 0, priv->init_type);
+}
+
+static int ehci_usb_remove(struct udevice *dev)
+{
+ int ret;
+
+ ret = ehci_deregister(dev);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct udevice_id vf_usb_ids[] = {
+ { .compatible = "fsl,vf610-usb" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_ehci) = {
+ .name = "ehci_vf",
+ .id = UCLASS_USB,
+ .of_match = vf_usb_ids,
+ .bind = vf_usb_bind,
+ .probe = ehci_usb_probe,
+ .remove = ehci_usb_remove,
+ .ops = &ehci_usb_ops,
+ .ofdata_to_platdata = vf_usb_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct usb_platdata),
+ .priv_auto_alloc_size = sizeof(struct ehci_vf_priv_data),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
}
}
+static void fsl_xhci_set_beat_burst_length(struct dwc3 *dwc3_reg)
+{
+ clrsetbits_le32(&dwc3_reg->g_sbuscfg0, USB3_ENABLE_BEAT_BURST_MASK,
+ USB3_ENABLE_BEAT_BURST);
+ setbits_le32(&dwc3_reg->g_sbuscfg1, USB3_SET_BEAT_BURST_LIMIT);
+}
+
static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci)
{
int ret = 0;
/* Set GFLADJ_30MHZ as 20h as per XHCI spec default value */
dwc3_set_fladj(fsl_xhci->dwc3_reg, GFLADJ_30MHZ_DEFAULT);
+ /* Change beat burst and outstanding pipelined transfers requests */
+ fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg);
+
+ /*
+ * A-010151: The dwc3 phy TSMC 28-nm HPM 0.9/1.8 V does not
+ * reliably support Rx Detect in P3 mode(P3 is the default
+ * setting). Therefore, some USB3.0 devices may not be detected
+ * reliably in Super Speed mode. So, USB controller to configure
+ * USB in P2 mode whenever the Receive Detect feature is required.
+ * whenever the Receive Detect feature is required.
+ */
+ if (has_erratum_a010151())
+ clrsetbits_le32(&fsl_xhci->dwc3_reg->g_usb3pipectl[0],
+ DWC3_GUSB3PIPECTL_DISRXDETP3,
+ DWC3_GUSB3PIPECTL_DISRXDETP3);
+
return ret;
}
/* General networking support */
#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16384
+#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* Miscellaneous commands */
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
-#define CONFIG_TFTP_TSIZE
#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16384
+#define CONFIG_TFTP_BLOCKSIZE 16352
+#define CONFIG_TFTP_TSIZE
/* ENET1 */
#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
/* General networking support */
#define CONFIG_IP_DEFRAG
-#define CONFIG_TFTP_BLOCKSIZE 16384
+#define CONFIG_TFTP_BLOCKSIZE 16352
#define CONFIG_TFTP_TSIZE
/* Miscellaneous commands */
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
+#ifdef CONFIG_SPL_BUILD
+#undef CONFIG_CMD_BOOTD
+#ifdef CONFIG_SPL_DFU_SUPPORT
+#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_HASH_SUPPORT
+#define DFU_ALT_INFO_RAM \
+ "dfu_alt_info_ram=" \
+ "kernel ram 0x80200000 0x4000000;" \
+ "fdt ram 0x80f80000 0x80000;" \
+ "ramdisk ram 0x81000000 0x4000000\0"
+#define DFUARGS \
+ "dfu_bufsiz=0x10000\0" \
+ DFU_ALT_INFO_RAM
+#endif
+#endif
+
#include <configs/ti_omap5_common.h>
/* Enhance our eMMC support / experience. */
#define DFUARGS
#endif
-#ifndef CONFIG_SPL_BUILD
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
"setenv mmcroot /dev/mmcblk0p2 rw; " \
"run mmcboot;" \
""
-#endif
/*
* SPL related defines. The Public RAM memory map the ROM defines the
int fdt_fixup_display(void *blob, const char *path, const char *display);
#if defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL)
-void fdt_fixup_dr_usb(void *blob, bd_t *bd);
+void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd);
#else
-static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
+static inline void fsl_fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
#endif /* defined(CONFIG_USB_EHCI_FSL) || defined(CONFIG_USB_XHCI_FSL) */
#if defined(CONFIG_SYS_FSL_SEC_COMPAT)
bool has_erratum_a005697(void);
bool has_erratum_a004477(void);
bool has_erratum_a008751(void);
+bool has_erratum_a010151(void);
#endif
#endif /*_ASM_FSL_USB_H_ */
bool g_dnl_detach(void);
void g_dnl_trigger_detach(void);
void g_dnl_clear_detach(void);
+int run_usb_dnl_gadget(int usbctrl_index, char *usb_dnl_gadget);
#endif /* __G_DOWNLOAD_H_ */
/* Global USB3 PIPE Control Register */
#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB3PIPECTL_DISRXDETP3 (1 << 28)
#define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
/* Global TX Fifo Size Register */
#define USB3_PHY_TX_RX_POWERON (USB3_PHY_RX_POWERON | USB3_PHY_TX_POWERON)
#define USB3_PWRCTL_CLK_CMD_SHIFT 14
#define USB3_PWRCTL_CLK_FREQ_SHIFT 22
+#define USB3_ENABLE_BEAT_BURST 0xF
+#define USB3_ENABLE_BEAT_BURST_MASK 0xFF
+#define USB3_SET_BEAT_BURST_LIMIT 0xF00
/* USBOTGSS_WRAPPER definitions */
#define USBOTGSS_WRAPRESET BIT(17)
*/
bool spl_was_boot_source(void);
+/**
+ * spl_dfu_cmd- run dfu command with chosen mmc device interface
+ * @param usb_index - usb controller number
+ * @param mmc_dev - mmc device nubmer
+ *
+ * @return 0 on success, otherwise error code
+ */
+int spl_dfu_cmd(int usbctrl, char *dfu_alt_info, char *interface, char *devstr);
#endif
libs-$(CONFIG_SPL_LIBDISK_SUPPORT) += disk/
libs-y += drivers/
+libs-$(CONFIG_SPL_DFU_SUPPORT) += drivers/dfu/
+libs-$(CONFIG_SPL_DFU_SUPPORT) += drivers/usb/gadget/
+libs-$(CONFIG_SPL_DFU_SUPPORT) += drivers/usb/gadget/udc/
+libs-$(CONFIG_SPL_DFU_SUPPORT) += drivers/usb/dwc3/
libs-y += dts/
libs-y += fs/
libs-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/
projects / u-boot / commitdiff