rockchip: rk3368: Add sysreset driver

Add sysreset driver to reset rk3368 SOC.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index b68381148c06e77da889adb00b09fb5432bd8b0d..6143f94774b319891bcb49c4d7e22fb172064b0a 100644 (file)
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -15,6 +15,7 @@ endif
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
+obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o

diff --git a/drivers/sysreset/sysreset_rk3368.c b/drivers/sysreset/sysreset_rk3368.c
new file mode 100644 (file)
index 0000000..de62921
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3368.c
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:    GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+static void rk3368_pll_enter_slow_mode(struct rk3368_cru *cru)
+{
+       struct rk3368_pll *pll;
+       int i;
+
+       for (i = 0; i < 6; i++) {
+               pll = &cru->pll[i];
+               rk_clrreg(&pll->con3, PLL_MODE_MASK);
+       }
+}
+
+static int rk3368_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+       struct rk3368_cru *cru = rockchip_get_cru();
+
+       if (IS_ERR(cru))
+               return PTR_ERR(cru);
+       switch (type) {
+       case SYSRESET_WARM:
+               rk3368_pll_enter_slow_mode(cru);
+               rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
+                            PMU_RST_BY_SND_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
+               writel(0xeca8, &cru->glb_srst_snd_val);
+               break;
+       case SYSRESET_COLD:
+               rk3368_pll_enter_slow_mode(cru);
+               rk_clrsetreg(&cru->glb_rst_con, PMU_GLB_SRST_CTRL_MASK,
+                            PMU_RST_BY_FST_GLB_SRST << PMU_GLB_SRST_CTRL_SHIFT);
+               writel(0xfdb9, &cru->glb_srst_fst_val);
+               break;
+       default:
+               return -EPROTONOSUPPORT;
+       }
+
+       return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3368_sysreset = {
+       .request        = rk3368_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3368) = {
+       .name   = "rk3368_sysreset",
+       .id     = UCLASS_SYSRESET,
+       .ops    = &rk3368_sysreset,
+};