Signed-off-by: Jon Loeliger <jdl@freescale.com>
* BAT0 2G Cacheable, non-guarded
* 0x0000_0000 2G DDR
*/
-#define CFG_DBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE | BATL_MEMCOHERENCE )
-#define CFG_DBAT0U ( BATU_BL_2G | BATU_VS | BATU_VP )
-#define CFG_IBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT | BATL_MEMCOHERENCE)
+#define CFG_DBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE)
+#define CFG_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP)
+#define CFG_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE )
#define CFG_IBAT0U CFG_DBAT0U
/*