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7 years agomips: bmips: add bcm6345-rst driver support for BCM63268
Álvaro Fernández Rojas [Wed, 3 May 2017 13:10:24 +0000 (15:10 +0200)]
mips: bmips: add bcm6345-rst driver support for BCM63268

This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-rst driver support for BCM6328
Álvaro Fernández Rojas [Wed, 3 May 2017 13:10:23 +0000 (15:10 +0200)]
mips: bmips: add bcm6345-rst driver support for BCM6328

This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-rst driver support for BCM6358
Álvaro Fernández Rojas [Wed, 3 May 2017 13:10:22 +0000 (15:10 +0200)]
mips: bmips: add bcm6345-rst driver support for BCM6358

This driver can control up to 32 resets.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: reset: add BCM6345 reset driver
Álvaro Fernández Rojas [Wed, 3 May 2017 13:10:21 +0000 (15:10 +0200)]
dm: reset: add BCM6345 reset driver

This is a simplified version of linux/arch/mips/bcm63xx/reset.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: enable bcm6345-clk driver for all BMIPS boards
Álvaro Fernández Rojas [Sun, 7 May 2017 18:13:05 +0000 (20:13 +0200)]
mips: bmips: enable bcm6345-clk driver for all BMIPS boards

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-clk driver support for BCM63268
Álvaro Fernández Rojas [Sun, 7 May 2017 18:13:04 +0000 (20:13 +0200)]
mips: bmips: add bcm6345-clk driver support for BCM63268

This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-clk driver support for BCM6328
Álvaro Fernández Rojas [Sun, 7 May 2017 18:13:03 +0000 (20:13 +0200)]
mips: bmips: add bcm6345-clk driver support for BCM6328

This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-clk driver support for BCM6358
Álvaro Fernández Rojas [Sun, 7 May 2017 18:13:02 +0000 (20:13 +0200)]
mips: bmips: add bcm6345-clk driver support for BCM6358

This driver can control up to 32 clocks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: clk: add BCM6345 clock driver
Álvaro Fernández Rojas [Sun, 7 May 2017 18:13:01 +0000 (20:13 +0200)]
dm: clk: add BCM6345 clock driver

This is a simplified version of linux/arch/mips/bcm63xx/clk.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add NeufBox 4 (Sercomm) board
Álvaro Fernández Rojas [Sun, 7 May 2017 18:11:32 +0000 (20:11 +0200)]
mips: bmips: add NeufBox 4 (Sercomm) board

This serves as an example for bcm6358-leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6358-led driver support for BCM6358
Álvaro Fernández Rojas [Sun, 7 May 2017 18:11:31 +0000 (20:11 +0200)]
mips: bmips: add bcm6358-led driver support for BCM6358

This driver can control up to 32 serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: led: add BCM6358 led driver
Álvaro Fernández Rojas [Sun, 7 May 2017 18:11:30 +0000 (20:11 +0200)]
dm: led: add BCM6358 led driver

This driver is a simplified version of linux/drivers/leds/leds-bcm6358.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add Comtrend VR-3032u bcm6328-leds
Álvaro Fernández Rojas [Sun, 7 May 2017 18:10:28 +0000 (20:10 +0200)]
mips: bmips: add Comtrend VR-3032u bcm6328-leds

This board has several LEDs attached to its BCM6328 led controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add Comtrend AR-5387un bcm6328-leds
Álvaro Fernández Rojas [Sun, 7 May 2017 18:10:27 +0000 (20:10 +0200)]
mips: bmips: add Comtrend AR-5387un bcm6328-leds

This board has several LEDs attached to its BCM6328 led controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6328-led driver support for BCM63268
Álvaro Fernández Rojas [Sun, 7 May 2017 18:10:26 +0000 (20:10 +0200)]
mips: bmips: add bcm6328-led driver support for BCM63268

This driver can control up to 24 LEDs and supports HW blinking and serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6328-led driver support for BCM6328
Álvaro Fernández Rojas [Sun, 7 May 2017 18:10:25 +0000 (20:10 +0200)]
mips: bmips: add bcm6328-led driver support for BCM6328

This driver can control up to 24 LEDs and supports HW blinking and serial leds.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: led: add BCM6328 led driver
Álvaro Fernández Rojas [Sun, 7 May 2017 18:10:24 +0000 (20:10 +0200)]
dm: led: add BCM6328 led driver

This driver is a simplified version of linux/drivers/leds/leds-bcm6328.c,
simplified to remove HW leds and blink fallbacks.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add Huawei HG556a gpio-leds
Álvaro Fernández Rojas [Sun, 7 May 2017 18:09:34 +0000 (20:09 +0200)]
mips: bmips: add Huawei HG556a gpio-leds

This board has several LEDs attached to gpio0.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-gpio driver support for BCM63268
Álvaro Fernández Rojas [Sun, 7 May 2017 18:09:33 +0000 (20:09 +0200)]
mips: bmips: add bcm6345-gpio driver support for BCM63268

This SoC has one gpio bank divided into two 32 bit registers, with a total of
52 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-gpio driver support for BCM6328
Álvaro Fernández Rojas [Sun, 7 May 2017 18:09:32 +0000 (20:09 +0200)]
mips: bmips: add bcm6345-gpio driver support for BCM6328

This SoC has one gpio bank with a total of 32 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomips: bmips: add bcm6345-gpio driver support for BCM6358
Álvaro Fernández Rojas [Sun, 7 May 2017 18:09:31 +0000 (20:09 +0200)]
mips: bmips: add bcm6345-gpio driver support for BCM6358

This SoC has one gpio bank divided into two 32 bit registers, with a total of
40 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: gpio: add BCM6345 gpio driver
Álvaro Fernández Rojas [Sun, 7 May 2017 18:09:30 +0000 (20:09 +0200)]
dm: gpio: add BCM6345 gpio driver

This driver is based on linux/arch/mips/bcm63xx/gpio.c, simplified to allow
defining one or two independent banks for each Broadcom SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add BMIPS Comtrend VR-3032u board
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:26 +0000 (00:39 +0200)]
MIPS: add BMIPS Comtrend VR-3032u board

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add support for Broadcom MIPS BCM63268 SoC family
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:25 +0000 (00:39 +0200)]
MIPS: add support for Broadcom MIPS BCM63268 SoC family

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add BMIPS Comtrend AR-5387un board
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:24 +0000 (00:39 +0200)]
MIPS: add BMIPS Comtrend AR-5387un board

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add support for Broadcom MIPS BCM6328 SoC family
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:23 +0000 (00:39 +0200)]
MIPS: add support for Broadcom MIPS BCM6328 SoC family

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add BMIPS Huawei HG556a board
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:22 +0000 (00:39 +0200)]
MIPS: add BMIPS Huawei HG556a board

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add support for Broadcom MIPS BCM6358 SoC family
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:21 +0000 (00:39 +0200)]
MIPS: add support for Broadcom MIPS BCM6358 SoC family

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: add initial infrastructure for Broadcom MIPS SoCs
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:20 +0000 (00:39 +0200)]
MIPS: add initial infrastructure for Broadcom MIPS SoCs

CFE checks CPU Thread in a different way (using register $22):
mfc0 t1, C0_BCM_CONFIG, 3 # $22
li t2, CP0_CMT_TPID # (1 << 31)
and t1, t2
bnez t1, 2f # if we are running on thread 1, skip init
nop

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoram: add RAM driver for Broadcom MIPS SoCs
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:19 +0000 (00:39 +0200)]
ram: add RAM driver for Broadcom MIPS SoCs

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agocpu: add CPU driver for Broadcom MIPS SoCs
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:18 +0000 (00:39 +0200)]
cpu: add CPU driver for Broadcom MIPS SoCs

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agocmd: cpu: refactor to ensure devices are probed and improve code style
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:17 +0000 (00:39 +0200)]
cmd: cpu: refactor to ensure devices are probed and improve code style

Use uclass_first_device and uclass_next_device in order to avoid exceptions
for drivers that aren't probed when cpu ops are requested.
Improve code style and fix indentations.
Fix incorrect line break when cpu info is not available.
Remove unneeded brackets.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoserial: add serial driver for BCM6345
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:16 +0000 (00:39 +0200)]
serial: add serial driver for BCM6345

It is based on linux/drivers/tty/serial/bcm63xx_uart.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMIPS: allow using generic sysreset drivers
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:15 +0000 (00:39 +0200)]
MIPS: allow using generic sysreset drivers

Avoid duplicating do_reset definition if SYSRESET is enabled for MIPS

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agosysreset: add syscon-reboot driver
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:14 +0000 (00:39 +0200)]
sysreset: add syscon-reboot driver

Add a new sysreset driver based on linux/drivers/power/reset/syscon-reboot.c,
which provides a generic driver for platforms that only require writing a mask
to a regmap offset.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agocmd: cpu: fix NULL cpu feature prints
Álvaro Fernández Rojas [Mon, 24 Apr 2017 22:39:13 +0000 (00:39 +0200)]
cmd: cpu: fix NULL cpu feature prints

Commit 740d5d3 added two new features but only one feature name,
which results in NULL prints when device_id feature is selected.

Before:
HG556a # cpu detail
 -1: cpu@0 BCM6358A1
ID = 0, freq = 300 MHz: L1 cache, MMU, NULL
Device ID 0x2a010
 -1: cpu@1 BCM6358A1
ID = 1, freq = 300 MHz: L1 cache, MMU, NULL
Device ID 0x2a010
After:
HG556a # cpu detail
 -1: cpu@0 BCM6358A1
ID = 0, freq = 300 MHz: L1 cache, MMU, Device ID
Device ID 0x2a010
 -1: cpu@1 BCM6358A1
ID = 1, freq = 300 MHz: L1 cache, MMU, Device ID
Device ID 0x2a010

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMIPS: call debug_uart_init right before board_init_f
Daniel Schwierzeck [Mon, 24 Apr 2017 17:03:34 +0000 (19:03 +0200)]
MIPS: call debug_uart_init right before board_init_f

All MIPS boards that support debug uart are calling debug_uart_init right at
the beginning of board_early_init_f.
Instead of doing that, let's provide a generic call to debug_uart_init right
before the call to board_init_f if debug uart is enabled for boards without
stack in SRAM.
On the other hand, boards with stack in SRAM can call earlier (right before
low level init).

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7 years agoMIPS: tl-wdr4300: remove debug_uart_init call
Álvaro Fernández Rojas [Mon, 24 Apr 2017 17:03:33 +0000 (19:03 +0200)]
MIPS: tl-wdr4300: remove debug_uart_init call

In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
WDR4300 doesn't provide a board_debug_uart_init and configures pinmux in
board_early_init_f instead. Since I have no idead of what's the needed uart
pinmux config, I copied the whole pinmux config to a new function that is
called from board_early_init_f if CONFIG_DEBUG_UART_BOARD_INIT is not enabled.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7 years agoMIPS: QCA AP143: remove debug_uart_init call
Álvaro Fernández Rojas [Mon, 24 Apr 2017 17:03:32 +0000 (19:03 +0200)]
MIPS: QCA AP143: remove debug_uart_init call

In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7 years agoMIPS: QCA AP121: remove debug_uart_init call
Álvaro Fernández Rojas [Mon, 24 Apr 2017 17:03:31 +0000 (19:03 +0200)]
MIPS: QCA AP121: remove debug_uart_init call

In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7 years agou-boot.elf: add quiet_cmd_u-boot-elf and cmd_u-boot-elf
Álvaro Fernández Rojas [Thu, 20 Apr 2017 18:36:28 +0000 (20:36 +0200)]
u-boot.elf: add quiet_cmd_u-boot-elf and cmd_u-boot-elf

This way we can see output about u-boot.elf being built or not.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMIPS: add support for generating u-boot.elf
Álvaro Fernández Rojas [Thu, 20 Apr 2017 18:36:27 +0000 (20:36 +0200)]
MIPS: add support for generating u-boot.elf

Define PLATFORM_ELFFLAGS for MIPS in order to be able to generate u-boot.elf

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
7 years agou-boot.elf: allow overriding entry symbol
Álvaro Fernández Rojas [Thu, 20 Apr 2017 18:36:26 +0000 (20:36 +0200)]
u-boot.elf: allow overriding entry symbol

LD gives the following warning when trying to process u-boot-elf.o
warning: cannot find entry symbol __start; defaulting to 0000000080010000
According to gnu-libc the entry symbol for mips is __start and not _start:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/dl-machine.h;h=ed47513ccc1d23d23d32ee640053d2f351f3990b;hb=HEAD#l258

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agou-boot.elf: remove hard-coded arm64 flags
Álvaro Fernández Rojas [Thu, 20 Apr 2017 18:36:25 +0000 (20:36 +0200)]
u-boot.elf: remove hard-coded arm64 flags

This is needed in order to allow building it for other archs.
Move relocation comment to a better place.
Remove no longer needed dts FIXME.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 9 May 2017 20:11:36 +0000 (16:11 -0400)]
Merge git://git.denx.de/u-boot-dm

7 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Tue, 9 May 2017 19:48:09 +0000 (15:48 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

7 years agodefconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSI
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:32 +0000 (11:51 +0200)]
defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSI

Enable disk driver model for dra7xx_evm as dwc_ahci supports
driver model. As a consequence we must also enable CONFIG_BLK and
CONFIG_DM_USB.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped CONFIG_SPL_PHY=y in sandbox_spl to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodrivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:31 +0000 (11:51 +0200)]
drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device

Implement a sata driver for Synopsys DWC sata device based on
U-boot driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodra7: dtsi: mark ocp2scp bus compatible with "simple-bus"
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:30 +0000 (11:51 +0200)]
dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"

This is needed to probe devices under that bus such as the SATA PHY.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodrivers: phy: add PIPE3 phy driver
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:29 +0000 (11:51 +0200)]
drivers: phy: add PIPE3 phy driver

This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: test: Add tests for the generic PHY uclass
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:28 +0000 (11:51 +0200)]
dm: test: Add tests for the generic PHY uclass

Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodrivers: phy: add generic PHY framework
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:27 +0000 (11:51 +0200)]
drivers: phy: add generic PHY framework

The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoscsi: dm: split scsi_scan()
Jean-Jacques Hiblot [Mon, 24 Apr 2017 09:51:26 +0000 (11:51 +0200)]
scsi: dm: split scsi_scan()

The DM version of scsi_scan() is becoming a bit long, it can be split:
scsi_scan() iterates over the IDs and LUNs and for each id/lun pair calls
do_scsi_scan_one() to do the work of:
 - detecting an attached drive
 - creating the associated block device if a drive is found.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9263ek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 07:31:02 +0000 (15:31 +0800)]
board: at91sam9263ek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9263ek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 07:31:01 +0000 (15:31 +0800)]
board: at91sam9263ek: Clean up code

Because the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9263ek: Update for DT and DM support
Wenyou Yang [Tue, 18 Apr 2017 07:31:00 +0000 (15:31 +0800)]
configs: at91sam9263ek: Update for DT and DM support

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9rlek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 07:28:29 +0000 (15:28 +0800)]
board: at91sam9rlek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9rlek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 07:28:28 +0000 (15:28 +0800)]
board: at91sam9rlek: Clean up code

Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9rlek: Update for DT and DM support
Wenyou Yang [Tue, 18 Apr 2017 07:28:27 +0000 (15:28 +0800)]
configs: at91sam9rlek: Update for DT and DM support

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9260ek/9g20ek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 07:18:49 +0000 (15:18 +0800)]
board: at91sam9260ek/9g20ek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9260ek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 07:18:48 +0000 (15:18 +0800)]
board: at91sam9260ek: Clean up code

Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9260ek/9g20ek: Update for DT and DM
Wenyou Yang [Tue, 18 Apr 2017 07:18:47 +0000 (15:18 +0800)]
configs: at91sam9260ek/9g20ek: Update for DT and DM

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9m10g45ek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 07:15:50 +0000 (15:15 +0800)]
board: at91sam9m10g45ek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9m10g45ek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 07:15:49 +0000 (15:15 +0800)]
board: at91sam9m10g45ek: Clean up code

Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9m10g45ek: Update to support DM/DT
Wenyou Yang [Tue, 18 Apr 2017 07:15:48 +0000 (15:15 +0800)]
configs: at91sam9m10g45ek: Update to support DM/DT

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9n12ek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 06:54:53 +0000 (14:54 +0800)]
board: at91sam9n12ek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9n12ek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 06:54:52 +0000 (14:54 +0800)]
board: at91sam9n12ek: Clean up code

Since the introduction of the pinctrl and clk driver and the device
tree files, remove unneeded related code from the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9n12ek: Update for DT and DM support
Wenyou Yang [Tue, 18 Apr 2017 06:54:51 +0000 (14:54 +0800)]
configs: at91sam9n12ek: Update for DT and DM support

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9x5ek: Enable early debug UART
Wenyou Yang [Tue, 18 Apr 2017 06:51:56 +0000 (14:51 +0800)]
board: at91sam9x5ek: Enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoboard: at91sam9x5ek: Clean up code
Wenyou Yang [Tue, 18 Apr 2017 06:51:55 +0000 (14:51 +0800)]
board: at91sam9x5ek: Clean up code

Since the introduction of the pinctrl and clock driver and the device
tree files, remove unneeded hard coded related code from the board
file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: at91sam9x5ek: Update to support DM/DT
Wenyou Yang [Tue, 18 Apr 2017 06:51:54 +0000 (14:51 +0800)]
configs: at91sam9x5ek: Update to support DM/DT

Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.

Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9263ek
Wenyou Yang [Tue, 18 Apr 2017 05:49:39 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9263ek

The device tree source files of at91sam9263ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9rlek
Wenyou Yang [Tue, 18 Apr 2017 05:49:38 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9rlek

The device tree source files of at91sam9rlek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9260ek/9g20ek
Wenyou Yang [Tue, 18 Apr 2017 05:49:37 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9260ek/9g20ek

The device tree source files of at91sam9g20ek and at91sam9260ek
boards are copied from the Linux v4.10, do the changes below.
 - Fix the build error for the usb0 node.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property for the dbgu node are used
   in board_init_f stage.
 - Add the clk pinctrl of the mmc0 node.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9m10g45ek
Wenyou Yang [Tue, 18 Apr 2017 05:49:36 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9m10g45ek

The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9n12ek
Wenyou Yang [Tue, 18 Apr 2017 05:49:35 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9n12ek

The device tree source files of at91sam9n12ek boards are copied from
the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the pinctrl-names of mmc0 node.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: at91: Add dts files for at91sam9x5ek
Wenyou Yang [Tue, 18 Apr 2017 05:49:34 +0000 (13:49 +0800)]
ARM: dts: at91: Add dts files for at91sam9x5ek

The device tree source files of at91sam9x5ek board are copied from
the Linux v4.10, do the changes below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC ...) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Add the "u-boot,dm-pre-reloc" property to determine which nodes
   are used by the board_init_f stage.
 - Change the compatible of the spi flash to "spi-flash".
 - Add the spi0 aliases.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoserial: atmel_usart: Add clk support
Wenyou Yang [Fri, 14 Apr 2017 07:01:28 +0000 (15:01 +0800)]
serial: atmel_usart: Add clk support

Add the clock support.
Note that the clock handling of the DBGU peripheral is different
from the USART.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoserial: atmel_usart: Fix early debug not work in SPL
Wenyou Yang [Fri, 14 Apr 2017 07:01:27 +0000 (15:01 +0800)]
serial: atmel_usart: Fix early debug not work in SPL

Add the uart init function to be used on both probe and the early
debug uart init. For the latter, the input clock should be from
CONFIG_DEBUG_UART_CLOCK.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoclk: at91: Align the at91 pmc's compatibles
Wenyou Yang [Fri, 14 Apr 2017 06:53:24 +0000 (14:53 +0800)]
clk: at91: Align the at91 pmc's compatibles

Align the at91 pmc's compatibles with kernel.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoclk: at91: Align clk-master compatibles with kernel
Wenyou Yang [Fri, 14 Apr 2017 06:53:23 +0000 (14:53 +0800)]
clk: at91: Align clk-master compatibles with kernel

Add the compatible "atmel,at91rm9200-clk-master" to align with
the kernel.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoclk: at91: Enhance the peripheral clock
Wenyou Yang [Fri, 14 Apr 2017 06:53:22 +0000 (14:53 +0800)]
clk: at91: Enhance the peripheral clock

Enhance the peripheral clock to support both at9sam9x5's and
at91rm9200's peripheral clock via the different compatibles.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agonet: macb: Align the compatibles with kernel
Wenyou Yang [Fri, 14 Apr 2017 06:36:05 +0000 (14:36 +0800)]
net: macb: Align the compatibles with kernel

Add the compatibles to align with the kernel.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: macb: Add remove callback
Wenyou Yang [Fri, 14 Apr 2017 06:36:04 +0000 (14:36 +0800)]
net: macb: Add remove callback

To avoid the failure of mdio_register(), add the remove callback
to unregister the mii_dev when removing the ethernet device.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fixed up unused variable warning, e.g. for gurnard:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: sama5d3xek: add default config for CMP board
Wenyou Yang [Fri, 24 Mar 2017 01:26:16 +0000 (09:26 +0800)]
configs: sama5d3xek: add default config for CMP board

The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865, and
some power rails. The board is mainly used to measure the power
consumption. As all those changes are done in at91bootstrap,
in U-Boot, only use another device tree file, no code needed
to change.

As there is additional power consumption when enbling the USB
Host and USB device, for the power consumption measurement
intention, disable the USB host and device.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoboard: sama5d4ek: fix DD2 configuration
Wenyou Yang [Thu, 23 Mar 2017 06:35:33 +0000 (14:35 +0800)]
board: sama5d4ek: fix DD2 configuration

Fix the DDR2 configuration to make SPL work.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoconfigs: sama5d2_xplained: update for SPL
Wenyou Yang [Thu, 23 Mar 2017 06:26:28 +0000 (14:26 +0800)]
configs: sama5d2_xplained: update for SPL

Enable config options to support the SPL, increase the malloc
memory size for the SPL and board_init_f stage and increase
the memory space for the SPL binary.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoboard: sama5d2_xplained: remove unnecessary header files
Wenyou Yang [Thu, 23 Mar 2017 06:26:27 +0000 (14:26 +0800)]
board: sama5d2_xplained: remove unnecessary header files

Remove the unnecessary header files.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoboard: sama5d2_xplained: remove uart1 init
Wenyou Yang [Thu, 23 Mar 2017 06:26:26 +0000 (14:26 +0800)]
board: sama5d2_xplained: remove uart1 init

Due to the pin configuration and clock enabling is handling by the
driver, remove the unneeded hardcode uart1 init during
board_early_init_f stage.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoboard: sama5d2_xplained: clean up macb init code
Wenyou Yang [Thu, 23 Mar 2017 06:26:25 +0000 (14:26 +0800)]
board: sama5d2_xplained: clean up macb init code

Because the MACB driver supports the driver model and device tree,
the pins configuration and clock enabling are handled by the
pinctrl driver and clock driver, remove this hardcoded init code.

The USB Ether init code is removed as well.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoconfigs: sama5d2_xplained: enable CONFIG_DM_ETH
Wenyou Yang [Thu, 23 Mar 2017 06:26:24 +0000 (14:26 +0800)]
configs: sama5d2_xplained: enable CONFIG_DM_ETH

Enable CONFIG_DM_ETH to make MACB to support driver model.

Because the USB Ether doesn't support driver model so far,
remove this feature.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: sama5d2_xplained: update for SPL
Wenyou Yang [Thu, 23 Mar 2017 06:26:23 +0000 (14:26 +0800)]
ARM: dts: sama5d2_xplained: update for SPL

Add the "u-boot,dm-pre-reloc" property to determine which nodes
which are needed by SPL and by the board_init_f stage.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: sama5d2: add clock property for uart1 node
Wenyou Yang [Thu, 23 Mar 2017 06:26:22 +0000 (14:26 +0800)]
ARM: dts: sama5d2: add clock property for uart1 node

Add clock property for uart1 node.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 9 May 2017 13:13:59 +0000 (09:13 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

7 years agop1_p2_rdb: Fix unused variable warning
Tom Rini [Wed, 19 Apr 2017 02:26:35 +0000 (22:26 -0400)]
p1_p2_rdb: Fix unused variable warning

With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.

Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodm: Update Simple Watchdog uclass
Maxim Sloyko [Tue, 9 May 2017 13:08:07 +0000 (09:08 -0400)]
dm: Update Simple Watchdog uclass

- Remove "probe" function from sandbox wdt driver
- Fix include order

Fixes: 0753bc2d30d7 ("dm: Simple Watchdog uclass")
Signed-off-by: Maxim Sloyko <maxims@google.com>
[trini: Create as the delta between v1 (applied) and v2 (should have
 applied)].
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoARM: mvebu: switch db-88f6820-amc to DM for i2c
Chris Packham [Tue, 2 May 2017 08:35:25 +0000 (20:35 +1200)]
ARM: mvebu: switch db-88f6820-amc to DM for i2c

Move existing configuration from header file to defconfig or dts as
appropriate.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoarm64: mvebu: Fix the bubt comamnd NAND device support
Konstantin Porotchkin [Tue, 28 Mar 2017 15:16:56 +0000 (18:16 +0300)]
arm64: mvebu: Fix the bubt comamnd NAND device support

Fix the NAND structures in bubt command according to latest
changes in MTD API.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agofix: nand: pxa3xx: Remove hardcode values from the driver
Konstantin Porotchkin [Tue, 28 Mar 2017 15:16:54 +0000 (18:16 +0300)]
fix: nand: pxa3xx: Remove hardcode values from the driver

Obtain NAND controller setup parameters from the device
tree instead of using hardcoded values.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Scott Wood <oss@buserror.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
7 years agofix: phy: marvell: cp110: pcie: update analog parameters according to latest ETP
Igal Liberman [Mon, 24 Apr 2017 15:45:33 +0000 (18:45 +0300)]
fix: phy: marvell: cp110: pcie: update analog parameters according to latest ETP

Add PCIE analog parameters initialization values according to
latest ETP.

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>