This patch enables NFSv3 support.
If NFSv2 is available use it as usual.
If NFSv2 is not available, but NFSv3 is available, use NFSv3.
If NFSv2 and NFSv3 are not available, print an error message since NFSv4 is not supported.
Tested on iMX6 sabrelite with 4 Linux NFS servers:
* NFSv2 + NFSv3 + NFSv4 server: use NFSv2 protocol
* NFSv2 + NFSv3 server: use NFSv2 protocol
* NFSv3 + NFSv4 server: use NFSv3 protocol
* NFSv3 server: use NFSv3 protocol
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@konsulko.com> Cc: joe.hershberger@ni.com Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Mon, 15 Aug 2016 19:42:16 +0000 (14:42 -0500)]
net: nfs: Remove separate buffer for default name
There is no reason to store the default filename in a separate buffer
only to immediately copy it to the main name buffer. Just write it there
directly and remove the other buffer.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Alexander Graf [Thu, 18 Aug 2016 21:45:18 +0000 (23:45 +0200)]
efi_loader: Fix relocations above 64kb image size
We were truncating the image offset within the target image to 16 bits
which again meant that we were potentially overwriting random memory
in the lower 16 bits of the image.
This patch casts the offset to a more reasonable 32bits.
With this applied, I can successfully see Shell.efi assert because it
can't find a protocol it expects to be available.
Andreas Fenkart [Wed, 17 Aug 2016 21:41:53 +0000 (23:41 +0200)]
tools/env: return with error if redundant environments have unequal size
For double buffering to work, the target buffer must always be big
enough to hold all data. This can only be ensured if buffers are of
equal size, otherwise one must be smaller and we risk data loss
when copying from the bigger to the smaller buffer.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 17 Aug 2016 10:55:36 +0000 (16:25 +0530)]
ARM: OMAP4+: vcores: Remove duplicated code
There is no reason to duplicate code for DRA7xx platforms as there
can be Rail grouping. The maximum voltage detection algorithm can still
be run on other platforms with no Rail grouping and does not harm as
it gives the same result.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 17 Aug 2016 10:55:35 +0000 (16:25 +0530)]
ARM: OMAP5+: vcores: Drop unnecessary #ifndefs
gpio_en field is introduced to detect if pmic is controlled by GPIO.
Make this field 0 on all TPS659* pmics available on DRA7/OMAP5 based platforms
and remove the #ifndefs.
Stephen Warren [Wed, 17 Aug 2016 01:58:59 +0000 (19:58 -0600)]
test/py: match prompt only at line boundaries
This prevents capture of command output from terminating early on boards
that use a simple prompt (e.g. "=> ") that appears in the middle of
command output (e.g. crc32's "... ==> 2fa737e0").
Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
James Byrne [Tue, 16 Aug 2016 17:16:28 +0000 (18:16 +0100)]
common: cli_readline: Improve command line editing
This improves the cread_line() function so that it will correctly
process the 'Home', 'End', 'Delete' and arrow key escape sequences
produced by various terminal emulators. This makes command line editing
a more pleasant experience.
The previous code only supported the cursor keys and the 'Home' key, and
only for certain terminal emulator configurations. This adds support for
the 'End and 'Delete' keys, and recognises a wider range of escape
sequences. For example, the left arrow key can be 'ESC O D' instead of
'ESC [ D', and the 'Home' key can be 'ESC [ H', 'ESC O H', 'ESC 1 ~' or
'ESC 7 ~', depending on what terminal emulator you use and how it is
configured.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Changes for v2
- Explicitly initialize variable to avoid spurious compiler warning.
Changes for v3
- Remove unnecessary setting of 'act' to ESC_REJECT (now its default
value).
Tom Rini [Fri, 12 Aug 2016 12:31:17 +0000 (08:31 -0400)]
Kconfig: DISTRO_DEFAULTS: Only enable CMD_BOOTZ for ARM
The 'bootz' command is really only for ARM32 Linux Kernel 'zImage' files
but has also been adapted for testing with sandbox. Given that sandbox
is a test platform, don't add that logic under DISTRO_DEFAULTS.
Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 12 Aug 2016 12:31:15 +0000 (08:31 -0400)]
cmd: Split 'bootz' and 'booti' out from 'bootm'
The bootz and booti commands rely on common functionality that is found
in common/bootm.c and common/bootm_os.c. They do not however rely on
the rest of cmd/bootm.c to be implemented so split them into their own
files. Have various Makefiles include the required infrastructure for
CONFIG_CMD_BOOT[IZ] as well as CONFIG_CMD_BOOTM. Move the declaration
of 'images' over to common/bootm.c.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Maxime Ripard [Tue, 5 Jul 2016 08:26:45 +0000 (10:26 +0200)]
cmd: fdt: add fdt overlay application subcommand
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB or the raspberry pi).
However, so far, the usual mechanism to deal with it was to have in Linux
some driver detecting the expansion boards plugged in and then request
these overlays using the firmware interface.
That works in most cases, but in some cases, you might want to have the
overlays applied before the userspace comes in. Either because the new
board requires some kind of an early initialization, or because your root
filesystem is accessed through that expansion board.
The easiest solution in such a case is to simply have the component before
Linux applying that overlay, removing all these drawbacks.
Reviewed-by: Stefan Agner <stefan@agner.ch> Acked-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 5 Jul 2016 08:26:44 +0000 (10:26 +0200)]
libfdt: Add overlay application function
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB, the Raspberry Pi or the CHIP).
Add a new function to merge overlays with a base device tree.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 5 Jul 2016 08:26:38 +0000 (10:26 +0200)]
libfdt: Add iterator over properties
Implement a macro based on fdt_first_property_offset and
fdt_next_property_offset that provides a convenience to iterate over all
the properties of a given node.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Simon Glass <sjg@chromium.org>
Maxime Ripard [Tue, 5 Jul 2016 08:26:35 +0000 (10:26 +0200)]
scripts: Makefile.lib: Sanitize DTB names
Having dashes as a separator in the DTB name is a quite common practice.
However, the current code to generate objects from DTBs assumes the
separator is an underscore, leading to a compilation error when building a
device tree with dashes.
Replace all the dashes in the DTB name to generate the symbols name, which
should solve this issue.
Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Stefan Roese [Mon, 15 Aug 2016 11:50:59 +0000 (13:50 +0200)]
x86: Add theadorable-x86-dfi-bt700 board support
This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
The main difference to the DFI baseboard is, that it isn't equipped
with a Super IO chip and uses the internal HS SIO UART (memory mapped
PCI based) as the console UART.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 15 Aug 2016 11:50:49 +0000 (13:50 +0200)]
x86: Add DFI BT700 BayTrail board support
This patch adds support for the DFI BayTrail BT700 QSeven SoM installed
on the DFI Q7X-151 baseboard. The baseboard is equipped with the Nuvoton
NCT6102D Super IO chip providing the UART as console.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Tue, 28 Jun 2016 13:45:13 +0000 (15:45 +0200)]
x86: conga-qeval20-qa3: Add SMBus support and SMSC2513 config code
This patch includes the following changes:
- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.
This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: George McCollister <george.mccollister@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Yaroslav K [Tue, 9 Aug 2016 03:32:15 +0000 (20:32 -0700)]
cbfs: Fix incorrect CBFS file header size being used
This fixes incorrect filenames in cbfsls output.
Signed-off-by: Yaroslav K. <yar444@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[clean up checkpatch errors and warnings] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 2 Aug 2016 03:53:53 +0000 (20:53 -0700)]
x86: bayleybay: Add PS/2 keyboard and mouse to ASL file
Without PS/2 keyboard and mouse in the ASL file, Windows does not
see them. No problem for Linux as it probes keyboard and mouse via
the legacy 8042 I/O port.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Explicitly enable ILB_SERIRQ function 1 in
cfio_regs_pad_ilb_serirq_PCONF0.
Pad configuration for SERIRQ is not set to enable the SERIRQ function
after a reset though strangely, it is on initial boot.
Rebooting from Linux, reset command in u-boot and even pushing the reset
button on the development board all lead to the SERIRQ function being
disabled (address 0xfed0c560 with value of 0x2003cc80).
Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Tue, 19 Jul 2016 05:45:46 +0000 (07:45 +0200)]
misc: Add simple driver for some Nuvoton NCT6102D devices
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Tue, 19 Jul 2016 05:41:25 +0000 (07:41 +0200)]
x86: baytrail: Add SIO HS-UART clock setup
To support the BayTrail internal SIO HS UART, the internal UART clock
needs to get configured. This patch adds support for this clock
configuration which will be done, if the PCI device(s) are found.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 18 Jul 2016 10:53:31 +0000 (12:53 +0200)]
x86: cache.h: Add default for CONFIG_SYS_CACHELINE_SIZE
Don't just define ARCH_DMA_MINALIGN but also CONFIG_SYS_CACHELINE_SIZE
if it's undefined. This is needed for the xhci driver to compile.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Wed, 13 Jul 2016 06:23:40 +0000 (08:23 +0200)]
x86: doc: Add note about the debug FSP usage on BayTrail
The debug FSP image is bigger in size than the normal FSP image. This
patch adds a small description on how to use this FSP debug version
by changing CONFIG_FSP_ADDR.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add entry for the missing internal UART defconfig to the MAINTAINERS
file.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Jaehoon Chung [Fri, 12 Aug 2016 02:39:05 +0000 (11:39 +0900)]
mmc: mmc_legacy: fix the compiler error with disabled CONFIG_DM_MMC_OPS
To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.
drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’
drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’
make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Yangbo Lu [Tue, 2 Aug 2016 07:33:18 +0000 (15:33 +0800)]
mmc: send CMD0 before CMD1 for some MMC cards
When the MMC framework was added in u-boot, the mmc_go_idle was
added before mmc_send_op_cond_iter in function mmc_send_op_cond
annotating that some cards seemed to need this. Actually, we still
need to do this in function mmc_complete_op_cond for those cards.
This has been verified on Micron MTFC4GACAECN eMMC chip.
Sekhar Nori [Wed, 10 Aug 2016 13:54:03 +0000 (19:24 +0530)]
drivers: mmc: omap_hsmmc: fix build breakage
structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.
When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:
CC drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata':
../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted'
priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
^
Fix this by accessing cd_inverted only when
OMAP_HSMMC_USE_GPIO is defined.
Signed-off-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 15 Aug 2016 17:02:15 +0000 (13:02 -0400)]
common: env_nand: Ensure that we have nand_info[0] prior to use
Now that nand_info[] is an array of pointers we need to ensure that it's
been populated prior to use. We may for example have ENV in NAND set in
configurations that run on boards with and without NAND (where default
env is fine enough, such as omap3_beagle and beagleboard (NAND) vs
beagle xM (no NAND)).
Fixes: b616d9b0a708 ("nand: Embed mtd_info in struct nand_chip") Cc: Scott Wood <oss@buserror.net> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Scott Wood <oss@buserror.net>
Andreas Fenkart [Thu, 11 Aug 2016 19:39:17 +0000 (21:39 +0200)]
tools/env: ensure environment starts at erase block boundary
56086921 added support for unaligned environments access.
U-boot itself does not support this:
- env_nand.c fails when using an unaligned offset. It produces an
error in nand_erase_opts{drivers/mtd/nand/nand_util.c}
- in env_sf/env_flash the unused space at the end is preserved, but
not in the beginning. block alignment is assumed
- env_sata/env_mmc aligns offset/length to the block size of the
underlying device. data is silently redirected to the beginning of
a block
There is seems no use case for unaligned environment. If there is
some useful data at the beginning of the the block (e.g. end of u-boot)
that would be very unsafe. If the redundant environments are hosted by
the same erase block then that invalidates the idea of double buffering.
It might be that unaligned access was allowed in the past, and that
people with legacy u-boot are trapped. But at the time of 56086921
it wasn't supported and due to reasons above I guess it was never
introduced.
I prefer to remove that (unused) feature in favor of simplicity
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Max Filippov [Wed, 10 Aug 2016 15:36:47 +0000 (18:36 +0300)]
xtensa: add core information for the de212 processor
DE212 is a general purpose xtensa processor without full MMU.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Max Filippov [Wed, 10 Aug 2016 15:36:46 +0000 (18:36 +0300)]
xtensa: add core information for the dc233c processor
DC233C is an xtensa processor with full MMUv3 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Zankel [Wed, 10 Aug 2016 15:36:45 +0000 (18:36 +0300)]
xtensa: add core information for the dc232b processor
DC232B is an xtensa processor with full MMUv2 capable of running Linux.
Core information files are autogenerated from the processor description
and are not meant to be edited.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Zankel [Wed, 10 Aug 2016 15:36:44 +0000 (18:36 +0300)]
xtensa: add support for the xtensa processor architecture [2/2]
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Tensilica, inc.
This is the second part of the basic architecture port, adding the
'arch/xtensa' directory and a readme file.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Zankel [Wed, 10 Aug 2016 15:36:43 +0000 (18:36 +0300)]
xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible,
and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to
common files. The 'arch/xtensa' directory, and boards and additional
drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
vexpress: Check TC2 firmware support before defaulting to nonsec booting
The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.
Signed-off-by: Jon Medhurst <tixy@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Wenyou Yang [Wed, 10 Aug 2016 02:51:05 +0000 (10:51 +0800)]
mmc: atmel_sdhci: Convert to the driver model support
Convert the driver to the driver model while retaining the existing
legacy code. This allows the driver to support boards that have
converted to driver model as well as those that have not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Wenyou Yang [Fri, 5 Aug 2016 00:57:35 +0000 (08:57 +0800)]
dm: atmel: Add driver model support for the ehci driver
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Simon Glass <sjg@chromium.org>
Wenyou Yang [Wed, 20 Jul 2016 09:16:27 +0000 (17:16 +0800)]
pinctrl: at91-pio4: Add pinctrl driver
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a child of atmel_pio4 device.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Wenyou Yang [Wed, 20 Jul 2016 09:16:25 +0000 (17:16 +0800)]
gpio: atmel_pio4: Move PIO4 definitions to head file
In order to make these PIO4 definitions shared with AT91 PIO4
pinctrl driver, move them from the existing gpio driver to the
head file, and rephrase them.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andreas Bießmann [Mon, 15 Aug 2016 19:04:41 +0000 (21:04 +0200)]
clk.h: inline clk_get_by_name()
Fix compile warning for non OF_CONTROL builds:
---8<---
In file included from /Volumes/devel/u-boot/drivers/gpio/atmel_pio4.c:10:0:
/Volumes/devel/u-boot/include/clk.h:107:12: warning: 'clk_get_by_name' defined but not used [-Wunused-function]
--->8---
Signed-off-by: Andreas Bießmann <andreas@biessmann.org> Acked-by: Stephen Warren <swarren@nvidia.com>
projects / u-boot / log