Philipp Tomsich [Fri, 4 Aug 2017 12:01:32 +0000 (14:01 +0200)]
spl: moveconfig: remove SPL_LDSCRIPT definitions for header-files
With the hierarchical defaults set up, we remove these from the header
files. To do so, I've run moveconfig on SPL_LDSCRIPT and this commits
the changes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 3 Aug 2017 21:23:55 +0000 (23:23 +0200)]
spl: add hierarchical defaults for SPL_LDSCRIPT
With SPL_LDSCRIPT moved to Kconfig (and this being a 'string' config
node), all the lingering definitions in header files will cause
warnings/errors due to the redefinition of the configuration item.
As we don't want to pollute the defconfig files (and values should
usually be identical for entire architectures), the defaults are moved
into Kconfig. Kconfig will always pick the first default that
matches, so please keep these values at the end of each file (to allow
any board-specific Kconfig, which will be included earlier) to
override with an unconditional default setting.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 3 Aug 2017 20:52:04 +0000 (22:52 +0200)]
rockchip: rk3188: rock: adjust for SPL/TPL split
With the changes to split SPL/TPL for the RK3368, I apparently missed
some needed adjustments to the RK3188 Kconfig and rock_defconfig.
This fixes build-issues for the rock board after applying the RK3368
enablement (and SPL/TPL) set that resulted from TPL_SERIAL_SUPPORT,
TPL_ROCKCHIP_BACK_TO_BROM and TPL_TINY_MEMSET being separate symbols
now.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Yan [Wed, 2 Aug 2017 13:10:56 +0000 (21:10 +0800)]
rockchip: remove the hard coded uart iomux setting for px5 evb
As the debug uart is marked as dm-pre-reloc, the pinctrl driver
will handle the correct iomux setting.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Yan [Wed, 2 Aug 2017 13:10:13 +0000 (21:10 +0800)]
rockchip: set Pre-reloc malloc pool size to 4kb for rk3368 based boards
The default 1kb pre-reloc malloc pool is not enough for dm
core to enable the dm-pre-reloc device drivers.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Wed, 2 Aug 2017 13:08:59 +0000 (21:08 +0800)]
rockchip: add u-boot specific dts for rk3368 based boards
Device drivers like debug serial, dmc should be enabled before
relocation, so add u-boot.dtsi files to contain devices that
should be marked as dm-pre-reloc.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 16:01:49 +0000 (18:01 +0200)]
rockchip: rk3368: remove setup of secure timer from TPL/SPL
When using DM timers w/ the timer0 block within the RK3368, we no
longer depend on the ARMv8 generic timer counting. This allows us to
drop the secure timer initialisation from the TPL and SPL stages.
The secure timer will later be set up by ATF, which starts the ARMv8
generic timer. Thus, there will be a dependency from Linux to the ATF
through the ARMv8 generic timer... this seems reasonable, as Linux
will require the ATF (and PSCI) to start up the secondary cores anyway
(in other words: we don't add any new dependencies).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 16:00:27 +0000 (18:00 +0200)]
rockchip: lion-rk3368: defconfig: enable DM timer for all stages
There is no reasonably robust way (this will be needed so early that
diagnostics will be limited) to specify the base-address of the secure
timer through the DTS for TPL and SPL. In order to allow us a cleaner
way to structure our SPL and TPL stage, we now move to a DM timer
driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 15:43:19 +0000 (17:43 +0200)]
rockchip: timer: add device-model timer driver for RK3368 (and similar)
This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such as the RK3288) for
the down-counting (i.e. non-secure) timers.
This allows us to configure U-Boot for the RK3368 in such a way that
we can run with the secure timer inaccessible or uninitialised (note
that the ARMv8 generic timer does not count, if the secure timer is
not enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 15:38:42 +0000 (17:38 +0200)]
dm: timer: normalise SPL and TPL support
To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
decision for each stage and under control of $(SPL_TPL_)TIMER
instead of having the two-level configuration with TIMER and
$(SPL_TPL_)TIMER_SUPPORT
- when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can
not be compiled in
This normalises configuration to $(SPL_TPL_)TIMER and moves the config
options to drivers/timer/Kconfig (and cleans up the collateral damage
to some defconfigs that had SPL_TIMER_SUPPORT enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 15:19:58 +0000 (17:19 +0200)]
timer: add OF_PLATDATA support for timer-uclass
The timer-uclass depends on full OF_CONTROL through its interrogation
of /chosen and the code to determine the clock-frequency.
For the OF_PLATDATA case, these code-paths are disabled and it becomes
the timer driver's responsibility to correctly set the clock-frequency
in the uclass priv-data.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 11 Aug 2017 18:35:30 +0000 (20:35 +0200)]
configs: mpc85xx: fix fallout from SPL/TPL changes
Splitting the feature selection for SPL and TPL, caused a few build
failures to mpx85xx boards. This fixes the fallout by adding the
needed new option names to the respective defconfig files.
Signed-off-byL Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Klaus Goger [Tue, 18 Jul 2017 19:41:28 +0000 (21:41 +0200)]
rockchip: board: puma_rk3399: rename ATF firmware
prefix the bl31 firmware needed to build uboot.itb so it can coexist in
the build area with ATFs from other boards (i.e. lion_rk3368)
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 5 May 2017 10:33:24 +0000 (12:33 +0200)]
rockchip: board: puma-rk3399: fix warnings in puma_rk3399/fit_spl_atf.its
The ITS file generated warnings due to @<num> designations in the naming
which cause DTC to complain as follows:
Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/pmu@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property
This removes the @<num> part from the names, as we only have a single
image for each payload aspect (and only a single configuration) anyway.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 18:20:41 +0000 (20:20 +0200)]
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE
We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the
whitelist (this time it's really happening!) and migrate the setting
(only used on the RK3368-uQ7 so far) into Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 18:03:07 +0000 (20:03 +0200)]
rockchip: rk3368: mark TPL as not inheriting its stack, text-base and size from SPL
The RK3368 needs to have a different base-address and stack-pointer
for its TPL stage. Now that we want to do this via Kconfig, we need
to tick the appropriate 'TPL_NEEDS_...' boxes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 18:04:09 +0000 (20:04 +0200)]
armv8: TPL_STACK will always be defined, so test CONFIG_TPL_NEEDS_SEPARATE_STACK
Now that TPL_STACK has been moved off the whitelist (ok, I'm lying:
the 'moving off the whitelist' part comes in once moveconfig
runs... which will be a few commits down the line) and added to
Kconfig, we need to test CONFIG_TPL_NEEDS_SEPARATE_STACK to see
whether the value from TPL_STACK should be used or whether we try to
inherit whatever SPL uses.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 18:02:34 +0000 (20:02 +0200)]
spl: support TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE via Kconfig
Let's clean up behind ourselves and move the (newly defined)
TPL_STACK, TPL_MAX_SIZE and TPL_TEXT_BASE into Kconfig. Given that
0x0 might be considered to be valid values for TPL_TEXT_BASE and
TPL_STACK, we need to introduce helper config options
("TPL_NEEDS_SEPARATE_...") to indicate that these symbols are used
(and not inherited from their SPL variants) for any given
target-platform.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 17:20:49 +0000 (19:20 +0200)]
spl: Kconfig: migrate $(SPL_TPL_)LDSCRIPT to Kconfig
Now that we have split up SPL_LDSCRIPT into a SPL and TPL variant and
have started to use the TPL-variant for the RK3368, it's time to clean
up behind ourselves: move both variants into Kconfig and remove them
from the whitelist.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Wed, 12 Jul 2017 23:36:39 +0000 (01:36 +0200)]
rockchip: board: lion-rk3368: add support for the RK3368-uQ7
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm,
MXM-230 edge connector compatible with the Qseven specification)
form-factor system-on-module based on the octo-core Rockchip RK3368.
It is designed, supported and manufactured by Theobroma Systems.
It provides the following features:
- 8x Cortex-A53 (in 2 clusters of 4 cores each)
- (on-module) up to 4GB of DDR3 memory
- (on-module) SPI-NOR flash
- (on-module) eMMC
- Gigabit Ethernet (with an on-module KSZ9031 PHY)
- USB
- HDMI
- MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
- various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 25 Jul 2017 14:25:30 +0000 (16:25 +0200)]
rockchip: spi: enable support for the rk_spi driver for the RK3368
For the RK3368, we can reuse the SPI driver (although we'll have to
eventually investigate whether it can be merged with the
designware_spi.c driver) also used for the RK3288 and RK3399.
This adds the necessary compatible string to support the RK3368.
Note that the assumption that GPLL will be clocked at 594MHz is not
true for the RK3368, but this will not lead to incorrect functioning
(just to a lower-than-expected SPI operating frequency): this has been
documented in the driver, so it doesn't cause any headaches when
someone next needs to touch the clock code of this driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Sun, 11 Jun 2017 21:46:25 +0000 (23:46 +0200)]
rockchip: rk3368: spl: mark SPL and TPL as supported for ROCKCHIP_RK3368
With SPL and TPL support for the RK3368 in place, mark SPL and TPL as
supported from Kconfig for the RK3368. As this is primarily tested on
the RK3368-uQ7, we'll leave it to board's individual defconfig to
enable.
Also enable DEBUG_UART_BOARD_INIT for the RK3368, so we get output
during the early boot-up, as we turn on TPL and SPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Wed, 19 Jul 2017 20:04:32 +0000 (22:04 +0200)]
rockchip: spl: make spl-boot-order code reusable (split from rk3399)
In order to reuse the support for the u-boot,spl-boot-order property
from the rk3399, we split it into a reusable module that can be
included by the SPL code for any of our boards.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 22:27:31 +0000 (00:27 +0200)]
rockchip: rk3368: dts: add DMC node in rk3368.dtsi
For full SPL support, including DRAM initialisation, we need a few
nodes from the DTS: this commit adds the DMC (DRAM controller) node,
the service_msch (memory scheduler) node and marks GRF, PMUGRF and CRU
as 'u-boot,dm-pre-reloc'. In addition to this, we also include the
dt-binding for the DMC to allow DTS files including this DTSI to refer
to the symbolic constants for the DDR3 bin and for the
memory-schedule.
Note that the DMC contains both the memory regions for the
(Designware) protocol controller as well as the DDR PHY.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 22:12:05 +0000 (00:12 +0200)]
rockchip: rk3368: add DRAM controller driver with DRAM initialisation
This adds a DRAM controller driver for the RK3368 and places it in
drivers/ram/rockchip (where the other DM-enabled DRAM controller
drivers for rockchip devices should also be moved eventually).
At this stage, only the following feature-set is supported:
- DDR3
- 32-bit configuration (i.e. fully populated)
- dual-rank (i.e. no auto-detection of ranks)
- DDR3-1600K speed-bin
This driver expects to run from a TPL stage that will later return to
the RK3368 BROM. It communicates with later stages through the
os_reg2 in the pmugrf (i.e. using the same mechanism as Rockchip's DDR
init code).
Unlike other DMC drivers for RK32xx and RK33xx parts, the required
timings are calculated within the driver based on a target frequency
and a DDR3 speed-bin (only the DDR3-1600K speed-bin is support at this
time).
The RK3368 also has the DDRC0_CON0 (DDR ch. 0, control-register 0)
register for controlling the operation of its (single-channel) DRAM
controller in the GRF block. This provides for selecting DDR3, mobile
DDR modes, and control low-power operation.
As part of this change, DDRC0_CON0 is also added to the GRF structure
definition (at offset 0x600).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Handling TPL and SPL in the Makefile for mach-rockchip was based on
nested if checks and/or if-else-if paths. This can be simplified and
made more readable by using $(SPL_TPL_) and by introducing
intermediate variables for the aggregation of SPL and TPL features.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 25 Jul 2017 15:02:51 +0000 (17:02 +0200)]
net: gmac_rockchip: Add support for the RK3368 GMAC
The GMAC in the RK3368 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Philipp Tomsich [Wed, 5 Jul 2017 10:11:58 +0000 (12:11 +0200)]
rockchip: clk: rk3368: mark 'priv' __maybe_unused in rk3368_clk_set_rate()
With the clock support in rk3368_clk_set_rate() conditionalized on
various feature definitions, 'priv' can remain unused (e.g. in the
SPL build when only MMC is enabled).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 14 Jul 2017 17:57:39 +0000 (19:57 +0200)]
rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clock
To enable the GMAC on the RK3368, we need to set up the clocking
appropriately to generate a tx_clk for the MAC.
This adds an implementation that implements the use of the <&ext_gmac>
clock (i.e. an external 125MHz clock for RGMII provided by the PHY).
This is the clock setup used by the boards currently supported by
U-Boot (i.e. Geekbox, Sheep and RK3368-uQ7).
This includes the change from commit
- rockchip: clk: rk3368: define GMAC_MUX_SEL_EXTCLK
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The original clock support for MMC/SD cards on the RK3368 suffered
from a tendency to select a divider less-or-equal to the the one
giving the requested clock-rate: this can lead to higher-than-expected
(or rather: higher than supported) clock rates for the MMC/SD
communiction.
This change rewrites the MMC/SD clock generation to:
* always generate a clock less-than-or-equal to the requested clock
* support reparenting among the CPLL, GPLL and OSC24M parents to
generate the highest clock that does not exceed the requested rate
In addition to this, the Linux DTS uses HCLK_MMC/HCLK_SDMMC instead of
SCLK_MMC/SCLK_SDMMC: to match this (and to ensure that clock setup
always works), we adjust the driver appropriately.
This includes the changes from:
- rockchip: clk: rk3368: convert MMC_PLL_SEL_* definitions to shifted-value form
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 4 Jul 2017 12:50:11 +0000 (14:50 +0200)]
rockchip: clk: rk3368: define DMA1_SRST_REQ and DMA2_SRST_REQ
On he RK3368, we need to temporarily disable security on the DMA
engines during TPL and SPL to allow the MMC host to DMA into DRAM. To
do so, we need to reset the two DMA engines, which in turn requires
the DMA1_SRST_REQ and DMA2_SRST_REQ constants to refer to the
appropriate bits in the CRU.
As the ATF correctly initialises security (and only leaves EL3 after
doing so), this can not pose a security issue.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 21:53:44 +0000 (23:53 +0200)]
rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM
The RK3368 has a somewhat temperamental BootROM (which I learned the
hard way) when it comes to reconfiguring the CPLL and GPLL (in fact,
experiments show that changing the GPLL broke things for me, while
changing the CPLL seems to be more benign). These should not be
modified by the SPL stage, if we intend to return to the BootROM for
chain booting the next stage.
This commit changes the clock initialisation to not change CPLL/GPLL
before returning to the BootROM (i.e. in TPL). As it's safe to change
these settings if we no longer intend to return to U-Boot, we'll run
the full PLL setup a little later (i.e. in SPL).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 21:51:37 +0000 (23:51 +0200)]
rockchip: clk: rk3368: support OF_PLATDATA for the RK3368 clk driver
With the RK3368's limited TPL size, we'll want to use OF_PLATFDATA for
the SPL stage. This implements support for OF_PLATDATA in the clock
driver for the RK3368.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 21:47:11 +0000 (23:47 +0200)]
rockchip: clk: rk3368: implement bandwidth adjust for PLLs
The RK3368 TRM recommends to configure the bandwith adjustment (CON2)
for PLLs to NF/2. This implements this for all reconfigurations of
PLLs and removes the 'has_bwadj' flag (as the RK3368 always has the
bandwidth-adjustment feature according to its manual).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 25 Jul 2017 14:25:10 +0000 (16:25 +0200)]
rockchip: pinctrl: rk3368: add SPI support
To implement pinctrl support for the RK3368, we need to add the
bit-definitions to configure the IOMUX and tie these into the
pinctrl framework. This also adds the mapping from the IRQ# back
onto the periheral id for the SPI devices.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 25 Jul 2017 15:09:23 +0000 (17:09 +0200)]
rockchip: pinctrl: rk3368: move IOMUX bit-definitions to pinctrl driver
There is no real reason to keep the bit-definitions for the IOMUX in
the grf header file (which defines the register layout of the GRF block):
these should only be used by our pinctrl driver (with the possible
exception of early debug-init code in TPL/SPL).
This moves the relevant definitions from the grf_rk3368.h header
into the pinctrl driver pinctrl_rk3368.c.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 14 Jul 2017 18:07:11 +0000 (20:07 +0200)]
rockchip: pinctrl: rk3368: add support for configuring the MMC pins
The RK3368 has two SD/MMC controllers that can be used from U-Boot
both during SPL and for booting an OS from the full bootloader stage.
While both are configured to (mostly) sensible settings from the BROM,
additional configuration for the MMC controller is needed to configure
it to 8bit mode.
This adds pinctrl support for the MMC controller.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 14 Jul 2017 18:00:58 +0000 (20:00 +0200)]
rockchip: pinctrl: rk3368: add GMAC (RGMII only) support
To add GMAC (Gigabit Ethernet) support (limited to RGMII only at this
point), we need support for additional pin-configuration. This commit
adds the pinctrl support for GMAC in RGMII mode:
* adds a PERIPH_ID_GMAC and the mapping from IRQ number to PERIPH_ID
* configures the RGMII pins
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 09:37:33 +0000 (11:37 +0200)]
rockchip: rk3368: dts: add sgrf node
We will to drop device security temporarily (until the ATF initialises
it fully) from the TPL/SPL stage: this requires access to some
registers in the SGRF.
This adds the sgrf node to the rk3368.dtsi, so we can then bind a
syscon device onto it and access its memory ranges.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 25 Jul 2017 15:01:06 +0000 (17:01 +0200)]
rockchip: rk3368: grf: use shifted-constants
The RK3368 GRF header was still defines with a shifted-mask but with
non-shifted function selectors for the IOMUX defines. As the RK3368
support is still fresh enough to allow a quick change, we do this now
before having more code use this.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 28 Jul 2017 09:37:57 +0000 (11:37 +0200)]
rockchip: rk3368: syscon: SGRF support for OF_PLATDATA
In TPL we will need to configure security in the SGRF of the RK3368.
This change adds support for the SGRF as a syscon device, so we can
retrieve its address range through the syscon API in TPL (and can
avoid having to hard-code the address).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 21:25:57 +0000 (23:25 +0200)]
rockchip: rk3368: syscon: MSCH/PMUGRF/GRF support for OF_PLATDATA
The RK3368 has both a limited TPL size (just 0x7000 bytes) and the
added challenge of booting in AArch64, which increases the code size
for TPL (particularily when using the LP64 programming model). For
this reason we expect the RK3368 to always use OF_PLATDATA for its
TPL stage.
This change adds support for the MSCH, PMUGRF and GRF register regions
in syscon, which are necessary for initialising the RK3368's DRAM
controller.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 14 Jul 2017 15:52:09 +0000 (17:52 +0200)]
rockchip: rk3368: spl: add memory layout for TPL and SPL
For the RK3368, we use a multi-stage boot-process consisting of the
following:
1. TPL: initalises DRAM, returns to boot-ROM (which then loads
the next stage and transfers control to it)
2. SPL: a full-features SPL stage including OF_CONTROL and FIT
image loading, which fetches the ATF, DTB and full U-Boot
and then transfers control to the ATF (using the BL31
parameter block to indicate the location of BL33/U-Boot)
3. ATF: sets up the secure world and exits to BL33 (i.e. a full
U-Boot) in the normal world
4. full U-Boot
TPL/SPL and the full U-Boot are built from this tree and need to
run from distinct text addresses and with distinct initial stack
pointer addresses.
This commit sets up the configuration to run:
- TPL from the SRAM at 0xff8c0000 (note that the first 0x1000
are reserved for use by the boot-ROM and contain the SP
when the TPL is entered)
- SPL from DRAM at 0x0
- U-Boot from DRAM at 0x200000
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 21:31:55 +0000 (23:31 +0200)]
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz
The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0.
This change defines COUNTER_FREQUENCY, which is used by the AArch64 init
code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0.
If the counter-frequency is not correctly set up, the calculation of
delays using the ARMv8 generic timer can not work correctly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 11 Jul 2017 11:42:55 +0000 (13:42 +0200)]
rockchip: rk3368: pmugrf: add definitions for os_reg[0..3]
On the RK3368 we use a TPL-stage similar to Rockchip's DDR init
(i.e. it initialises DRAM, leaves some info for the next stage and
returns to the BootROM). To allow compatibility with Rockchip's DDR
init code, we use the same register os_reg2 in pmugrf for passing
this info (i.e. DRAM size and configuration) between stages.
This change adds the definitions for os_reg[0] through os_reg[3] to
the pmugrf structure for the RK3368.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 9 Jun 2017 22:47:53 +0000 (00:47 +0200)]
rockchip: rk3368: improve Kconfig text for the RK3368
The RK3368 option in Kconfig referred to the RK3328 (copy-and-paste)
and had a few typos and unnecessarily used UTF-8 characters. While
fixing this, I also reformatted and further clarified the text
(e.g. made the grouping into a a big and little cluster of 4 cores
each explicit).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 22 Jun 2017 23:04:47 +0000 (01:04 +0200)]
rockchip: Makefile: allow selective inclusion of sdram_common.o from TPL/SPL/U-Boot
The utility functions in sdram_common.c will be useful both for some
SPL implementations (and if unused, the linked will discard these
anyway) and for the full U-Boot stage.
This changes selects sdram_common.o through the $(SPL_TPL_) macro to
allow better control of its inclusion through the CONFIG_ROM,
CONFIG_SPL_RAM or CONFIG_TPL_RAM options.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 4 Jul 2017 09:29:55 +0000 (11:29 +0200)]
drivers: spl: consistently use the $(SPL_TPL_) macro
To simplify drivers/Makefile a bit when using TPL/SPL, we consistently
use the $(SPL_TPL_) macro to test for drivers that have separate
configuration symbols for the full U-boot, SPL and TPL stages.
Instead of explicitly repeating them in two separate if-guarded
sections of the Makefile, we can now simply list these options once.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 12:27:02 +0000 (14:27 +0200)]
spl: add TPL_DRIVER_MISC_SUPPORT option
This adds the TPL_DRIVER_MISC_SUPPORT option to allow activation of
DRIVER_MISC_SUPPORT for devices that need it in the TPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 09:16:47 +0000 (11:16 +0200)]
spl: consistently use $(SPL_TPL_) to select features for SPL and TPL builds
To allow for a finer-grained control of features for TPL and SPL
builds all modules/boot-methods/etc. need to be consistently selected
based on the $(SPL_TPL_) macros.
This allows splitting the associated config-options in Kconfig: we
don't split the Kconfig options here and now, as this should happen on
an as-needed basis, whenever someone needs a feature/boot-method/etc.
in their TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 09:09:55 +0000 (11:09 +0200)]
lib: spl: differentiate between TPL and SPL for libfdt/of_control/of_platdata
This splits the compilation of code modules for TPL and SPL for
OF_CONTROL (and related) features between TPL and SPL. The typical
use-case of this is a TPL stage that uses OF_PLATDATA at TPL and
provides full OF_CONTROL at SPL (e.g. on the RK3368).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Fri, 30 Jun 2017 16:57:25 +0000 (18:57 +0200)]
spl: Kconfig: split SYS_MALLOC_SIMPLE for TPL and SPL
As include/malloc.h already checks for SYS_MALLOC_SIMPLE using the
CONFIG_IS_ENABLED macro, we need to move to having separate entries
as we switch to fully separate configuration for SPL and TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 12:47:46 +0000 (14:47 +0200)]
spl: allow a separate TEXT_BASE, LDSCRIPT and MAX_SIZE for TPL
For the bringup of the RK3368, we need to support TPL and SPL running
from different addresses... which requires both stages to use a
distinct TEXT_BASE.
This commit adds support for having a separate LDSCRIPT for TPL (which
is expected to make use of the TPL_MAX_SIZE define) and for having a
the option of defining TPL_TEXT_BASE and having the TPL stage linked
against this address.
Note that the handling of the TEXT_BASE is designed to not interfere
with the previous assumption that SPL_TEXT_BASE should be used for TPL
as well, unless TPL_TEXT_BASE is defined. For this reason, the test
in Makefile.spl uses the following (seemingly redundant checks):
1. looks for $(SPL_TPL_)TEXT_BASE
2. looks for SPL_TEXT_BASE (even when building in TPL)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 4 Jul 2017 09:02:14 +0000 (11:02 +0200)]
armv8: spl: Support separate stack for TPL
To allow a TPL and SPL to run from different addresses/memories, we
need to split setup of the TPL and SPL stacks. To do so, we introduce
CONFIG_TPL_STACK (not listed in Kconfig) which can be used to override
the initial stack pointer for TPL.
To provide backward compatibility for existing boards, this is added
as an optional configuration item and the normal search order (i.e.
SPL_STACK, then SYS_STACK) apply if not defined.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 08:04:54 +0000 (10:04 +0200)]
armv8: move low-level assembly functions into function-sections
TPL builds today don't need to call into firmware or set up the MMU
(if this changes, it should be controlled through a config option
whether to include this or not), but include the needed support code
for this anyway. By moving these unused low-level functions into
seperate function-sections, the linker can garbage-collect the unused
sections.
Note that (if DM support is enabled), there will be a call to the
cache-flushing code from alloc_priv(...) in drivers/core/device.c.
This then add 52 bytes of binary size (an increase from 20589 to 20641
bytes) compared to completely removing this code.
Even for a feature-rich TPL (including DM support as for the RK3368),
this equates to a size difference of significantly more than 10% in
TPL binary size.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 30 Jun 2017 17:02:53 +0000 (19:02 +0200)]
spl: dm: use CONFIG_IS_ENABLED to test for the DM option
Even though there's now a TPL_DM configuration option, the spl logic
still checks for SPL_DM and thus does not pick up the proper config
option.
This introduces the use of CONFIG_IS_ENABLED(DM) in spl.c to always
pick up the desired configuration option instead of having a
hard-coded check for the SPL variant.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Thu, 29 Jun 2017 09:11:21 +0000 (11:11 +0200)]
spl: dm: Kconfig: split OF_CONTROL and OF_PLATDATA between SPL and TPL
For the RK3368, we want to use OF_PLATDATA in TPL, but full OF_CONTROL
in SPL: this requires the introduction of a new family of
configuration options to decouple SPL_OF_CONTROL and SPL_OF_PLATDATA
from TPL.
Consequently, Makefile.spl needs to be adjusted to test for these
configuration items through the $(SPL_TPL_) macro instead of
hard-coding the SPL variant.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:45:01 +0000 (01:45 +0200)]
spl: dm: Kconfig: split CLK support for SPL and TPL
Introduce TPL_CLK to allow finer-grained selection of TPL features
for feature-rich (i.e. DM-based) TPL stages.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:44:07 +0000 (01:44 +0200)]
spl: dm: Kconfig: SPL_CLK depends on SPL_DM
SPL_CLK should also depend on SPL_DM (and not just on CLK).
Add the additional dependency.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:42:40 +0000 (01:42 +0200)]
spl: dm: Kconfig: introduce TPL_RAM (in analogy to SPL_RAM)
To allow finer grained selection of features for TPL, we introduce
TPL_RAM (in analogy to SPL_RAM).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:41:52 +0000 (01:41 +0200)]
spl: dm: Kconfig: SPL_RAM depends on SPL_DM
This commit models the dependency from SPL_RAM to SPL_DM in Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:38:49 +0000 (01:38 +0200)]
spl: dm: Kconfig: split REGMAP/SYSCON support for TPL from SPL
This change introduces TPL variants of the REGMAP and SYSCON config
options (i.e. TPL_REGMAP and TPL_SYSCON in analogy to SPL_REGMAP and
SPL_SYSCON) in preparation of a finer-grained feature selection for
building feature-rich TPL variants.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Wed, 28 Jun 2017 23:37:10 +0000 (01:37 +0200)]
spl: dm: Kconfig: use more specific prereqs for SPL_REGMAP and SPL_SYSCON
SPL_REGMAP and SPL_SYSCON were marked as depending on DM, when a
stricter dependency of SPL_DM was possible. This commit makes the
prereq more specific.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Fri, 28 Jul 2017 15:03:03 +0000 (17:03 +0200)]
spl: dm: Kconfig: fix help text for SPL/TPL confusion
TPL_NAND_SUPPORT, TPL_SERIAL_SUPPORT, TPL_SPI_FLASH_SUPPORT and
TPL_SPI_SUPPORT refer to SPL in their help text. This fixes up
the description to correctly reference TPL.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Fri, 28 Jul 2017 09:06:03 +0000 (11:06 +0200)]
spl: use TPL_SYS_MALLOC_F_LEN for TPL
The (upstream) changes to break up SYS_MALLOC_F_LEN for the full
U-Boot and the SPL stage, break TPL (if simple malloc is enabled in
TPL).
This adds support for a TPL-variant of SYS_MALLOC_F_LEN:
- adds TPL_SYS_MALLOC_F_LEN
- rewrites a test for CONFIG_SPL_SYS_MALLOC_F_LEN to access
CONFIG_VAL(SYS_MALLOC_F_LEN)
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Thu, 29 Jun 2017 09:28:15 +0000 (11:28 +0200)]
rockchip: back-to-bootrom: simplify the #ifdef-check for LIBCOMMON in TPL/SPL
With the finer-grained control over LIBCOMMON_SUPPORT for TPL/SPL (i.e.
with the newly introduced distinction between TPL_LIBCOMMON_SUPPORT and
SPL_LIBCOMMON_SUPPORT), we can simplify the #ifdef-check to simply use
CONFIG_IS_ENABELD.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up to use 'puts' and LIBCOMMON:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Thu, 29 Jun 2017 09:21:15 +0000 (11:21 +0200)]
rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL
The back-to-bootrom option is rather unfortunately named
CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM
instead of
CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM
To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM),
we need to rename it. At the same time, we introduce a TPL_ variant of
the option to give us finer-grained control over when it should be used.
This change is motivated by our RK3368 boot process, which returns to
the boot ROM only from the TPL stage, but not from the SPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:]
[fixed inverted CONFIG_IS_ENABLED test for rk3288:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
include/configs/rock.h: undef
Philipp Tomsich [Thu, 22 Jun 2017 22:05:38 +0000 (00:05 +0200)]
rockchip: back-to-bootrom: add 'back-to-bootrom' support for AArch64
The back-to-bootrom support for Rockchip is equivalent to an
(assembly) implementation of setjmp/longjmp (i.e. it saves the
stack-pointer, link-register and callee-saved registers). Up until
now, this had only been implemented for AArch32 (i.e. ARMv7 or older),
which puts the new ARMv8 devices (which boot in AArch64 mode) at a
slight disadvantage.
To allow use of the 'back-to-bootrom' feature on new devices (e.g. the
RK3368), this commit adds an implementation for AArch64.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Tue, 4 Jul 2017 12:24:53 +0000 (14:24 +0200)]
spl: configure 'return to bootrom' separately for SPL and TPL
On the RK3368, we want our TPL to use the 'return to bootrom' boot
method (to have the bootrom load up the SPL stage) and then continue
with different boot methods (MMC, SPI, etc.) from SPL.
This adds the config option needed to control the availabily of the
'return to bootrom' boot-method separately for the TPL stage.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Tomsich [Thu, 22 Jun 2017 21:38:36 +0000 (23:38 +0200)]
spl: add a 'return to bootrom' boot method
Some devices (e.g. the RK3368) have only limited SRAM, but provide
support for loading the next boot stage after our SPL performs basic
setup (e.g. DRAM).
For target systems like these, we add a boot device BOOTROM that will
invoke a board-specific hook to return to the bootrom (if supported).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Fixes: 00bbe96ebabb ("arm: omap: Unify get_device_type() function")
The control status register value is embedded in a structure somewhere
in SRAM, with the last refactoring effort. This patch allows OMAP3 EVM
(TMDSEVM3530) to boot again using the known control register base and
offset for 'readl', for the OMAP34XX case.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
[trini: Change to if/else, add comment about it.] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 4 Aug 2017 22:35:06 +0000 (16:35 -0600)]
README: Drop information about commands
Most of this is duplicated in Kconfig help. Add some of that which is not,
and remove the help from the README.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:05 +0000 (16:35 -0600)]
Drop config_cmd_all.h
This file does not include all commands and has not for a while. Let's
drop it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:04 +0000 (16:35 -0600)]
Convert CONFIG_CMD_ZFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_ZFS
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:03 +0000 (16:35 -0600)]
Convert CONFIG_CMD_ZBOOT to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_ZBOOT
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:02 +0000 (16:35 -0600)]
Convert CONFIG_CMD_UUID to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_UUID
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:01 +0000 (16:35 -0600)]
Convert CONFIG_CMD_UNIVERSE to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_UNIVERSE
Since no board uses this, perhaps we should drop this command?
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:35:00 +0000 (16:35 -0600)]
Convert CONFIG_CMD_TSI148 to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_TSI148
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:59 +0000 (16:34 -0600)]
Convert CONFIG_CMD_TRACE to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_TRACE
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:58 +0000 (16:34 -0600)]
Convert CONFIG_CMD_YAFFS2 to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_YAFFS2
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:57 +0000 (16:34 -0600)]
Convert CONFIG_CMD_THOR_DOWNLOAD to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_THOR_DOWNLOAD
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:56 +0000 (16:34 -0600)]
Kconfig: Drop CONFIG_CMD_TFTP
This is not a valid CONFIG option. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:55 +0000 (16:34 -0600)]
Convert CONFIG_CMD_TERMINAL to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_TERMINAL
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:54 +0000 (16:34 -0600)]
Convert CONFIG_CMD_TCA642X to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_TCA642X
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:53 +0000 (16:34 -0600)]
gpio: Drop sx151x driver
This driver is not used in U-Boot. Drop it and its associated CONFIG
options.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:52 +0000 (16:34 -0600)]
Convert CONFIG_CMD_STRINGS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_STRINGS
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:51 +0000 (16:34 -0600)]
Kconfig: Sort the memory commands
These are currently not quite in alphabetical order. Before adding more,
sort them. Not all options have a CMD_ prefix, so ignore that when
sorting.
Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:50 +0000 (16:34 -0600)]
Convert CONFIG_CMD_SPL_WRITE_SIZE to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_SPL_WRITE_SIZE
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Simon Glass [Fri, 4 Aug 2017 22:34:49 +0000 (16:34 -0600)]
Convert CONFIG_CMD_SPL_NAND_OFS to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_SPL_NAND_OFS
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>