Stefan Roese [Thu, 12 Nov 2009 11:00:49 +0000 (12:00 +0100)]
ppc4xx: Consolidate pci_target_init() function
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
David Brownell [Sat, 7 Nov 2009 21:27:01 +0000 (16:27 -0500)]
NAND: fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
Where OOBx is (prepad, ECC, postpad). However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB. Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.
The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.
Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Sandeep Paulraj [Sat, 7 Nov 2009 19:25:18 +0000 (14:25 -0500)]
NAND: Don't walk past end of oobfree[]
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.
Sandeep Paulraj [Sat, 7 Nov 2009 19:25:03 +0000 (14:25 -0500)]
NAND: Update check condition for nand_read_page_hwecc API
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.
Sandeep Paulraj [Sat, 7 Nov 2009 19:24:34 +0000 (14:24 -0500)]
NAND: Subpage shift for ecc_steps equal to 16
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.
Kumar Gala [Fri, 13 Nov 2009 14:52:21 +0000 (08:52 -0600)]
ppc/85xx: Fix how we determine the number of CAM entries
We were incorrectly use the max CAM size as the number of entries in
the array for setting up the addrmap. We should be using the NENTRY
field which is the low 12-bits of TLB1CFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mike Frysinger [Fri, 13 Nov 2009 03:26:02 +0000 (22:26 -0500)]
smc911x_eeprom: fix building after smc911x overhaul
When the smc911x driver was converted to NET_MULTI, the smc911x eeprom was
missed. The config option needed updating as well as overhauling of the
rergister read/write functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
javier Martin [Thu, 29 Oct 2009 07:22:43 +0000 (08:22 +0100)]
mxc_fec: avoid free() calls to already freed pointers.
Sometimes, inside NetLoop, eth_halt() is called before eth_init() has
been called. This is harmless except for free() calls to pointers
which have not been allocated yet.
This patch initializes those pointers to NULL and allocates them only
the first time. This way we can get rid of free calls in halt callback.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
javier Martin [Thu, 29 Oct 2009 07:18:34 +0000 (08:18 +0100)]
mxc_fec: fix some erroneous PHY accesses.
This patch fixes erroneous access to the ethernet PHY which broke the driver.
1. Selector field in the auto-negotiation register must be 0x00001 for
using 802.3, not 0x00000 which is reseved.
2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not
0x0 fixed address.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Now using proper defines for auto-negotiation register.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Mon, 9 Nov 2009 13:13:43 +0000 (14:13 +0100)]
ppc4xx: Switch to I2C bus numer 0 for chip_config command
All currently available 4xx derivats have the I2C bootstrap EEPROM
located on I2C bus number 0. This patch now first sets this bus number,
so that the chip_config command also works for board with multiple
I2C busses, like Katmai.
Ben Warren [Mon, 9 Nov 2009 22:01:08 +0000 (14:01 -0800)]
SMC91111: Clean up SMC_inx macros on xsengine and xaeniax
This patch fixes the following warnings:
Configuring for xaeniax board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - in operand of &
smc91111_eeprom.c:281: warning: suggest parentheses around + or - in operand of &
...
Configuring for xsengine board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - inside shift
smc91111_eeprom.c:281: warning: suggest parentheses around + or - inside shift
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Mon, 9 Nov 2009 19:43:18 +0000 (11:43 -0800)]
Fix CS8900 regression on impa7 board
The following error was seen on impa7 board, due to its use of a 32-bit bus
on CS8900.
cs8900.c:137:37: error: macro "get_reg_init_bus" passed 2 arguments, but takes just 1
This patch gives the macro the correct number of arguments
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Thu, 29 Oct 2009 17:37:45 +0000 (18:37 +0100)]
ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)
This patch fixes a problem only seen very occasionally on Canyonlands.
The NOR flash interface (CFI driver) doesn't work reliably in all cases.
Erasing and/or programming sometimes doesn't work. Sometimes with
an error message, like "flash not erased" when trying to program an
area that should have just been erased. And sometimes without any error
messages. As mentioned above, this problem was only seen rarely and with
some PLL configuration (CPU speed, EBC speed).
Now I spotted this problem a few times, when running my Canyonlands with
the following setup (chip_config):
1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100
Changing the EBC configuration to not release the bus into high
impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1
in EBC0_CFG) seems to fix this problem. I haven't seen any failure
anymore with this patch applied.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: David Mitchell <dmitchell@amcc.com> Cc: Jeff Mann <MannJ@embeddedplanet.com>
Stefan Roese [Thu, 29 Oct 2009 15:54:52 +0000 (16:54 +0100)]
ppc4xx: Remove duplicated is_pci_host() functions
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.
Stefan Roese [Thu, 29 Oct 2009 14:04:35 +0000 (15:04 +0100)]
ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.
Remy Bohmer [Thu, 29 Oct 2009 11:29:37 +0000 (12:29 +0100)]
ARM: Use Linux version for unaligned access code
The asm-arm/unaligned.h includes linux/unaligned/access_ok.h
This file is unsafe to be used on ARM, since it does an unaligned memory
accesses which fails on ARM.
Lookin at Linux the basic difference seems to be the header
"include/asm-arm/unaligned.h". The Linux version of "unaligned.h"
does *not* include "access_ok.h" at all. It includes "le_byteshift.h"
and "be_byteshift.h" instead.
Kumar Gala [Thu, 5 Nov 2009 00:02:10 +0000 (18:02 -0600)]
ppc/85xx: Fix inclusion of 83xx immap in 85xx builds
The nand_boot_fsl_elbc.c is shared between 83xx & 85xx however we should
not be including the immap_83xx.h when building 85xx. We can just get
this all from common.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ed Swarthout [Mon, 2 Nov 2009 15:05:49 +0000 (09:05 -0600)]
fsl_pci_init_port end-point initialization is broken
commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct. The function must return the first free
bus number for the next controller.
fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status. We can determine that
internally to fsl_pci_init_port. Revert the patch that makes the API
change.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Stefan Roese [Tue, 27 Oct 2009 15:11:26 +0000 (16:11 +0100)]
ppc4xx: Add common ppc4xx linker script
This linker script can be used by all PPC4xx platforms. It works for
PPC405 and PPC440 platforms. Boards which need a board specific linker
script can override this default linker script in board/*/config.mk.
Stefan Roese [Tue, 27 Oct 2009 15:16:13 +0000 (16:16 +0100)]
ppc4xx: Add custom linker script to board/*/config.mk
These boards have special linker scripts right now. We can't use the
common 4xx linker script here. So overrride the linker script (LDSCRIPT)
in board/*/config.mk and choose the board specific version.
Stefan Roese [Tue, 27 Oct 2009 14:57:24 +0000 (15:57 +0100)]
ppc4xx: Fix problems in some ppc4xx board Makefiles
Some 4xx Makefiles didn't add $(SOBJ) to their board library. This was
no till now problem, since those boards included this object (init.o
most of the time) directly from their linker scripts. This patch clean
this up, so that all objects are now collected in the board library. This
is in preparation for the upcoming PPC4xx linker script consolidation.
Stefan Roese [Tue, 27 Oct 2009 10:46:23 +0000 (11:46 +0100)]
mkconfig: Create board directory (CONFIG_BOARDDIR) in include/config.h
This patch extends the mkconfig script to automatically create a define
for the board directory in include/config.h:
#define CONFIG_BOARDDIR board/amcc/canyonlands
This is needed for the upcoming PPC4xx linker script consolidation,
where the PPC440 platforms need to include a board specific file in
the common linker script.
video: mb862xx: add option VIDEO_FB_16BPP_WORD_SWAP for IPEK01
In 16 bpp mode, the new IPEK01 board only requires swapping of D16 words
for D32 accesses due to the diffferent connecting to the GDC bus. This
patch introduces the configuration option VIDEO_FB_16BPP_WORD_SWAP,
which should be set for all board using the mb862xx in 16 bpp mode. For
the IPEK01, VIDEO_FB_16BPP_PIXEL_SWAP should not be set.
video: mb862xx: add option CONFIG_VIDEO_MB862xx_ACCEL for 32bpp mode
The new IPEK01 board can use the 32 bpp mode for the Lime graphics
controller. For this mode, video accelaration does not work. This patch
makes the accelaration configurable via CONFIG_VIDEO_MB862xx_ACCEL,
which is enabled for the lwmon5 and the socrates board for backward
compatibility.
Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
To avoid board-specific code accessing the mb862xx registers directly,
the public function mb862xx_probe() has been introduced. Furthermore,
the "Change of Clock Frequency" and "Set Memory I/F Mode" registers
are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR,
respectively. The BSPs for the socrates and lwmon5 boards have been
adapted accordingly.
sh: Remove malloc_bin_reloc from lib_sh, lib_nios2 and lib_nios.
By "arm/microblaze/nios/nios2/sh: Remove relocation fixups"
(commit: 0630535e2d062dd73c1ceca5c6125c86d1127a49", doesn't need
malloc_bin_reloc function. This commit remove this.
Ben Warren [Thu, 22 Oct 2009 04:53:39 +0000 (21:53 -0700)]
Fix DM9000 MAC address handling
Proper behavior is to pull MAC address from NVRAM in the initialization() an
stuff it in dev->address, then program the device from dev->address in
the init() function.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Tue, 27 Oct 2009 14:15:55 +0000 (15:15 +0100)]
cfi: Add weak default function for flash_cmd_reset()
Currently the CFI driver issues both AMD and Intel reset commands.
This is because the driver doesn't know yet which chips are connected.
This dual reset seems to cause problems with the M29W128G chips as
reported by Richard Retanubun. This patch now introduces a weak default
function for the CFI reset command, still with both resets. This can
be overridden by a board specific version if necessary.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
Peter Tyser [Sun, 25 Oct 2009 20:12:56 +0000 (15:12 -0500)]
Add 'editenv' command
The editenv command can be used to edit an environment variable.
Editing an environment variable is useful when one wants to tweak an
existing variable, for example fix a typo or change the baudrate in the
'bootargs' environment variable.
Peter Tyser [Sun, 25 Oct 2009 20:12:55 +0000 (15:12 -0500)]
setenv(): Delete 0-length environment variables
Previously setenv() would only delete an environment variable if it
was passed a NULL string pointer as a value. It should also delete an
environment variable when it encounters a valid string pointer of
0-length.
This change/fix is generally useful and is necessary for the upcoming
"editenv" command.
Peter Tyser [Sun, 25 Oct 2009 20:12:54 +0000 (15:12 -0500)]
readline(): Add ability to modify a string buffer
If the 'buf' parameter is a non-0-length string, its contents will be
edited. Previously, the initial contents of 'buf' were ignored and the
user entered its contents from scratch.
This change is necessary to support the upcoming "editenv" command but
could also be used for future commands which require a user to modify
an existing string.
Peter Tyser [Sun, 25 Oct 2009 20:12:52 +0000 (15:12 -0500)]
Check for NULL prompt in readline_into_buffer()
Previously, passing readline() or readline_into_buffer() a NULL 'prompt'
parameter would result in puts() printing garbage when
CONFIG_CMDLINE_EDITING was enabled.
Note that no board currently triggers this bug. Enabling
CONFIG_CMDLINE_EDITING on some boards (eg bab7xx) would result in
the bug appearing. This change is only intended to prevent someone
from running into this issue in the future.
Anton Vorontsov [Thu, 15 Oct 2009 13:47:13 +0000 (17:47 +0400)]
mpc85xx: Configure QE UART for MPC8569E-MDS boards
To make QE UART usable by Linux we should setup pin multiplexing
and turn UCC2 Ethernet node into UCC2 QE UART node.
Also, QE UART is mutually exclusive with UART0, so we can't enable
it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
board with eSDHC in 1- or 4-bits mode.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov [Thu, 15 Oct 2009 13:47:06 +0000 (17:47 +0400)]
mpc85xx: Add eSDHC support for MPC8569E-MDS boards
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.
Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).
So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Fri, 23 Oct 2009 20:55:47 +0000 (15:55 -0500)]
85xx: MP Boot Page Translation update
This change has 3 goals:
- Have secondary cores be released into spin loops at their 'true'
address in SDRAM. Previously, secondary cores were put into spin
loops in the 0xfffffxxx address range which required that boot page
translation was always enabled while cores were in their spin loops.
- Allow the TLB window that the primary core uses to access the
secondary cores boot page to be placed at any address. Previously, a
TLB window at 0xfffff000 was always used to access the seconary cores'
boot page. This TLB address requirement overlapped with other
peripherals on some boards (eg XPedite5370). By default, the boot
page TLB will still use the 0xfffffxxx address range, but this can be
overridden on a board-by-board basis by defining a custom
CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page
remains in use while U-Boot executes. Previously it was only
temporarily used, then restored to its initial value.
- Allow Boot Page Translation to be disabled on bootup. Previously,
Boot Page Translation was always left enabled after secondary cores
were brought out of reset. This caused the 0xfffffxxx address range
to somewhat "magically" be translated to an address in SDRAM. Some
boards may not want this oddity in their memory map, so defining
CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
the secondary cores are initialized.
These changes are only applicable to 85xx boards with CONFIG_MP defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Vivek Mahajan [Tue, 27 Oct 2009 06:48:55 +0000 (12:18 +0530)]
ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov [Thu, 15 Oct 2009 13:47:04 +0000 (17:47 +0400)]
fdt_support: Add multi-serial support for stdout fixup
Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX
constant. With multi-serial support, the CONS_INDEX may no longer
represent actual console, so we should try to extract port number
from the current stdio device name instead of always hard-coding the
constant value.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
projects / u-boot / log