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9 years agoarm: rmobile: rcar: Add mstp_setclrbits and mstp_setclrbits_le32
Nobuhiro Iwamatsu [Tue, 2 Dec 2014 07:52:21 +0000 (16:52 +0900)]
arm: rmobile: rcar: Add mstp_setclrbits and mstp_setclrbits_le32

This addes macro for set and clear bit control for module control register.
This is used when user want to disable the function of the devices
corresponding to register.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: rcar: Move arch_preboot_os function to rcar-gen2-common/common.c
Nobuhiro Iwamatsu [Tue, 2 Dec 2014 07:52:20 +0000 (16:52 +0900)]
arm: rmobile: rcar: Move arch_preboot_os function to rcar-gen2-common/common.c

The arch_preboot_os function used in boards using R-Car ARM SoC (r8a7790,
r8a7791, r8a7793 and r8a7794) is common.
This makes rcar-gen2-common/common.c file providing common function for
R-Car ARM SoC, and moves this function to this file.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: rcar: Move control macro of mstp to arch-rmobile/rcar-mstp.h
Nobuhiro Iwamatsu [Tue, 2 Dec 2014 07:52:19 +0000 (16:52 +0900)]
arm: rmobile: rcar: Move control macro of mstp to arch-rmobile/rcar-mstp.h

Control macro of mstp is common in R-Car ARM SoC (r8a7790, r8a7791,
r8a7793 and r8a7794). This moves these to arch-rmobile/rcar-mstp.h

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoarm: rmobile: rcar: Move module control register to header file of SoC
Nobuhiro Iwamatsu [Tue, 2 Dec 2014 07:52:18 +0000 (16:52 +0900)]
arm: rmobile: rcar: Move module control register to header file of SoC

Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and
r8a7794) are same address. This moves these to header file of SoC.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
9 years agoMerge branch 'sandbox' of git://git.denx.de/u-boot-x86
Tom Rini [Thu, 4 Dec 2014 14:24:05 +0000 (09:24 -0500)]
Merge branch 'sandbox' of git://git.denx.de/u-boot-x86

9 years agoRevert "image-fdt: boot_get_fdt() return value when no DTB exists"
Tom Rini [Wed, 3 Dec 2014 18:19:34 +0000 (13:19 -0500)]
Revert "image-fdt: boot_get_fdt() return value when no DTB exists"

It has been found that this change breaks the case of an appended device
tree file, so for the problem in question some other solution must be
found.

This reverts commit c6150aaf2f2745141a7c2ceded58d7efbfeace7d.

Reported-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Reported-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Confirmed-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
Signed-off-by: Tom Rini <trini@ti.com>
9 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Mon, 1 Dec 2014 20:24:26 +0000 (15:24 -0500)]
Merge git://git.denx.de/u-boot-fdt

9 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 1 Dec 2014 20:24:07 +0000 (15:24 -0500)]
Merge git://git.denx.de/u-boot-x86

9 years agofs/ext4/ext4fs.c, fs/fs.c fs/fat/fat_write.c: Adjust 64bit math methods
Tom Rini [Mon, 24 Nov 2014 16:50:46 +0000 (11:50 -0500)]
fs/ext4/ext4fs.c, fs/fs.c fs/fat/fat_write.c: Adjust 64bit math methods

The changes to introduce loff_t into filesize means that we need to do
64bit math on 32bit platforms.  Make sure we use the right wrappers for
these operations.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suriyan Ramasami <suriyan.r@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Pierre Aubert <p.aubert@staubli.com>
9 years agofdt: Fix regression in fdt_pack_reg()
Hans de Goede [Fri, 28 Nov 2014 13:23:51 +0000 (14:23 +0100)]
fdt: Fix regression in fdt_pack_reg()

After commit 933cdbb479: "fdt: Try to use fdt_address_cells()/fdt_size_cells()"
I noticed that allwinner boards would no longer boot.

Switching to fdt_address_cells / fdt_size_cells changes the result from
bytes to 32 bit words, so when we increment pointers into the blob, we must
do so by 32 bit words now.

This commit makes allwinner boards boot again.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Vince Hsu <vinceh@nvidia.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Thu, 27 Nov 2014 18:10:04 +0000 (13:10 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

9 years agoARM: UniPhier: move CONFIG_CMD_* and CONFIG_FIT* defines to defconfig
Masahiro Yamada [Wed, 26 Nov 2014 09:34:04 +0000 (18:34 +0900)]
ARM: UniPhier: move CONFIG_CMD_* and CONFIG_FIT* defines to defconfig

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: enable Device Tree control
Masahiro Yamada [Wed, 26 Nov 2014 09:34:02 +0000 (18:34 +0900)]
ARM: UniPhier: enable Device Tree control

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agousb: UniPhier: support OF configuration
Masahiro Yamada [Wed, 26 Nov 2014 09:34:01 +0000 (18:34 +0900)]
usb: UniPhier: support OF configuration

If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
9 years agoserial: UniPhier: support OF configuration
Masahiro Yamada [Wed, 26 Nov 2014 09:34:00 +0000 (18:34 +0900)]
serial: UniPhier: support OF configuration

This commit implements the ofdata_to_platdata handler for the UniPhier
serial driver and adds serial device nodes to the device tree sources.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add device tree sources
Masahiro Yamada [Wed, 26 Nov 2014 09:33:59 +0000 (18:33 +0900)]
ARM: UniPhier: add device tree sources

This commit adds basic device tree sources for UniPhier SoCs/boards.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agoARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL
Masahiro Yamada [Wed, 26 Nov 2014 09:33:58 +0000 (18:33 +0900)]
ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL

If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>.  Consequently, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not
support GPIO.

In the first place, GPIO has nothing to do with OF_CONTROL.
It is wrong that lib/fdtdec.c includes GPIO functions; it should
be split into two files, FDT-common things and GPIO things.
It is, however, a pretty big work to fix that correctly.

This is a compromised commit to add a dummy <asm/arch/gpio.h>
to support OF_CONTROL for UniPhier platform.  This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoARM: UniPhier: do not compile platform data when CONFIG_OF_CONTROL=y
Masahiro Yamada [Wed, 26 Nov 2014 09:33:57 +0000 (18:33 +0900)]
ARM: UniPhier: do not compile platform data when CONFIG_OF_CONTROL=y

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
9 years agofdt: remove fdtdec_get_alias_node() function
Masahiro Yamada [Fri, 21 Nov 2014 10:47:08 +0000 (19:47 +0900)]
fdt: remove fdtdec_get_alias_node() function

The fdt_path_offset() checks an alias too.

fdtdec_get_alias_node(blob, "foo") is equivalent to
fdt_path_offset(blob, "foo").

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Thu, 27 Nov 2014 15:49:38 +0000 (10:49 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

9 years agoMIPS: bootm: remove unused or redundant header files
Daniel Schwierzeck [Sun, 16 Nov 2014 00:27:23 +0000 (01:27 +0100)]
MIPS: bootm: remove unused or redundant header files

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: bootm: add missing initramfs relocation
Daniel Schwierzeck [Sun, 16 Nov 2014 00:27:23 +0000 (01:27 +0100)]
MIPS: bootm: add missing initramfs relocation

The initramfs is currently only relocated if the user calls
the bootm ramdisk subcommand. If bootm should be used without
subcommands, the arch-specific bootm code needs to implement
the relocation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: remove board.c
Daniel Schwierzeck [Sat, 15 Nov 2014 22:46:58 +0000 (23:46 +0100)]
MIPS: remove board.c

After all MIPS boards are switched to generic-board, the
MIPS specific board.c can be removed.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: vct: switch to generic board
Daniel Schwierzeck [Sat, 15 Nov 2014 22:30:01 +0000 (23:30 +0100)]
MIPS: vct: switch to generic board

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
9 years agoMIPS: qemu_mips: switch to generic board
Daniel Schwierzeck [Sat, 15 Nov 2014 22:30:01 +0000 (23:30 +0100)]
MIPS: qemu_mips: switch to generic board

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: pb1x00: switch to generic board
Daniel Schwierzeck [Sat, 15 Nov 2014 22:30:01 +0000 (23:30 +0100)]
MIPS: pb1x00: switch to generic board

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: dbau1x00: switch to generic board
Daniel Schwierzeck [Sat, 15 Nov 2014 22:30:01 +0000 (23:30 +0100)]
MIPS: dbau1x00: switch to generic board

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agoMIPS: fix setup of initial stack frame
Daniel Schwierzeck [Thu, 20 Nov 2014 22:55:32 +0000 (23:55 +0100)]
MIPS: fix setup of initial stack frame

To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
9 years agomtd: nand: s3c: Unify the register definition and naming
Marek Vasut [Sat, 11 Oct 2014 16:42:52 +0000 (18:42 +0200)]
mtd: nand: s3c: Unify the register definition and naming

Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
9 years agobuildman: Don't default to -e when building current source
Simon Glass [Thu, 16 Oct 2014 07:05:56 +0000 (01:05 -0600)]
buildman: Don't default to -e when building current source

We probably don't need to enable this option by default. It is useful to
display only failure boards (not errors) and it is easy to add -e if it
is required. Also update the docs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
9 years agobuildman: Fix repeating board list with -l
Simon Glass [Thu, 16 Oct 2014 07:05:55 +0000 (01:05 -0600)]
buildman: Fix repeating board list with -l

Ensure that we don't print duplicate board names when -l is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
9 years agopatman: Use the full commit hash for 'git checkout'
Simon Glass [Wed, 15 Oct 2014 08:27:00 +0000 (02:27 -0600)]
patman: Use the full commit hash for 'git checkout'

Even with the initial 8 characeters of the hash we will sometimes get a
collision. Use the full hash.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agobuildman: Save *.img files too
Tom Rini [Tue, 11 Nov 2014 21:58:44 +0000 (16:58 -0500)]
buildman: Save *.img files too

When saving binary files we likely want to keep any .img files that have
been generated as well.

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agosandbox: Fix warnings in cpu.c and os.c
Simon Glass [Tue, 11 Nov 2014 19:47:08 +0000 (12:47 -0700)]
sandbox: Fix warnings in cpu.c and os.c

This fixes the following two problems:

cppcheck reports:
[arch/sandbox/cpu/start.c:132]: (error) Uninitialized variable: err
[arch/sandbox/cpu/os.c:371]: (error) Memory leak: fname

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Wolfgang Denk <wd@denx.de>
9 years agosandbox: Fix warnings due to 64-bit printf() strings
Simon Glass [Tue, 11 Nov 2014 19:47:07 +0000 (12:47 -0700)]
sandbox: Fix warnings due to 64-bit printf() strings

Now that we have inttypes.h, use it in a few more places to avoid compiler
warnings on sandbox when building on 64-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agomtd/nand/vf610_nfc: Disable subpage writes
Sanchayan Maity [Mon, 24 Nov 2014 05:33:59 +0000 (11:03 +0530)]
mtd/nand/vf610_nfc: Disable subpage writes

This patch disables subpage writes for vf610_nfc nand
driver. This is required, as without this fix, writing
unaligned u-boot images with DFU results in a hang.
Trying to write unalgined binary images also results
in a hang, without disabling subpage writes.

Patch has been tested on a Colibri VF61 module.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
9 years agomtd: denali: set some registers after nand_scan_ident()
Masahiro Yamada [Thu, 13 Nov 2014 11:31:51 +0000 (20:31 +0900)]
mtd: denali: set some registers after nand_scan_ident()

Some but not all of implementations of the Denali NAND controller
have hardware circuits to detect the device parameters such as
page_size, erase_size, etc.  Even on those SoCs with such hardware
supported, the hardware is known to detect wrong parameters for some
nasty (almost buggy) NAND devices.  The device parameters detected
during nand_scan_ident() are more trustworthy.

This commit sets some hardware registers to mtd->pagesize,
mtd->oobsize, etc. in the code between nand_scan_ident() and
nand_scan_tail().

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Chin Liang See <clsee@altera.com>
9 years agomtd: denali: use CONFIG_SYS_NAND_SELF_INIT
Masahiro Yamada [Thu, 13 Nov 2014 11:31:50 +0000 (20:31 +0900)]
mtd: denali: use CONFIG_SYS_NAND_SELF_INIT

Some variants of the Denali NAND controller need some registers
set up based on the device information that has been detected during
nand_scan_ident().

CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between
nand_scan_ident() and nand_scan_tail().  It is also helpful to reduce
the difference between this driver and its Linux counterpart because
this driver was ported from Linux.  Moreover, doc/README.nand recommends
to use CONFIG_SYS_NAND_SELF_INIT.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Chin Liang See <clsee@altera.com>
9 years agonand: reinstate lazy bad block scanning
Rostislav Lisovy [Wed, 22 Oct 2014 11:40:44 +0000 (13:40 +0200)]
nand: reinstate lazy bad block scanning

Commit ff94bc40af3481d47546595ba73c136de6af6929
("mtd, ubi, ubifs: resync with Linux-3.14")
accidentally reverted part of the commit
13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde
("NAND: Scan bad blocks lazily.").

Reinstate the change as by commit
fb49454b1b6c7c6e238ac3c0b1e302e73eb1a1ea
("nand: reinstate lazy bad block scanning")

Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
Acked-by: Heiko Schocher <hs@denx.de>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 25 Nov 2014 21:51:47 +0000 (16:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 26 Nov 2014 16:22:29 +0000 (11:22 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

Conflicts:
drivers/mmc/fsl_esdhc.c

Signed-off-by: Tom Rini <trini@ti.com>
10 years agospl: Fix SPL EXT support
Guillaume GARDET [Tue, 25 Nov 2014 14:34:16 +0000 (15:34 +0100)]
spl: Fix SPL EXT support

Commit 9f12cd0e062614e19734b2ab37842d387457c5e5 has broken SPL EXT support.
This patch update error code check to get SPL EXT support working again.

Tested on a Pandaboard (rev. A3).

Reviewed-by: Suriyan Ramasami <suriyan.r@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
10 years agoMerge branch 'master' of http://git.denx.de/u-boot-samsung
Tom Rini [Tue, 25 Nov 2014 16:10:01 +0000 (11:10 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-samsung

10 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 25 Nov 2014 16:09:48 +0000 (11:09 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-sunxi

10 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Tue, 25 Nov 2014 16:08:52 +0000 (11:08 -0500)]
Merge git://git.denx.de/u-boot-fdt

10 years agotools: Add ifdtool to .gitignore
Bin Meng [Tue, 25 Nov 2014 02:20:08 +0000 (10:20 +0800)]
tools: Add ifdtool to .gitignore

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agox86: chromebook_link: Enable the Chrome OS EC
Simon Glass [Sat, 15 Nov 2014 03:56:45 +0000 (20:56 -0700)]
x86: chromebook_link: Enable the Chrome OS EC

Enable the Chrome OS EC so that it can be used from U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: chromebook_link: Enable the x86 emulator
Simon Glass [Sat, 15 Nov 2014 03:56:44 +0000 (20:56 -0700)]
x86: chromebook_link: Enable the x86 emulator

Enable this so that it can be used instead of native execution if desired.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agobios_emulator: Always print errors when opcode decode fails
Simon Glass [Sat, 15 Nov 2014 03:56:43 +0000 (20:56 -0700)]
bios_emulator: Always print errors when opcode decode fails

This is a rare event and should not happen. When it does it is confusing to
work out why. At least we should print a message.

Adjust the emulator to always print decode errors to the console.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agobios_emulator: Add an option to enable debugging
Simon Glass [Sat, 15 Nov 2014 03:56:42 +0000 (20:56 -0700)]
bios_emulator: Add an option to enable debugging

At present there are DEBUG options spread around the place. If you enable
one and not another you can end up with an emulator that does not work,
since each file can have a different view of what the registers look like.
To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps
everything consistent.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agobios_emulator: Allow a custom interrupt handler to be installed
Simon Glass [Sat, 15 Nov 2014 03:56:41 +0000 (20:56 -0700)]
bios_emulator: Allow a custom interrupt handler to be installed

Sometime we want to provide an interrupt handler for the ROM, Add a
function to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agobios_emulator: Add vesa support and allow ROMs to be passed in as data
Simon Glass [Sat, 15 Nov 2014 03:56:40 +0000 (20:56 -0700)]
bios_emulator: Add vesa support and allow ROMs to be passed in as data

As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
the emulator. Split the init up a little so that callers can supply their
own interrupt routines. Also allow a vesa mode to be provided, to be
selected once the BIOS run is complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agobios_emulator: Allow x86 to use the emulator
Simon Glass [Sat, 15 Nov 2014 03:56:39 +0000 (20:56 -0700)]
bios_emulator: Allow x86 to use the emulator

There is an implicit assumption that x86 machines want to use raw I/O in the
BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO
option to control it instead.

Also fix a few bugs which cause warnings on x86 and adjust the Makefile to
remove the assumption that only PowerPC uses the emulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: config: Enable video support for chromebook_link
Simon Glass [Sat, 15 Nov 2014 03:56:38 +0000 (20:56 -0700)]
x86: config: Enable video support for chromebook_link

Now that we have the required drivers, enable video support with a suitable
option ROM.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: dts: Add video information to the device tree
Simon Glass [Sat, 15 Nov 2014 03:56:37 +0000 (20:56 -0700)]
x86: dts: Add video information to the device tree

This provides panel timing information needed by the video driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add initial video device init for Intel GMA
Simon Glass [Sat, 15 Nov 2014 03:56:36 +0000 (20:56 -0700)]
x86: Add initial video device init for Intel GMA

Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Allow an option ROM to be built into U-Boot
Simon Glass [Sat, 15 Nov 2014 03:56:35 +0000 (20:56 -0700)]
x86: Allow an option ROM to be built into U-Boot

Some x86 machines require a binary blob containing 16-bit initialisation
code for their video hardware. Allow this to be built into the x86 ROM so
that it is accessible during boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: video: Add video driver for bare x86 boards
Simon Glass [Sat, 15 Nov 2014 03:56:34 +0000 (20:56 -0700)]
x86: video: Add video driver for bare x86 boards

Add a very simple driver which uses vesa to discover the video mode and
then provides a frame buffer for use by U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
10 years agopci: Add general support for execution of video ROMs
Simon Glass [Sat, 15 Nov 2014 03:56:33 +0000 (20:56 -0700)]
pci: Add general support for execution of video ROMs

Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.

Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).

In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add support for running option ROMs natively
Simon Glass [Sat, 15 Nov 2014 03:56:32 +0000 (20:56 -0700)]
x86: Add support for running option ROMs natively

On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoAdd support for Vesa BIOS extensions
Simon Glass [Sat, 15 Nov 2014 03:56:31 +0000 (20:56 -0700)]
Add support for Vesa BIOS extensions

For option ROMs we can use these extensions to request a particular video
mode. Add a header file which defines the binary interface.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add vesa mode configuration options
Simon Glass [Sat, 15 Nov 2014 03:56:30 +0000 (20:56 -0700)]
x86: Add vesa mode configuration options

Add Kconfig options to allow selection of a vesa mode on x86 machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add GDT descriptors for option ROMs
Simon Glass [Sat, 15 Nov 2014 03:56:29 +0000 (20:56 -0700)]
x86: Add GDT descriptors for option ROMs

Option ROMs require a few additional descriptors. Add these, and remove the
enum since we now have to access several descriptors from assembler.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoIntroduce a header file for the BIOS emulator
Simon Glass [Sat, 15 Nov 2014 03:56:28 +0000 (20:56 -0700)]
Introduce a header file for the BIOS emulator

We should have a public header so that users can avoid defining functions
themselves.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add a definition of asmlinkage
Simon Glass [Sat, 15 Nov 2014 03:56:27 +0000 (20:56 -0700)]
x86: Add a definition of asmlinkage

This is needed to permit calling C from assembler without too much pain.
Add a definition for x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: config: Enable SPI for chromebook_link
Simon Glass [Tue, 25 Nov 2014 04:18:19 +0000 (21:18 -0700)]
x86: config: Enable SPI for chromebook_link

Enable SPI so that the SPI flash can be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Add northbridge init functions
Simon Glass [Tue, 25 Nov 2014 04:18:18 +0000 (21:18 -0700)]
x86: ivybridge: Add northbridge init functions

Add init for the northbridge, another part of the platform controller hub.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Drop some msr functions that we don't support
Simon Glass [Tue, 25 Nov 2014 04:18:17 +0000 (21:18 -0700)]
x86: Drop some msr functions that we don't support

These are not available in U-Boot as yet, so drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add init for model 206AX CPU
Simon Glass [Tue, 25 Nov 2014 04:18:16 +0000 (21:18 -0700)]
x86: Add init for model 206AX CPU

Add the setup code for the CPU so that it can be used at full speed.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add LAPIC setup code
Simon Glass [Tue, 25 Nov 2014 04:18:15 +0000 (21:18 -0700)]
x86: Add LAPIC setup code

Add code to set up the Local Advanced Peripheral Interrupt Controller.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Drop old CONFIG_INTEL_CORE_ARCH code
Simon Glass [Tue, 25 Nov 2014 04:18:14 +0000 (21:18 -0700)]
x86: Drop old CONFIG_INTEL_CORE_ARCH code

This is no-longer used, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Remove unnecessary call to initr_enable_interrupts()
Bin Meng [Thu, 20 Nov 2014 08:11:27 +0000 (16:11 +0800)]
x86: Remove unnecessary call to initr_enable_interrupts()

Actually initr_enable_interrupts() was never called in an x86 build
due to it was wrapped by CONFIG_x86 (typo of X86).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agox86: Refactor interrupt_init()
Bin Meng [Thu, 20 Nov 2014 08:11:16 +0000 (16:11 +0800)]
x86: Refactor interrupt_init()

Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to
i8259_init() and create a new interrupt_init() in
arch/x86/cpu/interrupt.c to call i8259_init() followed by a
call to cpu_init_interrupts().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agox86: Remove cpu_init_r() for x86
Bin Meng [Thu, 20 Nov 2014 08:11:00 +0000 (16:11 +0800)]
x86: Remove cpu_init_r() for x86

Since cpu_init_interrupts() was moved out of cpu_init_r(), it is
useless to keep cpu_init_r() for x86, thus remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agox86: Call cpu_init_interrupts() from interrupt_init()
Bin Meng [Thu, 20 Nov 2014 08:10:49 +0000 (16:10 +0800)]
x86: Call cpu_init_interrupts() from interrupt_init()

Currently cpu_init_interrupts() is called from cpu_init_r() to
setup the interrupt and exception of the cpu core, but at that
time the i8259 has not been initialized to mask all the irqs
and remap the master i8259 interrupt vector base, so the whole
system is at risk of being interrupted, and if interrupted,
wrong interrupt/exception message is shown.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add Intel speedstep and turbo mode code
Simon Glass [Sat, 15 Nov 2014 01:18:43 +0000 (18:18 -0700)]
x86: Add Intel speedstep and turbo mode code

Intel chips have a turbo mode where they can run faster for a short period
until they reach thermal limits. Add code to adjust and query this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Set up XHCI USB
Simon Glass [Sat, 15 Nov 2014 01:18:42 +0000 (18:18 -0700)]
x86: ivybridge: Set up XHCI USB

Add init for XHCI so that high-speed USB can be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: config: Enable USB on link
Simon Glass [Sat, 15 Nov 2014 01:18:41 +0000 (18:18 -0700)]
x86: config: Enable USB on link

Enable USB support on link - there are two EHCI ports available.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Set up EHCI USB
Simon Glass [Sat, 15 Nov 2014 01:18:40 +0000 (18:18 -0700)]
x86: ivybridge: Set up EHCI USB

Add init for EHCI so that USB can be used.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: dts: Add SATA settings for link
Simon Glass [Sat, 15 Nov 2014 01:18:39 +0000 (18:18 -0700)]
x86: dts: Add SATA settings for link

Add the requires settings to enable SATA on link.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Add SATA init
Simon Glass [Sat, 15 Nov 2014 01:18:38 +0000 (18:18 -0700)]
x86: ivybridge: Add SATA init

Add code to set up the SATA interfaces on boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: dts: Add LPC settings for link
Simon Glass [Sat, 15 Nov 2014 01:18:37 +0000 (18:18 -0700)]
x86: dts: Add LPC settings for link

Add some settings required to set up the LPC correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: dts: Move PCI peripherals into a pci node
Simon Glass [Sat, 15 Nov 2014 01:18:36 +0000 (18:18 -0700)]
x86: dts: Move PCI peripherals into a pci node

These peripherals should not be at the top level, since they exist inside
the PCI bus. We don't have a full device tree node for pci yet, but we
should at least put it at the right level.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Add additional LPC init
Simon Glass [Sat, 15 Nov 2014 01:18:35 +0000 (18:18 -0700)]
x86: ivybridge: Add additional LPC init

Set up all the remaining pieces of the LPC (low-pin-count) peripheral in
PCH (Peripheral Controller Hub).

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Add PCH init
Simon Glass [Sat, 15 Nov 2014 01:18:34 +0000 (18:18 -0700)]
x86: ivybridge: Add PCH init

Add required init for the Intel Platform Controller Hub in ivybridge.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Add a simple header file for ACPI
Simon Glass [Sat, 15 Nov 2014 01:18:33 +0000 (18:18 -0700)]
x86: Add a simple header file for ACPI

We don't use many features yet, so this only has a few declarations.
It will be expanded as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: ivybridge: Add support for BD82x6x PCH
Simon Glass [Sat, 15 Nov 2014 01:18:32 +0000 (18:18 -0700)]
x86: ivybridge: Add support for BD82x6x PCH

Add basic setup for the PCH.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: Set up edge triggering on interrupt 9
Simon Glass [Sat, 15 Nov 2014 01:18:31 +0000 (18:18 -0700)]
x86: Set up edge triggering on interrupt 9

Add this additional init in case it is needed by the OS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agopci: Add functions to read and write a BAR address
Simon Glass [Sat, 15 Nov 2014 01:18:30 +0000 (18:18 -0700)]
pci: Add functions to read and write a BAR address

Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: config: Enable plug-and-play for link PCI
Simon Glass [Sat, 15 Nov 2014 01:18:29 +0000 (18:18 -0700)]
x86: config: Enable plug-and-play for link PCI

Enable this option so that we can configure the available PCI devices. Also
make sure that PCI is available early after relocation as we use it for
several other subsystems.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agox86: pci: Add handlers before and after a PCI hose scan
Simon Glass [Sat, 15 Nov 2014 01:18:28 +0000 (18:18 -0700)]
x86: pci: Add handlers before and after a PCI hose scan

Some boards will want to do some setup before and after a PCI hose
is scanned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Add ioapic.h header
Simon Glass [Sat, 15 Nov 2014 01:18:27 +0000 (18:18 -0700)]
x86: Add ioapic.h header

Add definitions for the I/O Advanced Peripheral Interrupt Controller.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agortc: mc146818: Set up RTC at start of day
Simon Glass [Sat, 15 Nov 2014 01:18:26 +0000 (18:18 -0700)]
rtc: mc146818: Set up RTC at start of day

Provide a function to set up the RTC ready for use.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Factor out common values in the link script
Simon Glass [Sat, 15 Nov 2014 01:18:25 +0000 (18:18 -0700)]
x86: Factor out common values in the link script

Define the reset base in config.mk so that it does not need to be calculated
twice in the link script. Also tidy up the START_16 and RESET_VEC_LOC values
to fit with this new approach.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Ensure that all relocation data is included in the image
Simon Glass [Sat, 15 Nov 2014 01:18:24 +0000 (18:18 -0700)]
x86: Ensure that all relocation data is included in the image

Some toolchains put the relocation data into separate sections. Adjust the
linker script to catch this case. Without relocation data, U-Boot will not
boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Panic if there is no relocation data
Simon Glass [Sat, 15 Nov 2014 01:18:23 +0000 (18:18 -0700)]
x86: Panic if there is no relocation data

This normally indicates a problem which will prevent relocation from
functioning, resulting in a hang. Panic in this case to make it easier
to debug.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agox86: Remove board_early_init_r()
Simon Glass [Sat, 15 Nov 2014 01:18:22 +0000 (18:18 -0700)]
x86: Remove board_early_init_r()

This function is not needed. Remove it to improve the generic init sequence
slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
10 years agopci: Update pci_ids.h to include some missing IDs
Simon Glass [Sat, 15 Nov 2014 01:18:21 +0000 (18:18 -0700)]
pci: Update pci_ids.h to include some missing IDs

This was taken from Linux 3.18 with some additional IDs from Chrome OS
Coreboot commit 688ef385.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoAlign embedded device tree correctly
Simon Glass [Sat, 15 Nov 2014 01:18:19 +0000 (18:18 -0700)]
Align embedded device tree correctly

Device trees must be aligned to a 4-byte boundary. This was dropped in the
Kbuild conversion. Bring it back, and use 16-byte alignment for good
measure.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoFix SIZE_MAX compiler warning when using stdint.h
Simon Glass [Tue, 25 Nov 2014 04:18:21 +0000 (21:18 -0700)]
Fix SIZE_MAX compiler warning when using stdint.h

This new symbol may be defined by the compiler. If it is, avoid a compiler
warning when USE_STDINT is defined.

Signed-off-by: Simon Glass <sjg@chromium.org>