Philipp Tomsich [Tue, 10 Oct 2017 14:21:03 +0000 (16:21 +0200)]
rockchip: enable boot0-hook for all Rockchip SoCs
Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
instruction load and running by bootrom;
Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:] Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 10 Oct 2017 14:21:02 +0000 (16:21 +0200)]
rockchip: boot0: align to 0x20 for armv7 '_start'
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:01 +0000 (16:21 +0200)]
arm: boot0 hook: move boot0 hook before '_start'
The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.
To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
(1) if a boot0-hook is present it is inserted at the start of
the image
(2) if a boot0-hook is present, emitting the ARM vector table
(and the _start) symbol are suppressed in vectors.S and
the boot0-hook has full control over where and when it
wants to emit these
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Faiz Abbas [Tue, 14 Nov 2017 10:42:31 +0000 (16:12 +0530)]
thermal: ti-bandgap: Add support for temperature sensor
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Agner [Tue, 14 Nov 2017 14:47:18 +0000 (15:47 +0100)]
envtools: make sure version/timestamp header file are available
With commit 84d46e7e8948 ("tools: env: allow to print U-Boot version")
the fw_env utilities need the version.h header file. Building only
the envtools in a pristine build directory will fail due to missing
header files.
Make sure the header files are a dependency of the envtools target.
Fixes: 84d46e7e8948 ("tools: env: allow to print U-Boot version") Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
When building on a multi-core machine for an SPL-enabled board that
also uses CONFIG_OF_EMBED, the following error can be encountered
due to a race condition:
make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
'spl/dts/built-in.o'. Stop.
../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
make[2]: *** [spl/dts] Error 2
make[2]: *** Waiting for unfinished jobs....
A reliable way to trigger this race condition is to add "sleep 60" to
the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
options using "make -j8" or a similar command.
This commit corrects this race condition via the use of CONFIG_OF_EMBED
in the same way that commit 3c00a2c8b5e2 ("Makefile: Correct dependency
race condition with TPL") and commit 054b3a1e80fc ("dm: Makefile: Build
of-platdata before SPL") use CONFIG_OF_SEPARATE.
Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 6 Nov 2017 23:15:11 +0000 (18:15 -0500)]
Kconfig: Introduce USE_BOOTCOMMAND and migrate BOOTCOMMAND
We first introduce CONFIG_USE_BOOTCOMMAND, similar to
CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
scheme around this usage, and these have been defered for the moment so
that platform maintainers can work on a migration plan.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
Dongjin Kim [Sat, 28 Oct 2017 04:22:27 +0000 (00:22 -0400)]
arm: config: fix default console only to specify the device
Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
"console=console=ttySAC1,115200n8" and this causes the wrong
console device.
Minghuan Lian [Fri, 20 Oct 2017 02:45:50 +0000 (10:45 +0800)]
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
André Draszik [Tue, 3 Oct 2017 15:55:53 +0000 (16:55 +0100)]
tpm: add more useful NV storage permission flags
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik <adraszik@tycoint.com> Acked-by: Simon Glass <sjg@chromium.org>
André Draszik [Tue, 3 Oct 2017 15:55:52 +0000 (16:55 +0100)]
tpm: add tpm_get_random()
Add a function to obtain random data from the TPM.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Added commit message, add cast to min() Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
Wilson Lee [Fri, 3 Nov 2017 06:39:51 +0000 (23:39 -0700)]
serial: nulldev: Implement "pending" function to fix tstc return "true"
In U-boot, serial_tstc was use to determine is there have a character in
serial console that pending for read. If there is no "pending" function
implemented in serial driver, the serial-uclass will return "true(1)"
to indicate there have a character pending to read.
Thus, read a character from nulldev serial will result in continuous
getting -EAGAIN return which might lead system to hang.
This commit is to fix a bug in nulldev serial which implement "pending"
function in nulldev serial to always indicate there is no character in
console that pending for read.
Signed-off-by: Wilson Lee <wilson.lee@ni.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Keng Soon Cheah <keng.soon.cheah@ni.com> Cc: Chen Yee Chew <chen.yee.chew@ni.com> Cc: Bin Meng <bmeng.cn@gmail.com>
Stephen Warren [Fri, 3 Nov 2017 00:11:27 +0000 (18:11 -0600)]
arm64: support running at addr other than linked to
This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Fri, 27 Oct 2017 17:04:08 +0000 (11:04 -0600)]
test/py: add timestamps to log
It can be useful to record how long tests take; this can help debug slow
running test systems or track changes in performance over time. Enhance
the test system to record timestamps while running test:
- Whenever a new log file section is started.
- After U-Boot is started and communication has been established.
- After each host or U-Boot command is executed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Patrice Chotard [Thu, 26 Oct 2017 11:23:19 +0000 (13:23 +0200)]
clk: clk_stm32f7: fix PLL clock division factor
Fix clock division factor initialization for RCC_PLLCFGR
registers.
PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
it's a forbidden value. So update RCC_PLLCFGR using
clrsetbits_le32() to set only necessary bits fields.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation
Masahiro Yamada [Tue, 17 Oct 2017 13:30:20 +0000 (22:30 +0900)]
lib: libfdt: wrap scripts/dtc/libfdt/* where possible
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
Make them a wrapper of scripts/dtc/libfdt/*. This is exactly what
Linux does to sync libfdt. In order to make is possible, import
<linux/libfdt.h> and <linux/libfdt_env.h> from Linux 4.14-rc5.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
The fdt_region.c is U-Boot own file.
I did not touch them in order to avoid unpredictable impact.
Masahiro Yamada [Tue, 17 Oct 2017 13:30:18 +0000 (22:30 +0900)]
tools: use files from scripts/dtc/libfdt where possible
Prior to this commit, tools/Makefile pulls all libfdt files from
lib/libfdt.
lib/libfdt/ and scripts/dtc/libfdt have the same copies for the
followings 6 files:
fdt.c fdt_addresses.c fdt_empty_tree.c fdt_overlay.c fdt_strerr.c
fdt_sw.c
This commit changes them to #include ones from scripts/dtc/libfdt.
Unfortunately, U-Boot locally modified the following 3 files:
fdt_ro.c fdt_wip.c fdt_rw.c
I did not touch them in order to avoid unpredictable impact.
The fdt_region.c is U-Boot own file. This is also borrowed from
lib/libfdt/.
Masahiro Yamada [Tue, 17 Oct 2017 04:42:44 +0000 (13:42 +0900)]
pylibfdt: compile pylibfdt only when dtoc/binman is necessary
Currently, pylibfdt is always compiled if swig is installed on your
machine. It is really annoying because most of targets (excepts
x86, sunxi, rockchip) do not use dtoc or binman.
"checkbinman" and "checkdtoc" are wrong. It is odd that the final
build stage checks if we have built necessary tools. If your platform
depends on dtoc/binman, you must be able to build pylibfdt. If swig
is not installed, it should fail immediately.
I added PYLIBFDT, DTOC, BINMAN entries to Kconfig. They should be
property select:ed by platforms that need them. Kbuild will descend
into scripts/dtc/pylibfdt/ only when CONFIG_PYLIBFDT is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 17 Oct 2017 04:42:43 +0000 (13:42 +0900)]
pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile
The pylibfdt is used by dtoc (and, indirectly by binman), but there
is no reason why it must be generated in the tools/ directory.
Recently, U-Boot switched over to the bundled DTC, and the directory
structure under scripts/dtc/ now mirrors the upstream DTC project.
So, scripts/dtc/pylibfdt is the best location.
I also rewrote the Makefile in a cleaner Kbuild style.
The scripts from the upstream have been moved as follows:
Keerthy [Thu, 12 Oct 2017 04:48:45 +0000 (10:18 +0530)]
board: ti: dra71x-evm: Hook LDO1 of LP8733 to EN_PIN
All regulators are hooked to EN_Pin at reset so that EN Pin controls
their state. Hook the LDO1 regulator to EN pin which at reset is not
hooked. This applies only to LP8733.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Felix Brack [Wed, 11 Oct 2017 16:42:23 +0000 (18:42 +0200)]
am33xx: Add a function to query MPU voltage in uV
For the DM TPS65910 driver I'm working on, querying the MPU voltage
should return a value in uV. This value can then be used by the
regulator's standard function set_value to set the MPU voltage.
Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
André Draszik [Tue, 3 Oct 2017 15:55:51 +0000 (16:55 +0100)]
tpm: fix reading of permanent flags
The offset of the permanent flags structure is in a different
place in the response compared to what the code is doing,
which gives us a completely useless result.
Fix by replacing hand-crafted code with generic parser
infrastructure.
Signed-off-by: André Draszik <adraszik@tycoint.com> Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 28 Sep 2017 12:35:15 +0000 (06:35 -0600)]
dm: core: Correct address cast in dev_read_addr_ptr()
This currently causes a warning in sandbox and will not do the right
thing:
drivers/core/read.c: In function ‘dev_read_addr_ptr’:
drivers/core/read.c:64:44: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
return (addr == FDT_ADDR_T_NONE) ? NULL : (void *)addr;
Use map_sysmem() which is the correct way to convert an address to a
pointer.
Fixes: c131c8bca8 (dm: core: add dev_read_addr_ptr()) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
cmd/fdt.c align data buffer to avoid unaligned word access
Since the compiler is free to place a char array to any address in
memory (in this case the stack), also to a non word aligned address the
function "fdt_prop_parse" runs into troubles upon it wants to write some
(fdt32_t *) to such a variable (if it has been placed to a none word
aligned address).
To avoid this we tell the compiler to always align this scratchpad to a
word aligned address.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at> Reviewed-by: Simon Glass <sjg@chromium.org>
Jon Nettleton [Mon, 13 Nov 2017 05:04:30 +0000 (07:04 +0200)]
arm: mvebu: clearfog: Fix SPI-NOR flash access
The production variant of the SPI flash used by the clearfog
devices are based on winbond chips. Additionally enable
SPI_FLASH_BAR since some variants will have 16MB of flash
that requires this to be enabled.
Remove the default speed and mode; these values are taken from the
device tree when CONFIG_DM_SPI_FLASH is enabled.
Add default bus, so that 'sf' detects the SPI flash by default.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: remove speed/mode; add bus; move winbond to defconfig] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:21 +0000 (10:33 +0200)]
arm: mvebu: clearfog: enable XHCI USB
Enable the driver by default for the clearfog boards since the external
port is configured for XHCI.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: split from the SoC setup patch] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:20 +0000 (10:33 +0200)]
arm: mvebu: Add board_setup for xhci hardware
This fixes the USB 3.0 support for the a38x SOC.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Jon Nettleton [Mon, 6 Nov 2017 08:33:19 +0000 (10:33 +0200)]
mvebu: usb: xhci: a38x support
This makes the initial changes need to support the
a38x series of SOCs. It adds the device-tree identifier
as well as changing the board_support function to take
the IO address designated by device-tree.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: use fdt_addr_t; update 37xx and 8K implementations] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
Ashish Kumar [Mon, 6 Nov 2017 07:49:28 +0000 (13:19 +0530)]
armv8: ls1088ardb: Add distro boot support
Distro boot support gives flexibility to run distro RFS like Ubuntu
being deployed from SD card or SATA drive. If it fails to detect
external storage, fall back to qspi/sd boot.
Enable this by default in RDB's defconfig by selecting
CONFIG_DISTRO_DEFAULTS
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Zhang Ying <zhangying@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Kurt Kanzenbach [Fri, 20 Oct 2017 09:44:25 +0000 (11:44 +0200)]
mtd: nand: fsl-ifc: fix support of multiple NAND devices
Currently the chipselect used to identify the corresponding NAND chip
is stored at the controller and only set during fsl_ifc_chip_init().
This way, only the last NAND chip is working, as the previous value
of cs_nand gets overwritten.
In order to solve this issue the chipselect is computed on demand by
evaluating the bank variable. Thus, the correct chipselect for each
NAND chip operation is used.
Tested on hardware with two NAND chips connected to the IFC
controller.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Acked-by: Scott Wood <oss@buserror.net>
[YS: reformatted commit message] Reviewed-by: York Sun <york.sun@nxp.com>
After adding the "mdelay(500);"
line that was lost in the path the error is gone.
Signed-off-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
[Rebased and updated change and commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
projects / u-boot / log