Masahiro Yamada [Fri, 27 Feb 2015 15:37:57 +0000 (00:37 +0900)]
fixdep: remove multiple .config support code
Since commit e02ee2548afe (kconfig: switch to single .config
configuration), the ".*.cmd" files are not correctly created
for SPL/TPL. The U-Boot extension code in fixdep, which was
introduced to support the multiple .config, must be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Alexey Brodkin [Wed, 25 Feb 2015 14:59:02 +0000 (17:59 +0300)]
common/board_f: implement type casting for gd structure
In case of global data structure defined as "register volatile" compiler
throws an warning about incorrect type used:
--->8---
common/board_f.c: In function "board_init_f_r":
common/board_f.c:1073:2: warning: passing argument 1 of "&board_init_r
+(sizetype)gd->reloc_off" discards "volatile" qualifier from pointer
target type [enabled by default]
(board_init_r + gd->reloc_off)(gd, gd->relocaddr);
^
common/board_f.c:1073:2: note: expected "struct gd_t *" but argument is
of type "volatile struct gd_t *"
--->8---
An obvious fix is manual casting to "gd_t *".
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
Alexey Brodkin [Wed, 25 Feb 2015 10:09:20 +0000 (13:09 +0300)]
lib/asm-offsets - make GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP available for all architectures
GD_RELOCADDR, GD_RELOC_OFF & GD_START_ADDR_SP are generic members of
global data structure so why don't we allow architectures other than ARM
to use it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
Heiko Schocher [Tue, 24 Feb 2015 06:04:38 +0000 (07:04 +0100)]
spl: fix calling "spl export .." more than once
running "spl export ..." more than once fails with:
Trying to execute a command out of order
Trying to execute a command out of order
Trying to execute a command out of order
Trying to execute a command out of order
Trying to execute a command out of order
Trying to execute a command out of order
ERROR prep subcommand failed!
Subcommand failed
reason is commmit: 35fc84fa1f: Refactor the bootm command to reduce code duplication
It used "state != BOOTM_STATE_START" but state is a bitfield, so
check if the bit BOOTM_STATE_START is not set. With this fix,
"spl export ..." can called more than once ...
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Chen Gang [Thu, 19 Feb 2015 15:51:27 +0000 (18:51 +0300)]
use ASM_NL instead of '; ' for assembler new line character in the macro
For some assemblers, they use another character as newline in a macro
(e.g. arc uses '`'), so for generic assembly code, need use ASM_NL (a
macro) instead of ';' for it.
Basically this is the same patch as applied to Linux kernel -
http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/include/linux/linkage.h?id=9df62f054406992ce41ec4558fca6a0fa56fffeb
but modified a bit to fit in U-Boot.
Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com>
Ash Charles [Wed, 18 Feb 2015 19:25:11 +0000 (11:25 -0800)]
omap: gpmc: 'nandecc sw' can use HAM1 or BCH8
The 'nandecc sw' command selects a software-based error correction
algorithm. By default, this is OMAP_ECC_HAM1_CODE_SW but some
platforms use OMAP_ECC_BCH8_CODE_HW_DETECTION_SW as their
software-based correction algorithm. Allow a user to be specific e.g.
# nandecc sw <hamming|bch8>
where 'hamming' is still the default.
Note: we don't just use CONFIG_NAND_OMAP_ECCSCHEME as it might be set
to a hardware-based ECC scheme---a little strange when the user
has requested 'sw' ECC.
Michal Sojka [Tue, 17 Feb 2015 16:08:37 +0000 (17:08 +0100)]
mtd: nand: omap_gpmc: Make ready/busy pins configurable
Commit fb384c4720ca7496775d6578f184bf628db73456 introduced the use of
WAIT0 pin for determining whether the NAND is ready or not. This only
works if all NAND chips are connected to WAIT0. If some chips are
connected to the other available pin WAIT1, nand_wait() does not really
wait and prints a WARN_ON message.
This patch allows the board to provide configuration of which chip is
connected to which WAITx signal. For example, one can define in
include/configs/foo.h:
#define CONFIG_NAND_OMAP_GPMC_WSCFG 0,0,1,1
This would mean that chips using to CS0 and 1 are connected to WAIT0 and
chips with CS2 and 3 are connected to WAIT1.
Signed-off-by: Michal Sojka <sojka@merica.cz> Acked-by: Stefan Roese <sr@denx.de> Tested-by: Michal Vokáč <michal.vokac@comap.cz> Cc: Tom Rini <trini@ti.com>
After rework of the file system API, the size of ext4
write was missed. This causes printing unreliable write
size at the end of the file system write operation.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
Linus Walleij [Tue, 17 Feb 2015 10:35:25 +0000 (11:35 +0100)]
vexpress64: juno: support SMC9118 ethernet
This configures the Juno board to enable ethernet using the
SMSC9118 ethernet controller found in the board. Tested by
TFTP-booting a kernel over ethernet.
Alison Wang [Thu, 12 Feb 2015 10:33:15 +0000 (18:33 +0800)]
m68k: Add generic board support for MCF547X/8X and MCF5445X
This patch adds generic board support for MCF547X/8X and MCF5445X.
It is based on the patch about common generic board support for
M68K architecture sent by Angelo.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
vxWorks needs several parameters which are set by the bootloader und his
environment. So we form a vxWorks bootline and pass the result to vxWorks on
a predefined address.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
board/BuR/common: Introduce Network Console and common environment for it
It is often necessary to "break in" into boards bootloader commandline if
something fails or even for development purposes some parameters have to be
changed.
So we enable u-boot's CONFIG_NETCONSOLE feature.
We also modify Networksettings to apply with this new use-case.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
board/BuR/common: try to setup cpsw mac-address from the devicetree
since we have a dtb blob programmed on the board we try to setup the cpsw
interface with the programmed mac.
If this method fails, we fall back to the device-fuses.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
common/lcd: Add command for writing to lcd-display
Sometimes we do not want redirect u-boot's console to screen but anyway we want
write out some status information out of a u-boot script to the display.
So we cannot use the normal "echo ....", instead we write explicitly using
"lcdputs ..." for writing to the actual cursor position on LCD.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
common/lcd: Add command for setting cursor within lcd-console
Sometimes we do not want redirect u-boot's console to screen but anyway we want
write out some status information out of a u-boot script to the display.
To define the specific position of the string to be written, we have to set
the cursor with "setcurs" before writing.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
drivers/video/am335x-fb: Add possibility to wait for stable power/picture
Often on boards exists a circuit which switches power on/off to LCD display.
Due to the need of limiting the in-rush current the output voltage from this
circuit rises "slowly", so it is necessary to wait a bit (VCC ramp up time)
before starting output on LCD-pins.
This time is specified in <n> ms within the panel-settings, called "pup_delay"
Further some LCDs need a couple of frames to stabilize the image on it.
We have now the possibility to wait some time after starting output on LCD.
This time is also specified in <n> ms within panel-settings, called "pon_delay"
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
gaurav rana [Fri, 27 Feb 2015 04:15:35 +0000 (09:45 +0530)]
SECURE BOOT: Add command for validation of images
1. esbc_validate command is meant for validating header and
signature of images (Boot Script and ESBC uboot client).
SHA-256 and RSA operations are performed using SEC block in HW.
This command works on both PBL based and Non PBL based Freescale
platforms.
Command usage:
esbc_validate img_hdr_addr [pub_key_hash]
2. ESBC uboot client can be linux. Additionally, rootfs and device
tree blob can also be signed.
3. In the event of header or signature failure in validation,
ITS and ITF bits determine further course of action.
4. In case of soft failure, appropriate error is dumped on console.
5. In case of hard failure, SoC is issued RESET REQUEST after
dumping error on the console.
6. KEY REVOCATION Feature:
QorIQ platforms like B4/T4 have support of srk key table and key
revocation in ISBC code in Silicon.
The srk key table allows the user to have a key table with multiple
keys and revoke any key in case of particular key gets compromised.
In case the ISBC code uses the key revocation and srk key table to
verify the u-boot code, the subsequent chain of trust should also
use the same.
6. ISBC KEY EXTENSION Feature:
This feature allows large number of keys to be used for esbc validation
of images. A set of public keys is being signed and validated by ISBC
which can be further used for esbc validation of images.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
gaurav rana [Fri, 27 Feb 2015 04:14:22 +0000 (09:44 +0530)]
fsl_sec_mon: Add driver for Security Monitor block of Freescale
The Security Monitor is the SOC’s central reporting point for
security-relevant events such as the success or failure of boot
software validation and the detection of potential security compromises.
The API's for transition of Security states have been added
which will be used in case of SECURE BOOT.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
gaurav rana [Fri, 27 Feb 2015 04:13:49 +0000 (09:43 +0530)]
fsl_sfp : Move ccsr_sfp_regs definition to common include
Freescale sfp has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the CCSR defintion of
sfp_regs to common include. This patch also defines ccsr_sfp_regs
definition for newer versions of SFP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Rob Herring [Mon, 26 Jan 2015 15:44:18 +0000 (09:44 -0600)]
gpt: support random UUIDs without setting environment variables
Currently, an environment variable must be used to store the randomly
generated UUID for each partition. This is not necessary, so make storing
the UUID optional. Now passing uuid_disk and uuid are optional when random
UUIDs are enabled.
Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Rob Herring [Mon, 26 Jan 2015 15:43:15 +0000 (09:43 -0600)]
gpt: fix error reporting on partition table write failures
The gpt command always reports success even if writing the partition table
failed. Propagate the return value of gpt_restore so we get proper status
reported.
Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Heiko Schocher [Thu, 5 Mar 2015 08:02:23 +0000 (09:02 +0100)]
travis.yml: some adaptions
- adapt to build with eldk-5.4
- add more targets for building with buildman:
- freescale -x arm,m68k,aarch64
- arm1136
- arm1176
- arm720t
- arm920t
- davinci
- kirkwood
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Roger Meier <r.meier@siemens.com>
Marcel Ziswiler [Wed, 4 Mar 2015 13:57:31 +0000 (14:57 +0100)]
arm: pxa: introducing cpuinfo display for marvell pxa270m
According to table 2-3 on page 87 of Marvell's latest PXA270
Specification Update Rev. I from 2010.04.19 [1] there exists a breed of
chips with a new CPU ID for PXA270M A1 stepping which our latest
Colibri PXA270 V2.4A modules actually have assembled. This patch helps
in correctly identifying those chips upon boot as well which then looks
as follows:
Simon Glass [Tue, 3 Mar 2015 15:03:02 +0000 (08:03 -0700)]
ti: armv7: Move SPL SDRAM init to the right place, drop unused CONFIG_SPL_STACK
Currently in some cases SDRAM init requires global_data to be available
and soon this will not be available prior to board_init_f(). Adjust the
code paths in these cases to be correct. In some cases we had the SPL
stack be in DDR as we might have large stacks (due to Falcon Mode +
Environment). In these cases switch to CONFIG_SPL_STACK_R. In other
cases we had simply been setting CONFIG_SPL_STACK into SRAM. In these
cases we no longer need to (CONFIG_SYS_INIT_SP_ADDR is used and is also
in SRAM) so drop those lines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested on Beagleboard, Beagleboard xM Tested-by: Matt Porter <mporter@konsulko.com>
Tested on Beaglebone Black, AM43xx GP EVM, OMAP5 uEVM, OMAP4 Pandaboard Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 3 Mar 2015 15:03:00 +0000 (08:03 -0700)]
arm: spl: Allow board_init_r() to run with a larger stack
At present SPL uses a single stack, either CONFIG_SPL_STACK or
CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
environment) require a lot of stack, some boards set CONFIG_SPL_STACK to
point into SDRAM. They then set up SDRAM very early, before board_init_f(),
so that the larger stack can be used.
This is an abuse of lowlevel_init(). That function should only be used for
essential start-up code which cannot be delayed. An example of a valid use is
when only part of the SPL code is visible/executable, and the SoC must be set
up so that board_init_f() can be reached. It should not be used for SDRAM
init, console init, etc.
Add a CONFIG_SPL_STACK_R option, which allows the stack to be moved to a new
address before board_init_r() is called in SPL.
The expected SPL flow (for CONFIG_SPL_FRAMEWORK) is documented in the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
For version 1: Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Bo Shen <voice.shen@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Tue, 3 Mar 2015 15:02:58 +0000 (08:02 -0700)]
arm: spl: Avoid setting up a duplicate global data structure
This is already set up in crt0.S. We don't need a new structure and don't
really want one in the 'data' section of the image, since it will be empty
and crt0.S's changes will be ignored.
As an interim measure, remove it only if CONFIG_DM is not defined. This
allows us to press ahead with driver model in SPL and allow the stragglers
to catch up.
Simon Glass [Tue, 3 Mar 2015 15:02:57 +0000 (08:02 -0700)]
arm: Reduce the scope of lowlevel_init()
This function has grown into something of a monster. Some boards are setting
up a console and DRAM here in SPL. This requires global_data which should be
set up in one place (crt0.S).
There is no need for SPL to use s_init() for anything since board_init_f()
is called immediately afterwards.
Ying Zhang [Fri, 30 Jan 2015 06:52:11 +0000 (14:52 +0800)]
powerpc: 85xx: Modify CONFIG_USB_MAX_CONTROLLER_COUNT for P1022DS
Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS.
As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the
system bus hangs on USB2 if ETSEC2 is enabled but "usb start"
command is issued. Hence making default controller count to 1
to avoid system hang.
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: Yusong Sun <yorksun@freescale.com>
Shaveta Leekha [Mon, 19 Jan 2015 07:16:54 +0000 (12:46 +0530)]
powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs
The code provides framework for heterogeneous multicore chips based on StarCore
and Power Architecture which are chasis-2 compliant, like B4860 and B4420
It will make u-boot recognize all non-ppc cores and peripherals like
SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
Example boot logs of B4860QDS:
Top level changes include:
(1) Top level CONFIG to identify HETEROGENUOUS clusters
(2) CONFIGS for SC3900/DSP components
(3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
updated for dsp cores and other components
(3) APIs to get DSP num cores and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
board: samsung: reserve memory for the secure firmware
Since more than one board requires memory reservation
for the secure firmware, the reservation code can be
made in a common code.
Now, to reserve some part of the the last bank,
board config should define:
- CONFIG_TZSW_RESERVED_DRAM - len in bytes
- CONFIG_NR_DRAM_BANKS - number of memory banks
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Hyungwon Hwang <human.hwang@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Lukasz Majewski [Thu, 26 Feb 2015 12:23:49 +0000 (13:23 +0100)]
MAINTAINERS: Add F: drivers/usb/gadget to DFU custodian responsibility
After discussion during the last u-boot mini summit with USB maintainer -
Marek Vasut - it has been decided, that gadget development should be
coordinated by DFU custodian.
projects / u-boot / log