Xu, Hong [Tue, 2 Aug 2011 01:05:04 +0000 (01:05 +0000)]
AT91: Small fix on AT91 USART initialization code
Before reset dbgu transmitter, we just wait TXEMPTY to drain the
transmitter register(Just in case). If not doing this, we may sometimes
see several weird characters from DBGU.
A short delay is also added to make sure the new serial settings are
settled.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
[cherry-picked from u-boot-atmel/old-next] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().
Since no_snoop was only used on i.MX, get rid of it BTW.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
Matt Sealey [Fri, 24 Aug 2012 06:44:24 +0000 (06:44 +0000)]
efikamx: sync Smartbook DDR settings in DCD with those found in Genesi's production U-Boot
We have no idea where the DCD was derived from for Smartbook support, but they
differ from the Smarttop settings, MX51EVK settings and certainly don't
correspond to any shipped or development version of U-Boot that Genesi has ever
had on any Smartbook.
So, copy the calibrated, verified settings from the U-Boot as shipped with every
Smartbook since retail production. Remove those few settings that just set the
POR defaults which have already been confirmed for the previous Smarttop DCD
change.
One of the lines is specific to i.MX51 TO3 designs and therefore TO2 Smartbooks
will possibly not work so reliably with this new DCD; that said, TO2 Smartbooks
basically don't exist at retail and the number of units in the world is less
than 5 (3 of which are at the Genesi office or owned by Genesi employees).
Many hours of memory testing confirms the new settings are stable.
Patch v2:
* picked the correct commit from our development tree, correcting tuned DDR ODF setting
(which was correct anyway)
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de>
Matt Sealey [Mon, 27 Aug 2012 05:58:30 +0000 (05:58 +0000)]
efikamx: update to Efika MX Smarttop and Smartbook boards
This is a rework of a previously submitted patchset and bundles the
main board support and USB support into a single commit.
It requires the patch "mx5: add iomux-mx51.h include"
* Use iomux-mx51.h include to simplify board configuration.
* Simplify LED support (remove efikamx_toggle_led, change lit LEDs).
* Simplify MMC support for CD and WP pin differences.
* Fix broken CPU voltage setting - comment said 1.1V but the code set to
1.2V. It should never have been set to 1.2V even on i.MX51 TO2 and
all available Linux kernels would drop the voltage to 1.1V anyway and
work reliably. This should lower power consumption during the boot
process.
* Function renames for readability.
* Some board identification string changes to match actual product names.
* Passes checkpatch (v2)
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Cc: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:40 +0000 (09:25 +0000)]
efikamx: configure Smarttop PCBID and LED pads in DCD for convenience
PCBID pads seem to need time to settle due to external pulldowns, otherwise
we are reading floating GPIO pins with implicit pad pullups and get the wrong
data. However we can't "wait" at the time we need them before relocation,
since timers are not available. The time taken to get from DCD to the code
requiring the pads set seems to be more than long enough (even with caches
enabled).
We have space in the DCD due to the DDR settings changes to configure all
the pad settings we need for this, plus the LED pad settings too which
reduces the amount of code required later on.
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:39 +0000 (09:25 +0000)]
efikamx: remove drive strength function and roll its functionality into the DCD
Efika MX boards configure their DDR pad settings twice, one in the DCD generated
from imximage_*.cfg and again in init_drive_strength called before relocation.
Rather than doing this, roll the changes it makes into the DCD so DDR is set up
before a single line of code in U-Boot is run.
The settings are identical with this DCD block which is shorter (by 7 entries)
than the old one, and after the output of init_drive_strength since a lot of the
functionality in the existing DCD and init_drive_strength function was just
setting the POR defaults. This goes to explain some now-missing entries.
Several hundred rounds of mtest have been run to test the settings before and
after to confirm DDR is stable and no ill-effects have been found.
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:25:38 +0000 (09:25 +0000)]
efikamx: move and rename Efika MX directories and config files to prepare for new boards
* Move Efika MX Smarttop and Smartbook boards into a "genesi" vendor directory
* Rename efikamx -> mx51_efikamx since there is an mx53_efikamx and mx6_efikamx to come
Marek Vasut [Tue, 21 Aug 2012 16:17:26 +0000 (16:17 +0000)]
MX28: DMA: Prolong the DMA timeout
Load from SPI flash can create a long DMA chain, which can take long
time to transfer. Change the DMA timeout to roughly 10s to prevent
such long chains misreporting errors.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
Matt Sealey [Wed, 22 Aug 2012 09:24:06 +0000 (09:24 +0000)]
mx5: add iomux-mx51.h include
Allow usage of the imx-common/iomux-v3.h framework by including pad settings
for the i.MX51. The content of the file is taken from Linux kernel at
commit 5d23b39 plus the required changes to make it work in U-Boot.
The contained pad settings are the minimum required to make an Efika MX boot
and get all the currently-implemented peripherals working in U-Boot.
It is recommended that this file not be just a dumping ground for pins but
only contain the settings required for all the boards using it.
Changes for v2:
* reference commit id from Linux kernel
* additionally roll in the USB pads
* removed GPIO_NUMBER define
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
Otavio Salvador [Sun, 19 Aug 2012 04:58:29 +0000 (04:58 +0000)]
mxs: Only build internal Ethernet controller for i.MX28
The internal Ethernet controller is only available on i.MX28
processors so it needs to use CONFIG_MX28 guardian to avoid having
this code called in others.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
gpio_get_value() should use PSR like Linux, not DR, because DR does not always
reflect the pin state, while PSR does. This is especially useful to detect a
short circuit on a GPIO pin configured as output, or to read the level of a pin
controlled by a non-GPIO IOMUX function.
Stefano Babic [Sun, 19 Aug 2012 21:33:50 +0000 (21:33 +0000)]
MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.
Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Matt Sealey <matt@genesi-usa.com>
Do not pretend to have initialized mmc successfully if CONFIG_FSL_ESDHC is not
defined. Instead, only implement a custom cpu_mmc_init() when it does something.
Matt Sealey [Fri, 17 Aug 2012 08:15:11 +0000 (08:15 +0000)]
spi: fix mxs_spi_slave structure allocation to clear memory
Use calloc() instead of malloc() to allocate the mxs_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.
This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot.
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
Matt Sealey [Fri, 17 Aug 2012 08:15:10 +0000 (08:15 +0000)]
spi: fix mxc_spi_slave structure allocation to clear memory
Use calloc() instead of malloc() to allocate the mxc_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.
This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot. Tested on Efika MX over several years..
Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
This is useful for forcing the ROM's
usb downloader to activate upon a watchdog reset.
Or, you can boot from either SD Card.
Currently, support added for MX53 and MX6Q Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Note: MX53 support untested. Acked-by: Stefano Babic <sbabic@denx.de>
Round up tick_to_time() value instead of truncating it. This avoids stopping
waits instantly for low usec values, and this generally guarantees that the code
always waits for at least the requested duration.
Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Mon, 6 Aug 2012 11:34:54 +0000 (11:34 +0000)]
MX28: Drop the cp15 reconfiguration from SPL
The SPL doesn't need the CP15 reconfiguration, as that's what the
BootROM does for us already. Moreover, when the CP15 is reconfigured
and the code returns control to BootROM, the USB boot works no more.
Remove the code and allow [1] to work properly as well.
Donghwa Lee [Mon, 2 Jul 2012 01:16:13 +0000 (01:16 +0000)]
video: support exynos pwm backlight driver
This patch support exynos pwm backlight driver. It can control backlight
power and brightness by using pwm.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:16:08 +0000 (01:16 +0000)]
video: exynos fb driver supports display port feature
If dp_enabled was set, exynos fb driver support display port feature.
This patch depends on [PATCH] video: support exynos fimd driver
for various exynos series.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:16:05 +0000 (01:16 +0000)]
video: add dp_enabled variable in vidinfo structure
To support display port in exynos fb driver, added dp_enabled variable
in vidinfo structure that set in board file.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:16:02 +0000 (01:16 +0000)]
video: support exynos display port drivers
This patch set supports exynos display port drivers.
DisplayPort is an industry standard device to accommodate the increasing board
adoption of digital display technology within the PC and consumer electronics.
The interface supports internal chip-to-chip and external box-to-box digital
display connections.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:15:59 +0000 (01:15 +0000)]
EXYNOS5: add display port base address
This patch add display port base address for EXYNOS5. In case of EXYNOS4,
use DEVICE_NOT_AVAILABLE macro because DP is not supported.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:15:56 +0000 (01:15 +0000)]
EXYNOS5: support display port phy control function
This patch support display port phy control function.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:15:53 +0000 (01:15 +0000)]
EXYNOS5: support display system register control
This patch supports display block system regisger control.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Mon, 2 Jul 2012 01:15:49 +0000 (01:15 +0000)]
EXYNOS5: support exynos5 lcd clock control
This patch support exynos5 lcd clock control.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Donghwa Lee [Thu, 26 Jul 2012 15:30:49 +0000 (15:30 +0000)]
video: support exynos fimd driver for various exynos series
This patch supports exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In general, The get_timer_masked function get the system time,
no the number of ticks. Such as the nand_wait_ready will use
get_timer_masked to delay the operations. And change the system
time to adopt to the CONFIG_SYS_HZ.
Default spl/u-boot-spl.lds created by spl/Makefile resolves
the spl text load addr to 0x0. As 0x0 belongs to iROM addr so
Global variables can not be used.
Adding specific smdk5250-uboot-spl.lds makes possible to use Global Variables
in spl.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add a structure for table-driven configuration mechanism such that no recompilation
is needed to update the configuration parameters, rather than hard-coding
board initialization parameters.
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).
This patch removes save_boot_params_default() and put the equivalent in start.S
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Tom Rini <trini@ti.com>
Allen Martin [Fri, 31 Aug 2012 08:30:15 +0000 (08:30 +0000)]
tegra20: Remove armv4t build flags
These flags were necessary when building tegra20 as a single binary
that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support
is split into a separate SPL, this is no longer necessary.
Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 31 Aug 2012 08:30:14 +0000 (08:30 +0000)]
spl: fix SPL build of private libgcc
This fixes the SPL build to link with the SPL version of libgcc if
USE_PRIVATE_LIBGCC is set to "yes". Previously it was linking with
the libgcc from the normal u-boot build because it gets set in
PLATFORM_LIBS and passed down the to the SPL build.
Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 31 Aug 2012 08:30:13 +0000 (08:30 +0000)]
arm: enable libgcc build for SPL
Enable the building of private libgcc for SPL
Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 31 Aug 2012 08:30:12 +0000 (08:30 +0000)]
tegra20: enable SPL for tegra20 boards
Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin [Fri, 31 Aug 2012 08:30:11 +0000 (08:30 +0000)]
tegra20: move SDRAM param save to later in boot
Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
projects / u-boot / log