Peter Tyser [Sun, 25 Oct 2009 20:12:56 +0000 (15:12 -0500)]
Add 'editenv' command
The editenv command can be used to edit an environment variable.
Editing an environment variable is useful when one wants to tweak an
existing variable, for example fix a typo or change the baudrate in the
'bootargs' environment variable.
Peter Tyser [Sun, 25 Oct 2009 20:12:55 +0000 (15:12 -0500)]
setenv(): Delete 0-length environment variables
Previously setenv() would only delete an environment variable if it
was passed a NULL string pointer as a value. It should also delete an
environment variable when it encounters a valid string pointer of
0-length.
This change/fix is generally useful and is necessary for the upcoming
"editenv" command.
Peter Tyser [Sun, 25 Oct 2009 20:12:54 +0000 (15:12 -0500)]
readline(): Add ability to modify a string buffer
If the 'buf' parameter is a non-0-length string, its contents will be
edited. Previously, the initial contents of 'buf' were ignored and the
user entered its contents from scratch.
This change is necessary to support the upcoming "editenv" command but
could also be used for future commands which require a user to modify
an existing string.
Peter Tyser [Sun, 25 Oct 2009 20:12:52 +0000 (15:12 -0500)]
Check for NULL prompt in readline_into_buffer()
Previously, passing readline() or readline_into_buffer() a NULL 'prompt'
parameter would result in puts() printing garbage when
CONFIG_CMDLINE_EDITING was enabled.
Note that no board currently triggers this bug. Enabling
CONFIG_CMDLINE_EDITING on some boards (eg bab7xx) would result in
the bug appearing. This change is only intended to prevent someone
from running into this issue in the future.
Anton Vorontsov [Thu, 15 Oct 2009 13:47:13 +0000 (17:47 +0400)]
mpc85xx: Configure QE UART for MPC8569E-MDS boards
To make QE UART usable by Linux we should setup pin multiplexing
and turn UCC2 Ethernet node into UCC2 QE UART node.
Also, QE UART is mutually exclusive with UART0, so we can't enable
it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype
board with eSDHC in 1- or 4-bits mode.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov [Thu, 15 Oct 2009 13:47:06 +0000 (17:47 +0400)]
mpc85xx: Add eSDHC support for MPC8569E-MDS boards
eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2
(in 1-bit mode). When eSDHC is used, we should switch u-boot console to
UART1, and make the proper device-tree fixups.
Because of an erratum in prototype boards it is impossible to use eSDHC
without disabling UART0 (which makes it quite easy to 'brick' the board
by simply issung 'setenv hwconfig esdhc', and not able to interact with
U-Boot anylonger).
So, but default we assume that the board is a prototype, which is a most
safe assumption. There is no way to determine board revision from a
register, so we use hwconfig.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Peter Tyser [Fri, 23 Oct 2009 20:55:47 +0000 (15:55 -0500)]
85xx: MP Boot Page Translation update
This change has 3 goals:
- Have secondary cores be released into spin loops at their 'true'
address in SDRAM. Previously, secondary cores were put into spin
loops in the 0xfffffxxx address range which required that boot page
translation was always enabled while cores were in their spin loops.
- Allow the TLB window that the primary core uses to access the
secondary cores boot page to be placed at any address. Previously, a
TLB window at 0xfffff000 was always used to access the seconary cores'
boot page. This TLB address requirement overlapped with other
peripherals on some boards (eg XPedite5370). By default, the boot
page TLB will still use the 0xfffffxxx address range, but this can be
overridden on a board-by-board basis by defining a custom
CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page
remains in use while U-Boot executes. Previously it was only
temporarily used, then restored to its initial value.
- Allow Boot Page Translation to be disabled on bootup. Previously,
Boot Page Translation was always left enabled after secondary cores
were brought out of reset. This caused the 0xfffffxxx address range
to somewhat "magically" be translated to an address in SDRAM. Some
boards may not want this oddity in their memory map, so defining
CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after
the secondary cores are initialized.
These changes are only applicable to 85xx boards with CONFIG_MP defined.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Vivek Mahajan [Tue, 27 Oct 2009 06:48:55 +0000 (12:18 +0530)]
ppc/85xx/pci: fsl_pci_init: pcie agent mode support
Originally written by Jason Jin and Mingkai Hu for mpc8536.
When QorIQ based board is configured as a PCIe agent, then unlock/enable
inbound PCI configuration cycles and init a 4K inbound memory window;
so that a PCIe host can access the PCIe agents SDRAM at address 0x0
* Supported in fsl_pci_init_port() after adding pcie_ep as a param
* Revamped copyright in drivers/pci/fsl_pci_init.c
* Mods in 85xx based board specific pci init after this change
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov [Thu, 15 Oct 2009 13:47:04 +0000 (17:47 +0400)]
fdt_support: Add multi-serial support for stdout fixup
Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX
constant. With multi-serial support, the CONS_INDEX may no longer
represent actual console, so we should try to extract port number
from the current stdio device name instead of always hard-coding the
constant value.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 22 Oct 2009 04:29:51 +0000 (23:29 -0500)]
fdt: Fix fdt padding issue for initrd mem_rsv
Its possible that we end up with a device tree that happens to be a
particular size that after we call fdt_resize() we don't have any
space left for the initrd mem_rsv.
Fix this be adding a second mem_rsv into the size calculation. We
had one to cover the fdt itself and we have the potential of adding
a second for the initrd.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Simon Kagstrom [Tue, 6 Oct 2009 06:44:22 +0000 (08:44 +0200)]
arm926ejs: 8-byte align stack to avoid LDRD/STRD problems
U-boot for Marvell Kirkwood boards no longer work after the EABI changes
introduced in commit f772acf8a584067033eff1e231fcd1fb3a00d3d9. This
turns out to be caused by a stack alignment issue. The armv5te
instructions ldrd/strd instructions require 8-byte alignment to work
properly (otherwise undefined behavior).
Tested on an OpenRD base board, where both printouts and ubifs stuff now
works.
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Sandeep Paulraj [Tue, 13 Oct 2009 16:32:32 +0000 (12:32 -0400)]
TI DaVinci: Fix DM6467 EVM Compilation Warning
Due to new TI boards being added to U-Boot, the hardware.h
is getting very messy. The warning being fixed is due to
the EMIF addresses being redefined.
The long term solution(after 2009.11) to this is to
have SOC specific header files.
Sandeep Paulraj [Tue, 13 Oct 2009 16:01:52 +0000 (12:01 -0400)]
TI DaVinci: DM355 Leopard: Fix compilation warning
We get a compliation warning when we enable the NAND driver
for DM355 leopard. The waring we get is that we have
an implicit declaration of davinci_nand_init.
It is fixed by including the asm/arch/nand_defs.h header file
Stefan Roese [Mon, 19 Oct 2009 14:19:36 +0000 (16:19 +0200)]
ppc4xx: Sequoia: Add chip_config command
This patch removes the Sequoia "bootstrap" command and replaces it
with the now common command "chip_config".
Please note that the patches with the dynamic PCI sync clock
configuration have to be applied, before this one should go in.
This is because Sequoia has 2 different bootstrap EEPROMs, and
the old bootstrap command configured different values depending
on the detected PCI async clock (33 vs. 66MHz). With the PCI sync
clock patches, this is not necessary anymore. The PCI sync clock
will be configured correctly on-the-fly now.
Stefan Roese [Mon, 19 Oct 2009 12:44:11 +0000 (14:44 +0200)]
ppc4xx: Print PCI synchronous clock frequency upon bootup
Some 4xx variants (e.g. 440EP(x)/GR(x)) have an internal
synchronous PCI clock. Knowledge about the currently configured
value might be helpful. So let's print it out upon bootup.
Stefan Roese [Mon, 19 Oct 2009 12:06:23 +0000 (14:06 +0200)]
ppc4xx: Add function to check and dynamically change PCI sync clock
PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:
This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.
Stefan Roese [Fri, 16 Oct 2009 08:01:09 +0000 (10:01 +0200)]
ppc4xx: Update flash size in reg property of the NOR flash node
Till now only the ranges in the ebc node are updated with the values
currently configured in the PPC4xx EBC controller. With this patch now
the NOR flash size is updated in the device tree blob as well. This is
done by scanning the compatible nodes "cfi-flash" and "jedec-flash"
for the correct chip select number.
This size fixup is enabled for all AMCC eval board right now. Other
4xx boards may want to enable it as well, if this problem with multiple
NOR FLASH sizes exists.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese [Wed, 21 Oct 2009 09:59:52 +0000 (11:59 +0200)]
fdt: Add fdt_fixup_nor_flash_size() to fixup NOR FLASH size in dtb
This function can be used to update the size in the "reg" property
of the NOR FLASH device nodes. This is necessary for boards with
non-fixed NOR FLASH sizes.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Tue, 20 Oct 2009 21:12:13 +0000 (23:12 +0200)]
cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.
Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Tue, 20 Oct 2009 21:07:04 +0000 (23:07 +0200)]
cpu/ppc4xx/fdt.c: avoid strcpy() to constant string
strcpy() was iused with the target address being a pointer to a
constant string, which potentially is read-only. Use a (writable)
array of characters instead.
Mike Frysinger [Mon, 19 Oct 2009 00:43:14 +0000 (20:43 -0400)]
envcrc: check return value of fwrite()
Newer toolchains will often complain about unchecked fwrite():
envcrc.c:117: warning: ignoring return value of `fwrite´, declared
with attribute warn_unused_result
So check the return value to silence the warnings.
Sandeep Paulraj [Sun, 11 Oct 2009 13:10:27 +0000 (09:10 -0400)]
TI DaVinci Sonata: Add Config option for 64 bit Support
Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Sandeep Paulraj [Sun, 11 Oct 2009 13:14:58 +0000 (09:14 -0400)]
TI DaVinci DVEVM: Add Config option for 64 bit Support
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Sandeep Paulraj [Sat, 10 Oct 2009 14:19:20 +0000 (10:19 -0400)]
TI DaVinci DM365: Add Config option for 64 bit Support
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
Sandeep Paulraj [Sat, 10 Oct 2009 14:18:46 +0000 (10:18 -0400)]
TI DaVinci DM355: Add Config option for 64 bit Support
Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config.
Without this option enabled while performing NAND operations we will get
wrong diagnostic messages.
Example if the MTD NAND driver find a bad block while erasing from
a certain address, it will say bad block skipped at 0x00000000.
lib_generic memcpy: copy one word at a time if possible
If source and destination are aligned, this copies ulong values
until possible, trailing part is copied by byte. Thanks for the details
to Wolfgang Denk, Mike Frysinger, Peter Tyser, Chris Moore.
Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
setenv: do console redirection even if previously unset
If "stdout" is not previously set, doing "setenv stdout lcd" had no
effect, since console redirection only worked if the environment
variable was already set; the second time you run setenv it worked.
Most default environments lack stdin/out/err definitions, so I'm sure
I'm not alone with this problem.
This patch simply moves a block of code out of a conditional, to do
the same work even if the variable was previously unset.
Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Paul Gortmaker [Fri, 2 Oct 2009 22:18:33 +0000 (18:18 -0400)]
mem_mtest: fix error reporting, allow escape with ^C
The basic memtest function tries to watch for ^C after each
pattern pass as an escape mechanism, but if things are horribly
wrong, we'll be stuck in an inner loop flooding the console with
error messages and never check for ^C. To make matters worse,
if the user waits for all the error messages to complete, we
then incorrectly report the test passed without errors.
Adding a check for ^C after any error is printed will give
the end user an escape mechanism from a console flood without
slowing down the overall test speed on a slow processor.
Also, the more extensive memtest quit after just a single error,
which is inconsistent with the normal memtest, and not useful if
if you are doing dynamic environmental impact testing, such as
heating/cooling etc.
Both tests now track the error count and report it properly
at test completion.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 1 Oct 2009 16:11:54 +0000 (12:11 -0400)]
new default shortcut to config & build a board
The majority of the time that I build things in U-Boot, I want to just
build for the board. I don't make board config tweaks after selecting the
board. So add a new pattern rule that allows people to combine two steps
in one go:
`make foo_config && make` => `make foo`
This shouldn't conflict with any existing make rules as the pattern rule
is used only the rule doesn't already exist.
Mike Frysinger [Wed, 30 Sep 2009 19:29:58 +0000 (15:29 -0400)]
env: only build env_embedded and envcrc when needed
The env code is protected by the ENV_IS_EMBEDDED define, so attempting to
compile the code when this isn't defined is pointless. Now that the env
headers have unified around CONFIG_ENV_IS_EMBEDDED, convert the build
system to only build the env objects when this is enabled. And now that
the env code is conditionally compiled, we can drop the source code checks.
For people who want to extract the environment manually, add a new option
CONFIG_BUILD_ENVCRC that only enables the envcrc utility.
Kim Phillips [Mon, 12 Oct 2009 16:06:19 +0000 (11:06 -0500)]
mpc83xx: mpc8313 - handle erratum IPIC1 (TSEC IRQ number swappage)
mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
so if on Rev. 2 (and higher) h/w, we fix them up here.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Reviewed-by: Roland Lezuo <roland.lezuo@chello.at>
Anton Vorontsov [Mon, 12 Oct 2009 19:55:39 +0000 (23:55 +0400)]
mpc85xx: Fix booting on various boards
commit 0e870980a64584a591af775bb9c9fe9450124df9 ("8xxx: Removed
CONFIG_NUM_CPUS from 85xx/86xx") breaks U-Boot on various boards,
namely the ones that call get_sys_info() from board_early_init_f().
get_sys_info() calls cpu_numcores(), which depends on probecpu()
being called before. But probecpu() is called after board_early_init_f(),
and so cpu_numcores() returns random values, which in turn crashes
get_sys_info().
To fix the issue we place probecpu() before board_early_init_f()
in an initialization sequence.
Booting on the following boards should be revived now:
mpc8540ads
mpc8541cds
mpc8548cds
mpc8555cds
mpc8560ads
mpc8568mds
mpc8569mds
and maybe more.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Paul Gortmaker [Wed, 7 Oct 2009 20:34:28 +0000 (16:34 -0400)]
mpc8xxx: improve LAW error messages when setting up DDR
When setting up the LAWs for the DDR, if there was an error,
you got the not-so-helpful error text "ERROR" and nothing
else. Not only is it non-informative, but it is also
pretty frustrating trying to grep for "ERROR" in the source.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
will fail to allow the SBC8641D to get past DDR init, because the
LAW config was overlapping. Eventually this board will do SPD
EEPROM config, but for now this gets the board working again.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4, 2/4 and 3/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch re-formats the arm920t s3c24x0 header files in preparation for
changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patch 1/4 of this series
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.
The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports
It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
new warnings or errors were found.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.
Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying before I can
submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
and no new warnings or errors were found.
It was originally submitted on 21/06/2009 but didn't get into the 2009.08
release, and Jean-Pierre made one comment on the original patch (see
http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
changes to the original patch:
- it's been re-based to the current release
- I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment
This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
directly to the maintainers of all except the sbc2410 which doesn't have an
entry in MAINTAINERS.
Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain> Tested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
projects / u-boot / log