Diego Dorta [Thu, 5 Oct 2017 12:15:58 +0000 (09:15 -0300)]
mx6: sys_proto: Add prototypes for imx6_pcie_toggle() functions
When compiling with W=1 errors are observed:
drivers/pci/pcie_imx.c:517:12: warning: no previous prototype for ‘imx6_pcie_toggle_power’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_power(void)
drivers/pci/pcie_imx.c:528:12: warning: no previous prototype for ‘imx6_pcie_toggle_reset’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_reset(void)
Remove these warnings by adding the functions prototypes on arch-mx6/sys_proto.
Diego Dorta [Thu, 5 Oct 2017 12:15:57 +0000 (09:15 -0300)]
mx6: clock: Add a prototype for do_mx6_showclocks()
When compiling with W=1 the following warning is observed:
arch/arm/mach-imx/mx6/clock.c:1268:5: warning: no previous prototype for ‘do_mx6_showclocks’ [-Wmissing-prototypes] int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
Remove this warning by adding the function prototype into arch-mx6/clock.h file.
i.mx6ul: xpress: update UART init for current board revision
UART pinmux has been changed on the last board revision. Change
board pinmux accordingly. Console is on UART7 now, add pinmux,
base address and update console string in environment.
Fabio Estevam [Mon, 2 Oct 2017 13:11:37 +0000 (10:11 -0300)]
mx6slevk: Use PARTUUID to specify the rootfs location
mx6slevk can run different kernel versions, such as NXP 4.1 or mainline.
Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the SD
card changes depending on the kernel version.
In order to avoid such issue, use the UUID method to specify the
rootfs location.
Sven-Ola Tuecke [Thu, 5 Oct 2017 11:46:42 +0000 (08:46 -0300)]
drivers: pci: imx: fix imx_pcie_remove function
We have at least a minor count of boards, that failed to re-initialize
PCI express in the Linux kernel. Typical failure rate is 20% on affected
boards. This is mitigated by commit 6ecbe1375671 ("drivers: pci: imx:
add imx_pcie_remove function").
However, at least on some i.MX6 custom boards, when calling
assert_core_reset() as part of the first-time PCIe init, read access
to PCIE_PL_PFLR simply hangs. Surround this readl() with
imx_pcie_fix_dabt_handler() does not help. For this reason, the forced
LTSSM detection is only used on the second assert_core_reset() that is
called shorly before starting the Linux kernel.
The detection mechanism is to probe the PMIC and when it is
found, then the revision of the board is revd1.
As the detection is done via PMIC, we need to print the board version
at a later stage via CONFIG_DISPLAY_BOARDINFO_LATE and also need
to disable CONFIG_DISPLAY_BOARDINFO, which is done much earlier.
Make the necessary adjustments for the AR8035 PHY to work on revd1.
Based on Richard Hu's work from Technexion's U-Boot tree.
Stefan Agner [Tue, 3 Oct 2017 14:43:26 +0000 (16:43 +0200)]
doc: update imx_usb_loader URL
The changes required to use U-Boot's Serial Download Protocol
implementation are now available in upstream imx_usb_loader
repository. Update the URL accordingly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Sun, 24 Sep 2017 06:00:23 +0000 (09:00 +0300)]
imx: mx7: DDR controller configuration for the i.MX7 architecture
The configuration files imximage.cfg are used for the DDR controller
configuration.
Add DDR configuration function to replace the DDR controller
configuration in the imximage.cfg file. The function can be used for
DDR size detection.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Diego Dorta [Wed, 27 Sep 2017 16:12:40 +0000 (13:12 -0300)]
mx6sabresd: Include <usb/ehci-ci.h> header file
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:586:5: warning: no previous prototype for ‘board_ehci_hcd_init’ [-Wmissing-prototypes] int board_ehci_hcd_init(int port)
Diego Dorta [Wed, 27 Sep 2017 16:12:39 +0000 (13:12 -0300)]
usb: ehci-ci: Add a prototype for board_ehci_power()
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:601:5: warning: no previous prototype for ‘board_ehci_power’ [-Wmissing-prototypes] int board_ehci_power(int port, int on)
Remove this warning by adding the function prototype into usb/ehci-ci.h file.
Diego Dorta [Wed, 27 Sep 2017 16:12:38 +0000 (13:12 -0300)]
mx6sabresd: Include <asm/mach-imx/spi.h> header file
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:680:5: warning: no previous prototype for ‘board_spi_cs_gpio’ [-Wmissing-prototypes] int board_spi_cs_gpio(unsigned bus, unsigned cs)
Remove this warning by including <asm/mach-imx/spi.h>.
Diego Dorta [Thu, 21 Sep 2017 18:10:03 +0000 (15:10 -0300)]
imx: sys_proto: Add a prototype for board_mmc_get_env_dev()
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning:
no previous prototype for ‘board_mmc_get_env_dev’
[-Wmissing-prototypes] int board_mmc_get_env_dev(int devno)
Remove this warning by adding the function prototype into sys_proto.h file.
Diego Dorta [Fri, 22 Sep 2017 15:12:18 +0000 (12:12 -0300)]
imx: Include <input.h> header file
When building with W=1 errors like the one below is seen:
board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning:
no previous prototype for ‘overwrite_console’
[-Wmissing-prototypes] int overwrite_console(void)
Fix the build warnings by including <input.h>.
Signed-off-by: Diego Dorta <diego.dorta@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Chris Packham [Thu, 28 Sep 2017 21:53:36 +0000 (10:53 +1300)]
i2c: muxes: pca954x: look up width from chip_desc
Commit 8e6eda7cda6c ("drivers/i2c/muxes/pca954x: Add pca9547 I2C mux
support") introduced a chip_desc for the pca954x devices but failed to
update pca954x_ofdata_to_platdata() to be aware of it. Make
pca954x_ofdata_to_platdata() lookup the chip_desc to validate the device
width.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Marek Behun <marek.behun@nic.cz>
The option is specified in Kconfig, but still a few config header files
are overriding the choice by #undef'ing it. Re-sync the option with
moveconfig to rid of the #undefs.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Having this as a 'default y' is rather annoying because it doesn't
actually compile unless other options are defined in the board header:
../cmd/bootm.c: In function 'do_imls_nor':
../cmd/bootm.c:330:7: error: 'CONFIG_SYS_MAX_FLASH_BANKS' undeclared (first use in this function); did you mean 'CONFIG_SYS_MAX_FLASH_SECT'?
i < CONFIG_SYS_MAX_FLASH_BANKS; ++i, ++info) {
Make it 'default n' so people who develop new boards that start from a
blank defconfig have one less compilation failure to debug.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Marek Vasut [Wed, 4 Oct 2017 01:03:50 +0000 (03:03 +0200)]
ARM: rmobile: Fixup ULCB CPLD support after PFC rework
The ULCB CPLD support was not updated during the PFC table rework,
fix up the GPIO numbers until the CPLD support is rewritten to a
proper DM capable and DT probing driver.
York Sun [Thu, 28 Sep 2017 15:42:16 +0000 (08:42 -0700)]
armv8: ls1043ardb_sdcard: prepare falcon boot
Due to a conflict with recent Primary Protected Application (PPA),
PPA cannot be loaded for SPL stage, falcon boot is not enabled by
default. With compatible PPA image, to enable falcon boot, activate
these Kconfig options in defconfig
CONFIG_SPL_FIT=y
CONFIG_SPL_FSL_LS_PPA=y
CONFIG_SPL_GZIP=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_OF_LIBFDT=y
Because environment variables are not avaiable during SPL stage for
SD boot, set "boot_os=y" as default.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
York Sun [Thu, 28 Sep 2017 15:42:12 +0000 (08:42 -0700)]
armv8: fsl-layerscape: Avoid running dram_init_banksize again
gd->ram_size is reduced in this function to reserve secure memory.
Avoid running this function again to further reduce memory size.
This fixes issue for SPL boot with PPA image loaded in which case
secure memory is incorrectly allocated due to repeated calling.
Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
York Sun [Thu, 28 Sep 2017 15:42:11 +0000 (08:42 -0700)]
cmd: spl: fix compiling error when CONFIG_CMD_SPL_WRITE_SIZE not defined
CONFIG_CMD_SPL_WRITE_SIZE is used for writing parameters to non-volatile
storage. So far it is only used for NAND. Fix compiling error when this
macro is not used for SD.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Anatolij Gustschin <agust@denx.de>
York Sun [Thu, 28 Sep 2017 15:42:10 +0000 (08:42 -0700)]
spl: fix assignment of board info to global data
Commit 15eb1d43bf47 ("spl: reorder the assignment of board info to
global data") intended to move assignment of board info earlier,
into board_init_r(). However, function preload_console_init() is
called either from spl_board_init() or from board_init_f(). For the
latter case, the board info assignment is much earlier than proposed
board_init_r(). Create a new function to fill gd->bd and call this
function when needed.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Ravi Babu <ravibabu@ti.com> CC: Lukasz Majewski <lukma@denx.de> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The MC boot sequence is contained in mc_env_boot. Update LS1088A
boards to use this function, and hook it to reset_phy so that it's
called late enough, after the ports have been initialized, for
proper DPC / DPL fixup.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Sumit Garg [Tue, 3 Oct 2017 21:50:49 +0000 (03:20 +0530)]
armv8: fsl-layerscape: Allocate Secure memory from first ddr region
This change is required due to trusted OS (OP-TEE) not being position
independent code, it requires compile time fixed base address.
To take care of this it is assumed that all layerscape armv8 platforms
has minimum 2G ddr in first region. So we can have fixed address
space (66 MB -> (2MB for PPA + 64MB for trusted OS)) allocated from
top of first 2G ddr region and compile trusted OS with this fixed
base address.
But one exception here is ls1012 where we have only 1G (rdb) or 512M
(frdm) ddr memory. For those we can have different fixed compile time
base addresses for trusted OS.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Gong Qianyu [Mon, 18 Sep 2017 08:59:28 +0000 (16:59 +0800)]
armv8: ls1046aqds: Fix NAND offset for Fman ucode and env
Fix a bug of 'commit 8104deb2d6b7 ("armv8: layerscape: Adjust memory
mapping for Flash/SD card on LS1046A")' as NAND block size is 256KB
on LS1046AQDS.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Klaus Goger [Wed, 20 Sep 2017 11:50:41 +0000 (13:50 +0200)]
dm: ofnode: query correct property in livetree ofnode_get_addr_size
The livetree codepath of ofnode_get_addr_size always used the "reg"
property for of_get_property. Use the property parameter of the function
call instead and check the return value if the property exists.
Otherwise return FDT_ADDR_T_NONE.
This was discoverd while using SPI NOR with livetree.
spi_flash_decode_fdt checks for memory-map and will not fail with
livetree even if the property does not exist.
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 17 Sep 2017 22:54:53 +0000 (16:54 -0600)]
dm: gpio: Correct use of -ENODEV in drivers
In U-Boot -ENODEV means that there is no device. When there is a problem
with the device, drivers should return an error like -ENXIO or -EREMOTEIO.
When the device tree properties cannot be read correct , they should
return -EINVAL.
Update various GPIO drivers to follow this rule, to help with consistency
for future driver writers.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Adam Ford <aford173@gmail.com>
Simon Glass [Sun, 17 Sep 2017 22:54:52 +0000 (16:54 -0600)]
dm: gpio: Add a comment about not copying some drivers
These three drivers all use U_BOOT_DEVICE rather than device tree to
create devices, so have to do manual allocation of platform data. This is
not true for new platforms.
Add a more explicit comment so that people do not copy this approach with
new boards.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Adam Ford <aford173@gmail.com>
Simon Glass [Sun, 17 Sep 2017 22:54:51 +0000 (16:54 -0600)]
dm: gpio: vybrid_gpio: Correct driver's use of bind() method
It does not look like this driver needs to use a bind() method. It does
not manually create devices with device_bind() nor does it create devices
using U_BOOT_DEVICE(). It seems to only use device tree.
Therefore the manual allocation of platform data is not needed and is
confusing. Also platform data should be set up by the ofdata_to_platdata()
method, not bind().
Update the driver in case others use it as a model in future.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Adam Ford <aford173@gmail.com>
Patrice Chotard [Tue, 3 Oct 2017 13:47:59 +0000 (15:47 +0200)]
configs: stm32: update SRAM address for STM32H7 disco and eval
As suggested by Vikas Manocha, update embedded SRAM address
to use AXI SRAM available on D1 domain instead of using
AHB SRAM (D2 domain).
On some STM32H743 SoCs, D2 domain SRAM is accessible even if
SRAMxEN bit in AHB2ENR bits are not set whereas on others SoCs
version it's not accessible.
Bo Shen [Tue, 3 Oct 2017 05:47:59 +0000 (22:47 -0700)]
ARM: stm32f7: fix prescaler calculation of timer
As the timer 2 is on APB1 bus, the maximum of clock frequency of APB1 timer
clock is half of SYSCLK. Then to calculate the timer prescaler for timer 2
which need to be divided by 2.
Signed-off-by: Bo Shen <voice.shen@gmail.com> Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Tuomas Tynkkynen [Sat, 30 Sep 2017 23:25:21 +0000 (02:25 +0300)]
fs/fat: Fix 'CACHE: Misaligned operation at range' warnings
The 'block' field of fat_itr needs to be properly aligned for DMA and
while it does have '__aligned(ARCH_DMA_MINALIGN)', the fat_itr structure
itself needs to be properly aligned as well.
While at it use malloc_cache_aligned() for the other aligned allocations
in the file as well.
Fixes: 2460098cffacd1 ("fs/fat: Reduce stack usage") Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 29 Sep 2017 18:32:44 +0000 (14:32 -0400)]
cmd: Make CMD_LZMA / CMD_UNZIP default y if CMD_BOOTI
In the Linux Kernel on ARM64, the Image.COMPRESSION file is not
self-extracting in the way that x86 and ARM images are. So when
CMD_BOOTI is enabled we should also default to enabling CMD_UNZIP and
CONFIG_LZMA in order for the user to be able to decompress many of the
common compressions that will be done to an Image file.
Sam Protsenko [Thu, 28 Sep 2017 19:33:45 +0000 (12:33 -0700)]
scripts: Move Kconfig contents to cmd/Kconfig
On case-insensitive file systems we have collision between
scripts/kconfig/ directory and scripts/Kconfig file. This patch moves
scripts/Kcofnig contents to cmd/Kconfig to fix that.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
serial: stm32x7: remove useless CONFIG_CLK and OF_CONTROL flag
This driver is currently used by STM32F7 and STM32H7 SoCs.
As CONFIG_CLK and OF_CONTROL flags are set by default for these
2 SoCs, this flag becomes useless in this driver, so remove it.
relocate_code() allocates 32 bytes stack frame but only 16 bytes are
freed before return. it will cause errors to possible previous frames
and doesn't make relocate_code() look like a function.
fix by freeing 32 bytes stack space
Signed-off-by: zijun_hu <zijun_hu@htc.com> Reviewed-by: Simon Glass <sjg@chromium.org>
ARMv8: get new GD address from gd->new_gd directly
the new GD address is calculated via board data BD currently
it require the new GD area locates below BD tightly, so a strict
constraint is imposed on memory layout which maybe make special
platform unpleasant.
fix it by getting new GD address from gd->new_gd directly.
Signed-off-by: zijun_hu <zijun_hu@htc.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 7 Oct 2017 15:27:59 +0000 (11:27 -0400)]
cmd/gpt.c, cmd/nvedit.c, tools/fit_image.c: Rework recent fixes for Coverity
The recent changes to these files did not completely fix the previous
issues, or introduced different (minor) issues. In cmd/gpt.c we need to
dereference str_disk_guid to be sure that malloc worked. In
cmd/nvedit.c we need to be careful that we can also fit in that leading
space when adding to the string. And in tools/fit_image.c we need to
re-work the error handling slightly in fit_import_data() so that we only
call munmap() once. We have two error paths here, one where we have an
fd to close and one where we do not. Adjust labels to match this.
Reported-by: Coverity (CID: 167366, 167367, 167370) Signed-off-by: Tom Rini <trini@konsulko.com>
Andy Shevchenko [Tue, 3 Oct 2017 11:55:08 +0000 (14:55 +0300)]
x86: edison: Bring minimal ACPI support to the board
This board is based on Intel Tangier SoC (Intel Merrifield platform)
and may utilize ACPI powerfulness.
Bring minimum support by appending initial DSDT table for it.
Note, the addresses for generated tables are carefully chosen to avoid
any conflicts with existing shadowed BIOS data. The user have somewhat
like ~31 kB available for compiled ACPI tables that ought to be enough.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Tue, 3 Oct 2017 11:55:07 +0000 (14:55 +0300)]
x86: tangier: Enable ACPI support for Intel Tangier
Intel Tangier SoC is a part of Intel Merrifield platform which doesn't
utilize ACPI by default. Here is an attempt to unleash ACPI flexibility
power on Intel Merrifield based platforms.
The change brings minimum support of the devices that found on
Intel Merrifield based end user device.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot / log