The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
switch to enable this setting.
The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
previously.
5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
Timur Tabi [Fri, 8 Feb 2008 19:15:55 +0000 (13:15 -0600)]
83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload
the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET.
Cleaned up the board header files to make selecting the VSC7385 easier to
control.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Timur Tabi [Fri, 8 Feb 2008 19:15:54 +0000 (13:15 -0600)]
NET: Add Vitesse VSC7385 firmware uploading
The Vitesse VSC7385 is a 5-port switch found on the Freescale MPC8349E-mITX
and other boards. A small firwmare must be uploaded to its on-board memory
before it can be enabled. This patch adds the code which uploads firmware
(but not the firmware itself).
Previously, this feature was provided by a U-Boot application that was
made available only on Freescale BSPs. The VSC7385 firmware must still
be obtained separately, but at least there is no longer a need for a separate
application.
Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
Jerry Van Baren [Sat, 22 Mar 2008 18:23:49 +0000 (14:23 -0400)]
Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T
These defines embedded the u-boot env variables and/or the bd_t structure
in the fdt blob. The conclusion of discussion on the u-boot email list
was that embedding these in the fdt blob is not useful: there are better
ways of passing the data (in fact, the fdt blob itself replaces the
bd_t struct).
The only board that enables these is the stxxtc and they don't appear
to be used by linux.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
Kyungmin Park [Sun, 16 Mar 2008 23:54:06 +0000 (08:54 +0900)]
Add Flex-OneNAND booting support
Flex-OneNAND is a monolithic integrated circuit with a NAND Flash array
using a NOR Flash interface. This on-chip integration enables system designers
to reduce external system logic and use high-density NAND Flash
in applications that would otherwise have to use more NOR components.
Flex-OneNAND enables users to configure to partition it into SLC and MLC areas
in more flexible way. While MLC area of Flex-OneNAND can be used to store data
that require low reliability and high density, SLC area of Flex-OneNAND
to store data that need high reliability and high performance. Flex-OneNAND
can let users take advantage of storing these two different types of data
into one chip, which is making Flex-OneNAND more cost- and space-effective.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
goda.yusuke [Wed, 5 Mar 2008 08:08:20 +0000 (17:08 +0900)]
net: Divided code of NE2000 ethernet driver
There are more devices of the NE2000 base.
A present code is difficult for us to support more devices.
To support more NE2000 clone devices, separated the function.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Mike Frysinger [Mon, 25 Feb 2008 04:58:13 +0000 (23:58 -0500)]
net/Blackfin: move on-chip MAC driver into drivers/net/
The Blackfin on-chip MAC driver was being managed in the BF537-STAMP board
directory, but it is not board specific, so relocate it to the drivers dir
so that other Blackfin ports can utilize it.
Mike Frysinger [Mon, 25 Feb 2008 04:52:35 +0000 (23:52 -0500)]
smc91111: use SSYNC() rather than asm(ssync) for Blackfin
Since the "ssync" instruction may have hardware anomalies associated with
it, have the smc91111 driver use the SSYNC macro rather than invoking it
directly. We workaround all the anomalies via this macro.
Kumar Gala [Fri, 15 Feb 2008 21:16:18 +0000 (15:16 -0600)]
ppc: Allow boards to specify how much memory they can map
For historical reasons we limited the stack to 256M because some boards
could only map that much via BATS. However newer boards are capable of
mapping more memory (for example 85xx is capble of doing up to 2G).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 15 Feb 2008 02:44:42 +0000 (20:44 -0600)]
Add setexpr command
Add a simple expr style command that will set an env variable as the result
of the command. This allows us to do simple math in shell. The following
operations are supported: &, |, ^, +, -, *, /.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.
We do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you
don't need to do Hit_Invalidate_I, but flush_cache() needs it since this
function is used not only in U-Boot specfic programs but also at loading
target binaries.
Currently we do 1) Index_Store_Tag_I, 2) Fill and 3) Index_Store_Tag_I
again per a loop for I-cache initialization. But according to 'See MIPS
Run', we're encouraged to use three separate loops rather than combining
them *for both I- and D-cache*. This patch tries to fix this.
In accordance with fixing above, mips_init_[id]cache are separated from
mips_cache_reset(), and rewrite cache loops are completely rewritten with
useful macros.
This patch replaces the current function definitions with NESTED, LEAF
and END macro. They specify some more additional information about the
function; an alignment of symbol, type of symbol, stack frame usage, etc.
These information explicitly tells the assembler and the debugger about
the types of code we want to generate.
[MIPS] Request for the 'mips_cache_lock()' removal
The initial intension of having mips_cache_lock() was to use the cache
as memory for temporary stack use so that a C environment can be set up
as early as possible.
But now mips_cache_lock() follow lowlevel_init(). We've already have the
real memory initilaized at this point, therefore we could/should use it.
No reason to lock at all.
Other problems:
Cache locking is not consistent across MIPS implementaions. Some imple-
mentations don't support locking at all. The style of locking varies -
some support per line locking, others per way, etc. Some parts use bits
in status registers instead of cache ops. Current mips_cache_lock() is
not necessarily general-purpose.
And this is worthy of special mention; once U-Boot/MIPS locks the lines,
they are never get unlocked, so the code relies on whatever gets loaded
after U-Boot to re-initialize the cache and clear the locks. We're sup-
posed to have CFG_INIT_RAM_LOCK and unlock_ram_in_cache() implemented,
but leave the situation as it is for a long time.
For these reasons, I proposed the removal of mips_cache_lock() from the
global start-up code.
This patch adds CFG_INIT_RAM_LOCK_MIPS to make existing users aware that
*things have changed*. If he wants the same behavior as before, he needs
to have CFG_INIT_RAM_LOCK_MIPS in his config file.
If we don't have any regression report through several releases, then
we'll remove codes entirely.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> Acked-by: Andrew Dyer <amdyer@gmail.com>
Yuri Tikhonov [Mon, 24 Mar 2008 10:30:54 +0000 (11:30 +0100)]
lwmon5 SYSMON POST: fix backlight control
If the LWMON5 config has SYSMON POST among CONFIG_POSTs which may be
run on the board, then the SYSMON POST controls the display backlight
(doesn't switch backlight ON if POST FAILED, and does switch the
backlight ON if PASSED).
If not, then the video driver controls the display backlight (just
switch ON the backlight upon initialization).
In current source code, when the device number of PCI is 0, process PCI
bridge without fail. However, when the device number is 0, it is not PCI
always bridge. There are times when device of PCI allocates.
When CONFIG_PCI_SKIP_HOST_BRIDGE is enable, this problem is solved when
use this patch.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Stefan Roese <sr@denx.de>
Yuri Tikhonov [Thu, 20 Mar 2008 14:56:04 +0000 (17:56 +0300)]
LWMON5: POST RTC fix
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
and so on).
The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.
The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.
Stefan Roese [Wed, 19 Mar 2008 06:09:26 +0000 (07:09 +0100)]
CFI: Small cleanup for FLASH_SHOW_PROGRESS
With this patch we don't need that many #ifdef's in the code. It moves
the subtraction into the macro and defines a NOP-macro when
CONFIG_FLASH_SHOW_PROGRESS is not defined.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
David Gibson [Mon, 18 Feb 2008 07:09:04 +0000 (18:09 +1100)]
libfdt: Remove no longer used code from fdt_node_offset_by_compatible()
Since fdt_node_offset_by_compatible() was converted to the new
fdt_next_node() iterator, a chunk of initialization code became
redundant, but was not removed by oversight. This patch cleans it up.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
David Gibson [Mon, 18 Feb 2008 07:06:31 +0000 (18:06 +1100)]
libfdt: Trivial cleanup for CHECK_HEADER)
Currently the CHECK_HEADER() macro is defined local to fdt_ro.c.
However, there are a handful of functions (fdt_move, rw_check_header,
fdt_open_into) from other files which could also use it (currently
they open-code something more-or-less identical). Therefore, this
patch moves CHECK_HEADER() to libfdt_internal.h and uses it in those
places.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
David Gibson [Thu, 14 Feb 2008 05:50:34 +0000 (16:50 +1100)]
libfdt: Fix NOP handling bug in fdt_add_subnode_namelen()
fdt_add_subnode_namelen() has a bug if asked to add a subnode to a
node which has NOP tags interspersed with its properties. In this
case fdt_add_subnode_namelen() will put the new subnode before the
first NOP tag, even if there are properties after it, which will
result in an invalid blob.
This patch fixes the bug, and adds a testcase for it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
David Gibson [Tue, 12 Feb 2008 00:58:31 +0000 (11:58 +1100)]
libfdt: Add and use a node iteration helper function.
This patch adds an fdt_next_node() function which can be used to
iterate through nodes of the tree while keeping track of depth. This
function is used to simplify the iteration code in a lot of other
functions, and is also exported for use by library users.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
David Gibson [Fri, 11 Jan 2008 03:55:05 +0000 (14:55 +1100)]
libfdt: Add fdt_set_name() function
This patch adds an fdt_set_name() function to libfdt, mirroring
fdt_get_name(). This is a r/w function which alters the name of a
given device tree node.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Yuri Tikhonov [Wed, 6 Feb 2008 17:48:36 +0000 (18:48 +0100)]
The patch introduces the alternative configuration of the log buffer for the lwmon5 board: the storage for the log-buffer itself is OCM(on-chip memory), the log-buffer header is moved to six GPT registers (PPC440EPX_GPT0_COMP1, ..., PPC440EPX_GPT0_COMP5).
To enable this, alternative, configuration the U-Boot board configuration
file for lwmon5 includes the definitions of alternative addresses for header
(CONFIG_ALT_LH_ADDR) and buffer (CONFIG_ALT_LB_ADDR).
The Linux shall be configured with the CONFIG_ALT_LB_LOCATION option set,
and has the BOARD_ALT_LH_ADDR and BOARD_ALT_LB_ADDR constants defined in the
lwmon5 board-specific header (arch/ppc/platforms/4xx/lwmon5.h).
Yuri Tikhonov [Mon, 4 Feb 2008 13:11:03 +0000 (14:11 +0100)]
The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
Mike Frysinger [Mon, 18 Feb 2008 10:26:48 +0000 (05:26 -0500)]
Blackfin: convert BFIN_CPU to CONFIG_BFIN_CPU
Stop tying things to the processor that should be tied to other defines and
change BFIN_CPU to CONFIG_BFIN_CPU so that it can be used in the build
system to select the -mcpu option.
Mike Frysinger [Sat, 16 Feb 2008 12:40:36 +0000 (07:40 -0500)]
Blackfin: move bootldr command to common code
This moves the Blackfin-common bootldr command out of the BF537-STAMP
specific board directory and into the common directory so that all Blackfin
boards may utilize it.
Stefan Roese [Wed, 5 Mar 2008 11:29:32 +0000 (12:29 +0100)]
usb: Add CFG_OHCI_USE_NPS to common USB-OHCI driver
This patch adds CFG_OHCI_USE_NPS to the common USB-OHCI driver. This
way a board just needs to define this new option to enable the "force
NoPowerSwitching mode" instead of adding new CPU/architecture defines
to the USB source itself.
This new option will be used first with the new AMCC 460EX Canyonlands
board port, which will be posted in a few days.
This patch also fixes a small compilation problem when DEBUG is enabled.
Stefan Roese [Mon, 3 Mar 2008 16:27:02 +0000 (17:27 +0100)]
ppc4xx: Add Canyonlands NAND booting support
460EX doesn't support a fixed bootstrap option to boot from 512 byte page
NAND devices. The only bootstrap option for NAND booting is option F for
2k page devices. So to boot from a 512 bype page device, the I2C bootstrap
EEPROM needs to be programmed accordingly.
This patch adds basic NAND booting support for the AMCC Canyonlands aval
board and also adds support to the "bootstrap" command, to enable NAND
booting I2C setting.
Tested with 512 byte page NAND device (32MByte) on Canyonlands.
projects / u-boot / log