Emil Medve [Wed, 1 Sep 2010 03:57:43 +0000 (22:57 -0500)]
powerpc/corenet_ds: Various updates to initial env cfg
* Make the U-Boot update command sequence conditional. Helps prevent
accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Mon, 2 Aug 2010 18:03:23 +0000 (13:03 -0500)]
fsl: verify writes to the MAC address EEPROM
Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected. Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information. With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Wed, 21 Jul 2010 21:56:19 +0000 (16:56 -0500)]
p1022ds: add audclk hwconfig setting to enable codec reference clock
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled. Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.
The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.
Also configure a pin muxing to select some SSI signals, which will disable
I2C1.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 29 Sep 2010 17:31:35 +0000 (13:31 -0400)]
mpc8569mds: fix consuming long time while relocating code.
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Haiying Wang [Wed, 29 Sep 2010 17:44:14 +0000 (13:44 -0400)]
mpc8569mds: fix CONFIG_ENV_SIZE
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Stefan Roese [Wed, 29 Sep 2010 14:58:38 +0000 (16:58 +0200)]
ppc4xx: Use common ns16550 functions in 4xx UART POST driver
This patch changes the PPC4xx POST UART driver to use the common
NS16550 functions for receiving and sending. Additionally the
local function for SoC divisor setup are removed. Instead the
functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This
removes code duplication.
Also the common CONFIG_SYS_NS16550_COMx defines are now used
to describe the POST UART's.
And a compile breakage is fixed, introduced by a git merge of
the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to
"asm/ppc4xx.h". Fixed as well with this patch.
Sascha Laue [Thu, 19 Aug 2010 07:38:56 +0000 (09:38 +0200)]
ppc4xx: Big lwmon5 board support rework/update
This patch brings the lwmon5 board support up-to-date. Here a
summary of the changes:
lwmon5 board port related:
- GPIO's changed to control the LSB transmitter
- Reset USB PHY's upon power-up
- Enable CAN upon power-up
- USB init error workaround (errata CHIP_6)
- EBC: Enable burstmode and modify the timings for the GDC memory
- EBC: Speed up NOR flash timings
lwmon5 board POST related:
- Add FPGA memory test
- Add GDC memory test
- DSP POST reworked
- SYSMON POST: Fix handling of negative temperatures
- Add output for sysmon1 POST
- HW-watchdog min. time test reworked
Additionally some coding-style changes were done.
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com> Signed-off-by: Stefan Roese <sr@denx.de>
Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.
Signed-off-by: Tirumala R Marri <tmarri@apm.com Signed-off-by: Stefan Roese <sr@denx.de>
APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.
Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
Mike Frysinger [Sat, 2 Oct 2010 18:31:32 +0000 (14:31 -0400)]
Blackfin: otp: fix build after constification of args[]
The OTP code does a little shuffling of arguments that aren't really
necessary, so use a local variable instead to fix build errors now
that the args[] parameter is const.
Mike Frysinger [Wed, 29 Sep 2010 20:24:16 +0000 (20:24 +0000)]
Blackfin: bf548-ezkit: bump SPI flash size up
The current size used (256KiB) is smaller than the LDR created for
the bf548-ezkit, so 'run update' doesn't work correctly. So bump
up the size a bit by making this flexible per-board config.
Mike Frysinger [Sun, 26 Sep 2010 07:00:38 +0000 (07:00 +0000)]
Blackfin: propagate target cpu defines when building embedded env
Since we're no longer extracting the env from the target ELF file (since
upstream wouldn't take that change), we're back to the problem of cpu
defines not properly propagating to the env setup stage. So the embedded
env built by the host compiler doesn't match the one that is linked into
the u-boot env.
Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The input sub command was missing from the help text, and it didn't show
the actual value currently read on the GPIO. This allows people to read
the value of input pins.
Mike Frysinger [Mon, 9 Aug 2010 21:57:47 +0000 (17:57 -0400)]
Blackfin: move CONFIG_BFIN_CPU to board config.mk
The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk. It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.
Mike Frysinger [Wed, 5 May 2010 04:56:30 +0000 (00:56 -0400)]
Blackfin: bfin_spi: add optional DMA support
This moves the last piece from the old spi_flash driver to the new SPI
framework -- optional DMA RX support. This typically cuts speeds by ~40%
at the cost of additional ~300 bytes.
Wolfgang Denk [Tue, 28 Sep 2010 21:02:05 +0000 (23:02 +0200)]
mpc512x: fix build issues
Commit 800eb0964 "POST cleanup." removed file
arch/powerpc/cpu/mpc512x/common.c but failed to remove the reference
to it from arch/powerpc/cpu/mpc512x/Makefile which causes somewhat
obscure build errors:
make[1]: *** No rule to make target `/work/wd/tmp-ppc/arch/powerpc/cpu/mpc512x/.depend', needed by `_depend'. Stop.
Steve Sakoman [Mon, 20 Sep 2010 16:55:24 +0000 (09:55 -0700)]
ARMV7: OMAP3: Update Beagle xM pinmux with USB hub and DVI gpio setup
This patch adds missing pinmux setup for 4 GPIO signals used on the Beagle xM:
- USB hub reset (gpio_56)
- P8 USB hub reset (gpio_63)
- DVI enable (gpio_129)
- P8 DVI enable (gpio_170)
Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Thomas Weber [Tue, 28 Sep 2010 06:06:25 +0000 (08:06 +0200)]
README: Fix description of version numbering scheme
The version numbering scheme was changed in Oct, 2008.
This patch brings the documentation to the actual level.
The description is taken from:
http://www.denx.de/wiki/U-Boot/ReleaseCycle
Signed-off-by: Thomas Weber <weber@corscience.de>
Changed text slightly. Signed-off-by: Wolfgang Denk <wd@denx.de>
Timur Tabi [Thu, 16 Sep 2010 21:35:44 +0000 (16:35 -0500)]
p1022ds: use weak CFI flash accessors when DIU is enabled
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed. So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash. This has a significant performance penalty, but it's
the only way to make it work.
This change allows the 'saveenv' command to work when the video display is
enabled. Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not. Also, while
flash is being written, the video display will be blank.
Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.
Kim Phillips [Wed, 22 Sep 2010 20:31:01 +0000 (15:31 -0500)]
mpc83xx: fix pcie build warning
Configuring for MPC8308RDB board...
pcie.c: In function 'mpc83xx_pcie_register_hose':
pcie.c:143: warning: assignment makes pointer from integer without a cast
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch provides support for MPC8308 P1M board with the following
set of features:
Dual UART is supported
NOR flash is supported
Both TSEC Ethernet controllers are supported
PCI Express initialization is supported
Both I2C controllers are supported
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
- Removed unused PCIE2 definitions from configuration
- SICR{L,H} defines used for System I/O Configuration Registers values
instead of hardcoding
- CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
writing to SCCR from the board code
- sleep mode stuff removed as MPC8308 has no support for deep sleep and
PMCCR1 register. board_early_init_f() removed.
- MPC8308 has no ERRATA for DDR controller so workaround removed
- 'assignment in if statement' issues solved
- use LBLAWAR_* defines instead of hardcoding
Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Ira W. Snyder [Fri, 10 Sep 2010 22:42:32 +0000 (15:42 -0700)]
e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels
Newer Linux kernels can overrun the initial memory window used for
booting with their BSS area. When this happens, they overwrite the FDT
and silently fail to boot.
On e300 CPUs, the Linux kernel uses an initial BAT covering the first
256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
allowed by Linux. This will allow very large kernels to boot.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Scott Wood [Mon, 30 Aug 2010 23:04:52 +0000 (18:04 -0500)]
mpc831xerdb: enable mtdparts for NAND
The default partition table matches the .dts files for these boards in
Linux. This allows these partitions to be used by name with U-Boot's
"nand" command.
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Stefan Roese [Fri, 3 Sep 2010 11:27:02 +0000 (13:27 +0200)]
ppc4xx: Cleanup of PVR detection code in cpu.c
This patch cleans the PVR detection code in check_cpu() up a bit.
Basically the strings are better seperated, resulting in an easier
to understand and maintain code version.
The #ifdef's couldn't be removed easily because of two reasons:
- Some SoC revisions have the same PVR, so need a way to differentiate
between those two SoC's.
- In some case statements registers only available in this SoC variant
are referenced.
Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't
add this 440 detection code and vice versa. Resulting in this U-Boot
image size change:
405EX (Kilauea): 408 bytes less
440EPx (Sequoia): 604 bytes less
460EX (Canyonlands): 564 bytes less
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese [Wed, 15 Sep 2010 07:33:25 +0000 (09:33 +0200)]
Remove unused CONFIG_SERIAL_SOFTWARE_FIFO feature
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
Stefan Roese [Tue, 21 Sep 2010 08:24:36 +0000 (10:24 +0200)]
ppc4xx: Remove now unused CONFIG_UART1_CONSOLE
CONFIG_UART1_CONSOLE was a PPC4xx specific implementation and is now
removed since the move from the 4xx UART driver to the common NS16550
UART driver. Let's remove all references to this define now.
Stefan Roese [Sun, 12 Sep 2010 04:21:37 +0000 (06:21 +0200)]
ppc4xx: Big header cleanup part 2, mostly PPC405 related
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.
Stefan Roese [Sat, 11 Sep 2010 07:31:43 +0000 (09:31 +0200)]
ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.
Stefan Roese [Thu, 9 Sep 2010 17:18:00 +0000 (19:18 +0200)]
ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.
Stefan Roese [Thu, 16 Sep 2010 12:01:53 +0000 (14:01 +0200)]
ppc4xx/fdt/flash: Change fdt_fixup_nor_flash_node() to not rely on cs size
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.
For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.
The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Detlev Zundel <dzu@denx.de> Cc: Gerald Van Baren <vanbaren@cideas.com> Cc: Wolfgang Denk <wd@denx.de>
Stefan Roese [Tue, 14 Sep 2010 07:38:18 +0000 (09:38 +0200)]
ppc4xx: POST UART: Use in/out_8() io-accessor functions
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.
Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.
And some common code is factored out for better maintainability.
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