Joakim Tjernlund [Thu, 19 Nov 2009 12:44:16 +0000 (13:44 +0100)]
crc32: Impl. linux optimized crc32()
Ported over the more efficient linux crc32() function.
A quick comparsion on ppc:
After changing the old crc32 to do 4 bytes in the
inner loop to be able to compare with new version one can note:
- old inner loop has 61 insn, new has 19 insn.
- new crc32 does one 32 bit load of data to crc while
the old does four 8 bits loads.
- size is bit bigger for the new crc32:
1392(old) 1416(new) of text. The is because the new version
shares code with crc32_no_comp() instead of duplicating code.
- about 33% faster on ppc:
New > crc 0 0xfffffff -> 39 secs
Old > crc 0 0xfffffff -> 60 secs
Scott Wood [Thu, 5 Nov 2009 00:41:41 +0000 (18:41 -0600)]
makefiles: fixes for building build tools
Currently, some of the tools instead set CC to be HOSTCC in order to re-use
some pattern rules -- but this fails when the user overrides CC on the make
command line. Also, the HOSTCFLAGS in tools/Makefile are currently not
being used because config.mk overwrites them.
This patch adds static pattern rules for files that have been requested to
be built with the native compiler using $(HOSTSRCS) and $(HOSTOBJS), and
converts the tools to use them.
It restores easylogo to using the host compiler, which was broken by commit 38d299c2db81bd889c601b5dfc12c4e83ef83333 (if this was an intentional change,
please let me know -- but it seems to be a build tool).
It restores -pedantic and the special flags for darwin and cygwin that were
requested in tools/makefile (but keeps the flags added by config.mk) --
hopefully someone can test this on those platforms. It no longer
conditionalizes -pedantic on not being darwin; it wasn't clear that that was
intentional, and unless there's a real problem it's just inviting people to
contribute non-pedantic patches to those files (I'm not a fan of -pedantic
personally, but if it's on for one platform it should be on for all).
HOST_LDFLAGS is renamed HOSTLDFLAGS for consistency with the previous
HOST_CFLAGS to HOSTCFLAGS rename. A new HOSTCFLAGS_NOPED is made available
for those files which currently cannot be built with -pedantic, and replaces
the old FIT_CFLAGS.
imls now uses the cross compiler properly, rather than by trying to
reconstruct CC using the typoed $(CROSS_COMPILER).
envcrc.c is now dependency-processed unconditionally -- previously it would
be built without being on (HOST)SRCS if CONFIG_ENV_IS_EMBEDDED was not
selected.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Mike Frysinger [Wed, 4 Nov 2009 21:34:42 +0000 (16:34 -0500)]
exports: rewrite jump table init
The current jump table init fails to initialize a bunch of exported
symbols (forceenv/do_reset/etc...). Rather than fix just these few
missing pieces, rewrite the code to utilize the existing list of
exported symbols -- _exports.h. Since every exported symbol has to
be listed in this header, it makes sense to use it so that we only
ever have one list that needs to be updated and things can't fall
out of sync again.
Po-Yu Chuang [Wed, 11 Nov 2009 09:27:30 +0000 (17:27 +0800)]
arm: A320: Add support for Faraday A320 evaluation board
This patch adds support for A320 evaluation board from Faraday. This board
uses FA526 processor by default and has 512kB and 32MB NOR flash, 64M RAM.
FA526 is an ARMv4 processor and uses the ARM920T source in this patch.
Nishanth Menon [Mon, 9 Nov 2009 14:29:34 +0000 (09:29 -0500)]
OMAP3: Fix SDRC init
Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits
Nishanth Menon [Sat, 7 Nov 2009 15:51:24 +0000 (10:51 -0500)]
OMAP3:SDRC: introduce DDR types
Micron DDR timings based on:
http://www.sakoman.net/cgi-bin/gitweb.cgi?p=x-load-omap3.git;a=blob;f=include/asm/arch-omap3/mem.h;h=e6fbfe3947f5d0d85fea776e30821d4017316d86;hb=HEAD
Introduce Micron DDR timings and provide
CONFIG_OMAP3_INFINEON_DDR and CONFIG_OMAP3_MICRON_DDR config
options to allow for platform files to setup their timings as
per the type of DDR selected
Reported-by: Steve Sakoman in http://www.nabble.com/forum/Permalink.jtp?root=25779518&post=25959734&page=y Signed-off-by: Nishanth Menon <nm@ti.com>
Nick Thompson [Thu, 12 Nov 2009 16:03:23 +0000 (11:03 -0500)]
TI Davinci: add a pin multiplexer configuration API
Creates a method allowing pin settings to be logically grouped into data
structure arrays and provides an API to configure the pinmux settings to
enable the relevant pin functions.
Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
OMAP3: pandora: fix booting without serial attached
When the board is booted without serial cable attached (which
is how most of them will be used) UART RX is left floating and
sometimes picks noise, which interrupts countdown and enters
U-Boot prompt instead of booting the kernel.
Fix this by setting up internal pullup on UART RX pin. This
does not prevent serial from working as the internal pullup
is weak.
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Seunghyeon Rhee [Fri, 13 Nov 2009 07:49:41 +0000 (16:49 +0900)]
S3C6400/SMDK6400: fix stack_setup in start.S
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.
The definition of this macro is also removed because it's not
referenced elsewhere.
Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com> Tested-by: Minkyu Kang <mk7.kang@samsung.com>
s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.
s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Move s3c24x0 header files to asm-arm/arch-s3c24x0/
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.
checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:
ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch
As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.
The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:
WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8 S3C24X0_REG8;
+typedef volatile u16 S3C24X0_REG16;
+typedef volatile u32 S3C24X0_REG32;
I'll fix these errors in another patch.
Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.
Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Mark Asselstine [Tue, 27 Oct 2009 14:10:40 +0000 (19:40 +0530)]
sheevaplug: correct SDRAM address control register
value
The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in
two banks for a total of 512MB of RAM. Based on this configuration
the existing values for SDRAM address control register are incorrect
and result in random kernel oops as memory is incorrectly accessed
(while for example extracting a large tarball such as a rootfs).
Based on the hardware configuration along with the supporting
documentation from Marvell these are the correct values, as
well this change mimics values previously used in Marvell's own
u-boot git tree for the SheevaPlug.
Other variants of the hardware such as the PogoPlug and TonidoPlug
may have different memory configurations but to properly support
those additional board directories should be maintained or a better
system to support other kwb*.cfg is needed.
Tested on SheevaPlug DevKit.
Signed-off-by: Mark Asselstine <mark.asselstine@windriver.com>
Stefan Roese [Thu, 19 Nov 2009 13:03:17 +0000 (14:03 +0100)]
ppc4xx: Cleanup PPC4xx I2C infrastructure
This patch cleans up the PPC4xx I2C intrastructure:
- Use C struct to describe the I2C registers instead of defines
- Coding style cleanup (braces, whitespace, comments, line length)
- Extract common code from i2c_read() and i2c_write()
- Remove unneeded IIC defines from ppc405.h & ppc440.h
at91: Extended soft_i2c driver for AT91SAM9263 SoC
While hard_i2c support is not available
(see http://lists.denx.de/pipermail/u-boot/2009-March/049751.html),
this patch enables soft_i2c on AT91SAM9263 SoC.
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Sandeep Paulraj [Fri, 20 Nov 2009 04:04:42 +0000 (23:04 -0500)]
NAND: Add Support for 4K page size in DaVinci NAND driver
This patch adds support for NAND devices with a page size of
4K in the DaVinci NAND driver. The layout matches the layout that TI uses
for 4K page size NAND devices in the kernel NAND driver.
Stefan Roese [Tue, 17 Nov 2009 14:53:00 +0000 (15:53 +0100)]
ppc4xx: alpr: Remove some not needed commands to make image fit again
The latest changes in the u-boot/next branch increased the size of the
alpr image a bit more. Now it doesn't fit into the 256k reserved for it.
This patch now removes the commands "askenv" and "irq" which are not
needed in the production systems.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Stefan Roese [Thu, 12 Nov 2009 16:19:37 +0000 (17:19 +0100)]
ppc4xx: Consolidate pci_master_init() function
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.
Stefan Roese [Thu, 12 Nov 2009 15:41:09 +0000 (16:41 +0100)]
ppc4xx: Consolidate pci_pre_init() function
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.
Stefan Roese [Thu, 12 Nov 2009 11:00:49 +0000 (12:00 +0100)]
ppc4xx: Consolidate pci_target_init() function
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Hui.Tang [Wed, 18 Nov 2009 08:24:04 +0000 (16:24 +0800)]
S3C2410 NAND Flash Add Missing Function
This patch add nand_read_buf() for S3C2410 NAND SPL.
In nand_spl/nand_boot.c, nand_boot() will check nand->select_chip,
so nand->select_chip should also be initialized.
Sandeep Paulraj [Mon, 16 Nov 2009 18:31:47 +0000 (13:31 -0500)]
NAND:Extending the nand_ecclayout structure
NANDs with page size of lesser than and equal to 2K are
reaching EOL. They are bing replaced with NANDs of
page size 4K and above.
To support this we have to extend the eccpos field
Dirk Behme [Mon, 2 Nov 2009 19:36:26 +0000 (20:36 +0100)]
OMAP2/3: I2C: Add support for second and third bus
Add support to use second and third I2C bus, too.
Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing
I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch
back afterwards, then.
David Brownell [Sat, 7 Nov 2009 21:27:01 +0000 (16:27 -0500)]
NAND: fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
Where OOBx is (prepad, ECC, postpad). However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB. Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.
The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.
Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Sandeep Paulraj [Sat, 7 Nov 2009 19:25:18 +0000 (14:25 -0500)]
NAND: Don't walk past end of oobfree[]
When computing oobavail from the list of free areas in the OOB,
don't assume there will always be an unused slot at the end.
This syncs up with the kernel NAND driver.
Sandeep Paulraj [Sat, 7 Nov 2009 19:25:03 +0000 (14:25 -0500)]
NAND: Update check condition for nand_read_page_hwecc API
The patch updates the check condition for determining
whether the ECC corrections has failed.
This makes it similar to what is in the kernel NAND driver.
Sandeep Paulraj [Sat, 7 Nov 2009 19:24:34 +0000 (14:24 -0500)]
NAND: Subpage shift for ecc_steps equal to 16
This was originally part of Thomas Gleixner's patch for
adding support for 4KiB pages.
This is not part of the U-Boot NAND driver so updating the
driver with this to sync up with the kernel NAND driver.
Kumar Gala [Fri, 13 Nov 2009 14:52:21 +0000 (08:52 -0600)]
ppc/85xx: Fix how we determine the number of CAM entries
We were incorrectly use the max CAM size as the number of entries in
the array for setting up the addrmap. We should be using the NENTRY
field which is the low 12-bits of TLB1CFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Mike Frysinger [Fri, 13 Nov 2009 03:26:02 +0000 (22:26 -0500)]
smc911x_eeprom: fix building after smc911x overhaul
When the smc911x driver was converted to NET_MULTI, the smc911x eeprom was
missed. The config option needed updating as well as overhauling of the
rergister read/write functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
javier Martin [Thu, 29 Oct 2009 07:22:43 +0000 (08:22 +0100)]
mxc_fec: avoid free() calls to already freed pointers.
Sometimes, inside NetLoop, eth_halt() is called before eth_init() has
been called. This is harmless except for free() calls to pointers
which have not been allocated yet.
This patch initializes those pointers to NULL and allocates them only
the first time. This way we can get rid of free calls in halt callback.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
javier Martin [Thu, 29 Oct 2009 07:18:34 +0000 (08:18 +0100)]
mxc_fec: fix some erroneous PHY accesses.
This patch fixes erroneous access to the ethernet PHY which broke the driver.
1. Selector field in the auto-negotiation register must be 0x00001 for
using 802.3, not 0x00000 which is reseved.
2. Access to the PHY address specified by CONFIG_FEC_MXC_PHYADDR, not
0x0 fixed address.
This has been tested in i.MX27 Litekit board and eldk-4.2 toolchains.
Now using proper defines for auto-negotiation register.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Mon, 9 Nov 2009 13:13:43 +0000 (14:13 +0100)]
ppc4xx: Switch to I2C bus numer 0 for chip_config command
All currently available 4xx derivats have the I2C bootstrap EEPROM
located on I2C bus number 0. This patch now first sets this bus number,
so that the chip_config command also works for board with multiple
I2C busses, like Katmai.
Ben Warren [Mon, 9 Nov 2009 22:01:08 +0000 (14:01 -0800)]
SMC91111: Clean up SMC_inx macros on xsengine and xaeniax
This patch fixes the following warnings:
Configuring for xaeniax board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - in operand of &
smc91111_eeprom.c:281: warning: suggest parentheses around + or - in operand of &
...
Configuring for xsengine board...
smc91111_eeprom.c: In function 'print_macaddr':
smc91111_eeprom.c:278: warning: suggest parentheses around + or - inside shift
smc91111_eeprom.c:281: warning: suggest parentheses around + or - inside shift
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Ben Warren [Mon, 9 Nov 2009 19:43:18 +0000 (11:43 -0800)]
Fix CS8900 regression on impa7 board
The following error was seen on impa7 board, due to its use of a 32-bit bus
on CS8900.
cs8900.c:137:37: error: macro "get_reg_init_bus" passed 2 arguments, but takes just 1
This patch gives the macro the correct number of arguments
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stefan Roese [Thu, 29 Oct 2009 17:37:45 +0000 (18:37 +0100)]
ppc4xx: Canyonlands: Change EBC bus config to drive always (no high-z)
This patch fixes a problem only seen very occasionally on Canyonlands.
The NOR flash interface (CFI driver) doesn't work reliably in all cases.
Erasing and/or programming sometimes doesn't work. Sometimes with
an error message, like "flash not erased" when trying to program an
area that should have just been erased. And sometimes without any error
messages. As mentioned above, this problem was only seen rarely and with
some PLL configuration (CPU speed, EBC speed).
Now I spotted this problem a few times, when running my Canyonlands with
the following setup (chip_config):
1000-nor - NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100
Changing the EBC configuration to not release the bus into high
impedance state inbetween the transfers (ATC, DTC and CTC bits set to 1
in EBC0_CFG) seems to fix this problem. I haven't seen any failure
anymore with this patch applied.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: David Mitchell <dmitchell@amcc.com> Cc: Jeff Mann <MannJ@embeddedplanet.com>
Stefan Roese [Thu, 29 Oct 2009 15:54:52 +0000 (16:54 +0100)]
ppc4xx: Remove duplicated is_pci_host() functions
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.
Stefan Roese [Thu, 29 Oct 2009 14:04:35 +0000 (15:04 +0100)]
ppc4xx: Consolidate 4xx PCIe board specific configuration
This patch consolidates the PPC4xx board specific PCIe configuration
code. This way the duplicated code is removed. Boards can implement a
special, non standard behaviour (e.g. number of PCIe slots, etc) by
overriding the weak default functions.
Remy Bohmer [Thu, 29 Oct 2009 11:29:37 +0000 (12:29 +0100)]
ARM: Use Linux version for unaligned access code
The asm-arm/unaligned.h includes linux/unaligned/access_ok.h
This file is unsafe to be used on ARM, since it does an unaligned memory
accesses which fails on ARM.
Lookin at Linux the basic difference seems to be the header
"include/asm-arm/unaligned.h". The Linux version of "unaligned.h"
does *not* include "access_ok.h" at all. It includes "le_byteshift.h"
and "be_byteshift.h" instead.
Kumar Gala [Thu, 5 Nov 2009 00:02:10 +0000 (18:02 -0600)]
ppc/85xx: Fix inclusion of 83xx immap in 85xx builds
The nand_boot_fsl_elbc.c is shared between 83xx & 85xx however we should
not be including the immap_83xx.h when building 85xx. We can just get
this all from common.h
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Ed Swarthout [Mon, 2 Nov 2009 15:05:49 +0000 (09:05 -0600)]
fsl_pci_init_port end-point initialization is broken
commit 70ed869e broke fsl pcie end-point initialization.
Returning 0 is not correct. The function must return the first free
bus number for the next controller.
fsl_pci_init() must still be called and a bus allocated even if the
controller is an end-point.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There isn't any need to modify the API for fsl_pci_init_port to pass the
status of host/agent(end-point) status. We can determine that
internally to fsl_pci_init_port. Revert the patch that makes the API
change.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
projects / u-boot / log