This patch prevents linker error on AT91RM9200 boards, if
CONFIG_CMD_I2_TREE is set.
It implements i2c_set_bus_speed and i2c_get_bus_speed as a dummy function.
Andrew Dyer [Fri, 12 Sep 2008 00:20:46 +0000 (02:20 +0200)]
arm920t fix constant error in start.S
Code in cpu/arm920t/start.S will die with a compilation error if
CONFIG_STACKSIZE + CFG_MALLOC_LEN works out to an invalid constant for
the ARM sub instruction. Change the code so that each is subtracted
independently to avoid the error.
Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
Magnus Lilja [Fri, 29 Aug 2008 08:36:18 +0000 (10:36 +0200)]
i.MX31: Make the SPI bus and chip select configurable for MC13783
The i.MX31 has three SPI buses and each bus has several chip selects
and the MC13783 chip can be connected to any of these. The current
RTC driver for MC13783 is hardcoded for CSPI2/SS2.
This patch makes make MC13783 SPI bus and chip select configurable
via CONFIG_MC13783_SPI_BUS and CONFIG_MC13783_SPI_CS.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Magnus Lilja [Fri, 29 Aug 2008 08:36:17 +0000 (10:36 +0200)]
i.MX31: Add reset_timer() and modify get_timer_masked().
This patch adds the reset_timer() function (needed by nand_base.c) and
modifies the get_timer_masked() to work in the same way as the omap24xx
function.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Petri Lehtinen [Wed, 10 Sep 2008 06:43:49 +0000 (09:43 +0300)]
autoscr: Fix one-character lines and non-newline terminated scripts
When not using hush, the autoscr command now executes lines that are
only one character long. It also runs the last line of scripts even if
it does not end in a newline.
Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi>
Andrew Klossner [Thu, 21 Aug 2008 14:12:26 +0000 (07:12 -0700)]
Fix printf errors under -DDEBUG
Fix printf format-string/arg mismatches under -DDEBUG.
These warnings occur with DEBUG defined for a platform using
cpu/mpc85xx. Users of other architectures can unearth similar
problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
after "CFLAGS += $(call cc-option,-fno-stack-protector)".
Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Remy Bohmer [Wed, 20 Aug 2008 09:22:02 +0000 (11:22 +0200)]
Make usb-stop() safe to call multiple times in a row.
A recent commit (936897d4d1365452bbbdf8430db5e7769ef08d38)
enabled the usb_stop() command in common/cmd_bootm.c which was
not enabled for some time, because no board did actually set the
CFG_CMD_USB flag. So, now the usb_stop() is executed before
loading the linux kernel.
However, the usb_ohci driver hangs up (at least on AT91SAM) if the
driver is stopped twice (e.g. the peripheral clock is stopped on AT91).
If some other piece of code calls usb_stop() before the bootm command,
this command will hangup the system during boot.
(usb start and stop is typically used while booting from usb memory stick)
But, stopping the usb stack twice is useless anyway, and a flag already
existed that kept track on the usb_init()/usb_stop() calls.
So, we now check if the usb stack is really started before we stop it.
This problem is now fixed in both the upper as low-level layer.
Signed-off-by: Remy Bohmer <linux@bohmer.net> Acked-by: Markus Klotzbuecher <mk@denx.de>
FIT: add ability to check hashes of all images in FIT, improve output
- add function fit_all_image_check_hashes() that verifies if all
hashes of all images in the FIT are valid
- improve output of fit_image_check_hashes() when the hash check fails
Wolfgang Denk [Tue, 9 Sep 2008 13:45:18 +0000 (15:45 +0200)]
Makefile: compile and link each module just once
Several source files need to be compiled and linked when one or more
config options are selected. To allow for easy selection in the
Makefiles yet to avoild multiple compilation (which costs build time)
and especially multiple linking (which causes errors), we use
"COBJS = $(sort COBJS-y)" which eliminates duplicates.
By courtesy of Detlev Zundel who suggested this approach.
SREC files do not need gap fill: The load address is specified in the
file. On the other hand, it can't be avoided in a .bin object. It has
no information about memory location.
Add support for environment in NAND with automatic NOR / NAND recognition,
including unaligned environment, bad-block skipping, redundant environment
copy.
This patch adds Lime GDC support together with support for the PWM
backlight control through the w83782d chip. The reset pin of the
latter is attached to GPIO, so we need to reset it in
early_board_init_r.
Timur Tabi [Fri, 18 Jul 2008 14:52:23 +0000 (16:52 +0200)]
Update Freescale 85xx boards to sys_eeprom.c
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
This patch adds Lime GDC support together with support for the PWM
backlight control through the w83782d chip. The reset pin of the
latter is attached to GPIO, so we need to reset it in
early_board_init_r.
Sergei Poselenov [Thu, 14 Aug 2008 12:08:28 +0000 (14:08 +0200)]
ARM: fix warning: target CPU does not support interworking
This patch fixes warnings like this:
start.S:0: warning: target CPU does not support interworking
which come from some ARM cross compilers and are caused by hard-coded
(with "--with-cpu=arm9" configuration option) ARM targets (which
support ARM Thumb instructions), while the ARM target selected from
the command line (with "-march=armv4") doesn't support Thumb
instructions.
This warning is issued by the compiler regardless of the real use of
the Thumb instructions in code.
To fix this problem, we use options according to compiler version
being used.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
Timur Tabi [Fri, 18 Jul 2008 14:52:23 +0000 (16:52 +0200)]
Update Freescale 85xx boards to sys_eeprom.c
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c. Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well. cds_eeprom.c is deleted.
Stefan Roese [Mon, 8 Sep 2008 08:01:48 +0000 (10:01 +0200)]
ppc4xx: Remove CONFIG_CS8952_PHY define
Since this define is only used on one board that was never really in
production, removing this compile time option doesn't hurt and makes
the code more readable.
Stefan Roese [Fri, 5 Sep 2008 12:11:40 +0000 (14:11 +0200)]
ppc4xx: Fix compilation warning for PIP405
This patch fixes a compilation warning for the PIP405 board. It moves the
#ifndef CONFIG_CS8952_PHY define a little so that the warning doesn't
occur anymore. I am a little unsure if this #ifdef is at the correct
place now or if it could be removed completely. This needs to get
tested on the PIP405 board.
Kumar Gala [Fri, 5 Sep 2008 19:40:29 +0000 (14:40 -0500)]
Fix compiler warning in mpc8xxx ddr code
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:523: warning: 'caslat' may be used uninitialized in this function
ctrl_regs.c:523: note: 'caslat' was declared here
Add a warning in DDR1 case if cas_latency isn't a value we know about.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Kumar Gala [Sat, 30 Aug 2008 00:08:29 +0000 (19:08 -0500)]
Prevent crash if random/invalid ramdisks are passed to bootm
Adds returning an error from the ramdisk detection code if
its not a real ramdisk (invalid). There is no reason we can't
just return back to the console if we detect an invalid
ramdisk or CRC error.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Prevent crash if random DTB address is passed to bootm
This patch adds bootm_start() return value check. If
error status is returned, we do not proceed further to
prevent board reset or crash as we still can recover
at this point.
Some of multi-function USB controllers (e.g. ISP1562) allow root hub
resetting only via EHCI registers. So, this patch adds the
corresponding kind of reset to OHCI's hc_reset() if the newly
introduced CONFIG_PCI_EHCI_DEVNO option is set (e.g. for Socrates
board).
Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Acked-by: Markus Klotzbuecher <mk@denx.de>
Stefan Roese [Fri, 5 Sep 2008 08:47:46 +0000 (10:47 +0200)]
devices: Use list_add_tail() instead of list_add() to register a device
This patch fixes a problem spotted on Glacier/Canyonlands (and most
likely lots of other board ports), that no serial output was seen
after console initialization in console_init_r(). This is because the
last added console device was used instead of the first added.
This patch fixes this problem by using list_add_tail() instead of
list_add() to register a device. This way the first added console
is used again.
Adam Graham [Wed, 3 Sep 2008 19:26:28 +0000 (12:26 -0700)]
ppc4xx: IBM Memory Controller DDR autocalibration routines
Alternate SDRAM DDR autocalibration routine that can be generically used
for any PPC4xx chips that have the IBM SDRAM Controller core allowing for
support of more DIMM/memory chip vendors and gets the DDR autocalibration
values which give the best read latency performance (SDRAM0_RDCC.[RDSS]).
Two alternate SDRAM DDR autocalibration algoritm are provided in this patch,
"Method_A" and "Method_B". DDR autocalibration Method_A scans the full range
of possible PPC4xx SDRAM Controller DDR autocalibration values and takes a
lot longer to run than Method_B. Method_B executes in the same amount of time
as the currently existing DDR autocalibration routine, i.e. 1 second or so.
Normally Method_B is used and it is set as the default method.
The current U-Boot PPC4xx DDR autocalibration code calibrates the IBM SDRAM
Controller registers.[bit-field]:
1) SDRAM0_RQDC.[RQFD]
2) SDRAM0_RFDC.[RFFD]
This alternate PPC4xx DDR autocalibration code calibrates the following
IBM SDRAM Controller registers.[bit-field]:
and will also use the calibrated settings of the above four registers that
produce the best "Read Sample Cycle Select" value in the SDRAM0_RDCC.[RDSS]
register.[bit-field].
Signed-off-by: Adam Graham <agraham@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
projects / u-boot / log