Bin Meng [Wed, 11 May 2016 14:44:57 +0000 (07:44 -0700)]
x86: Fix up PIRQ routing table checksum earlier
PIRQ routing table checksum is fixed up in copy_pirq_routing_table(),
which is fine if we only write the configuration table once. But with
the SeaBIOS case, when we write the table for the second time, the
checksum will be fixed up to zero per the checksum algorithm, which
is caused by the checksum field not being zero before fix up, since
the checksum has already been calculated in the first run.
To fix this, move the checksum fixup to create_pirq_routing_table(),
so that copy_pirq_routing_table() only does what its function name
suggests: copy the table to somewhere else.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 11 May 2016 14:44:56 +0000 (07:44 -0700)]
x86: Call board_final_cleanup() in last_stage_init()
At present board_final_cleanup() is called before booting a Linux
kernel. This actually needs to be done before booting anything,
like SeaBIOS, VxWorks or Windows.
Move the call to last_stage_init() instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 11 May 2016 14:44:55 +0000 (07:44 -0700)]
x86: minnowmax: Adjust U-Boot environment address in SPI flash
Currently U-Boot environment address is at offset 0x7fe00 of a 8MB
SPI flash. When creating a partial u-boot.rom image without flash
descriptor and ME firmware, U-Boot actually occupies the last 1MB
of the flash, and reprograming U-Boot causes previous environment
settings get lost which is not convenient during testing.
Adjust the environment address to 0x6ef000 instead (before the MRC
cache data region in the flash).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Miao Yan [Mon, 23 May 2016 02:37:19 +0000 (19:37 -0700)]
cmd: qfw: do not depend on x86
The qfw command interface used to depend on X86, this patch removes
this restriction so it can be built for sandbox for testing. For normal
usage, it can only be used with CONFIG_QEMU.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Miao Yan [Mon, 23 May 2016 02:37:18 +0000 (19:37 -0700)]
cmd: qfw: do not require default macros when building qfw command
The qfw command interface makes use of CONFIG_LOADADDR and
CONFIG_RAMDISKADDR to setup kernel. But not all boards have these macros,
which causes build problem on those platforms.
This patch fixes this issue.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Miao Yan [Mon, 23 May 2016 02:37:15 +0000 (19:37 -0700)]
x86: qemu: move x86 specific operations out of qfw core
The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.
This patch adds callback functions and moves those to arch/x86/
Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Miao Yan [Mon, 23 May 2016 02:37:12 +0000 (19:37 -0700)]
cmd: qfw: remove qemu_fwcfg_free_files()
This patch is part of the qfw refactor work.
The qemu_fwcfg_free_files() function is only used in error handling in
ACPI table generation, let's not make this a core function and move it
to the right place.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Miao Yan [Mon, 23 May 2016 02:37:10 +0000 (19:37 -0700)]
x86: qemu: fix ACPI Kconfig options
CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which
uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether
to load ACPI table from QEMU's fw_cfg interface.
But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop
our own ACPI implementation", there is only one way to support ACPI table
for QEMU targets which is the fw_cfg interface. Having two Kconfig options
for this purpose is not necessary any more, so this patch consolidates
the two.
Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 6 May 2016 14:40:22 +0000 (10:40 -0400)]
x86: qemu: Move qfw command over to cmd and add Kconfig entry
- Move the command portion of arch/x86/cpu/qemu/fw_cfg.c into
cmd/qemu_fw_cfg.c
- Move arch/x86/include/asm/fw_cfg.h to include/qemu_fw_cfg.h
- Rename ACPI table portion to arch/x86/cpu/qemu/acpi_table.c
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Sat, 7 May 2016 14:46:36 +0000 (07:46 -0700)]
x86: doc: Minor update for accuracy
This updates the doc for the following places:
- Mention CRB for Bayley Bay
- Mention Congatec QEVAL 2.0 & conga-QA3/E3845
- Limit part of the QEMU paragraphs to 80 cols
- Correct some typos (drive, it's, Ubuntu)
- Add description for "console=ttyS0,115200"
- Remove CONFIG_BOOTDELAY description which is already
in x86-common.h
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:35 +0000 (07:46 -0700)]
x86: Remove acpi=off boot parameter when ACPI is on
Remove the kernel boot parameter acpi=off so that kernel can turn on
ACPI support.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:34 +0000 (07:46 -0700)]
x86: baytrail: Add .gitignore for ACPI enabled boards
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:33 +0000 (07:46 -0700)]
x86: baytrail: Enable ACPI table generation for all boards
Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:29 +0000 (07:46 -0700)]
x86: acpi: Add some generic ASL libraries
This adds several generic ASL libraries that can be included by
other ASL files, which are:
- debug.asl: for debug output using POST I/O port and legacy serial port
- globutil.asl: for string compare routines
- statdef.asl: for _STA status values
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:28 +0000 (07:46 -0700)]
x86: acpi: Clean up table header revisions
The comment of initializing table header revision says:
/* ACPI 1.0/2.0: 1, ACPI 3.0: 2, ACPI 4.0: 3 */
which might mislead it may increase per ACPI spec revision.
However this is not the case. It's actually a fixed number
as defined in ACPI spec, and in the laest ACPI spec 6.1,
some table header revisions are still 1. Clean these up.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:27 +0000 (07:46 -0700)]
x86: acpi: Align FACS table to a 64 byte boundary
Per ACPI spec, the FACS table address must be aligned to a 64 byte
boundary (Windows checks this, but Linux does not).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:25 +0000 (07:46 -0700)]
x86: acpi: Adjust order in acpi_table.c
Rearrange the routine order a little bit, to follow the order
in which ACPI table is defined in acpi_table.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:24 +0000 (07:46 -0700)]
x86: acpi: Change fill_header()
Rename fill_header() to acpi_fill_header() for consistency.
Change its signature to remove the 'length' parameter and
make it a public API.
Also remove the unnecessary include files, and improve the
AmlCode[] comment a little bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:23 +0000 (07:46 -0700)]
x86: acpi: Remove acpi_create_ssdt_generator()
This acpi_create_ssdt_generator() currently does nothing.
Remove this for now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:22 +0000 (07:46 -0700)]
x86: acpi: Reorder code in acpi_table.h
Reorder the ACPI tables appearance by following the order:
RSDP, RSDT, XSDT, FADT, FACS, MADT, MCFG. And adjust the
table flag defines accordingly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:21 +0000 (07:46 -0700)]
x86: acpi: Various changes to acpi_table.h
- Use "U-BOOT" and "U-BOOTBL" for the OEM ID and OEM table ID.
- Do not typedef acpi_header_t, instead use struct acpi_table_hader.
- Use a shorter name aslc_id and aslc-revision.
- Change MCFG base address to use 32-bit value pairs (_l and _h).
- Apply ACPI_APIC_ prefix to MADT APIC type macros and make
their names to be more readable.
- Apply __packed to struct acpi_madt_irqoverride and struct
acpi_madt_lapic_nmi tables, as they are not naturally aligned
by the compiler which leads to wrong sizeof(struct).
- Rename model to res1 as it is reserved after ACPI spec 1.0.
- Apply ACPI_ prefix to the PM profile macros and change them
to enum.
- Add ospm_flags to FACS structure which is defined since ACPI 4.0.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:20 +0000 (07:46 -0700)]
x86: acpi: Remove unused codes
- Remove #include <> header files.
- Remove APM_CNT register defines, which should not be here as
they are SMI related.
- Remove MP_IRQ_ defines as they are duplicates of the same ones
in asm/mpspec.h.
- Remove ACTL register defines, which should not be here as they
are chipset specific.
- Remove functional fixed hardware defines, which are not used.
- Remove dev_scope related defines, which are not used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:19 +0000 (07:46 -0700)]
acpi: Output all errors/warnings/remarks when compiling ASL
Remove -va option when invoking IASL compiler so that we can see
errors/warnings/remarks in the build log.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:18 +0000 (07:46 -0700)]
acpi: Specify U-Boot include path for ASL files
It will be much easier if we split the whole dsdt.asl file into
multiple smaller ASL parts and have access to U-Boot include files.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:17 +0000 (07:46 -0700)]
acpi: Explicitly spell out dsdt.c in the make rule
Currently the make rule for dsdt.c uses a wildcard, as below:
$(obj)/%.c: $(src)/%.asl
To avoid any side effect, explicitly mention dsdt.c as this is
the file we intend to use for ACPI DSDT AML generation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:16 +0000 (07:46 -0700)]
acpi: Change build log for ASL files
Currently when compiling U-Boot with ASL file, the build log says:
ASL board/intel/bayleybay/dsdt.c
This looks odd as ASL compiler's input is ASL file, not C file.
Change the make rule to use $< instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:15 +0000 (07:46 -0700)]
x86: dts: Update to include ACTL register details
This updates all x86 boards that currently have IRQ router in the
dts files to include ACTL register details.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:14 +0000 (07:46 -0700)]
x86: irq: Enable SCI on IRQ9
By default SCI is disabled after power on. ACTL is the register to
enable SCI and route it to PIC/APIC. To support both ACPI in PIC
mode and APIC mode, configure SCI to use IRQ9.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
Bin Meng [Sat, 7 May 2016 14:46:13 +0000 (07:46 -0700)]
x86: irq: Reserve IRQ9 for ACPI in PIC mode
Reserve IRQ9 which is to be used as SCI interrupt number
for ACPI in PIC mode.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:12 +0000 (07:46 -0700)]
x86: acpi: Fix compiler warnings in write_acpi_tables()
Fix the following two build warnings in function 'write_acpi_tables':
warning: format '%lx' expects argument of type 'long unsigned int',
but argument 2 has type 'u32' [-Wformat=]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:11 +0000 (07:46 -0700)]
x86: Fix build warning in tables.c when CONFIG_SEABIOS
The following build warning is seen in tables.c:
warning: implicit declaration of function 'memalign'
Add the missing header file to fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 7 May 2016 14:46:10 +0000 (07:46 -0700)]
x86: Drop asm/acpi.h
Remove asm/acpi.h which is never used.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Merge the parsing of layout aware and layout unaware eeprom commands into
one parsing function. With this change, layout aware commands now follow
the eeprom read and eeprom write conventions of making i2c bus and i2c address
parameters optional.
Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
eeprom: use eeprom_execute_command for all eeprom functions
Update eeprom_execute_command() and related code to accommodate both layout
aware and layout unaware functions.
No functional changes.
Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Make eeprom_execute_command have ulong for i2c_addr] Signed-off-by: Tom Rini <trini@konsulko.com>
Paul Burton [Mon, 16 May 2016 09:52:14 +0000 (10:52 +0100)]
malta: Support MIPS32r6 configurations
Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6
CPUs. Allow building U-Boot for such systems by selecting
CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:13 +0000 (10:52 +0100)]
malta: Remove ".set mips32" directive
We always build for a mips32 or higher ISA, so this ".set mips32"
directive is redundant. Once MIPSr6 support is added it will become
harmful since some instruction encodings change & this directive will
cause the older encodings to be incorrectly emitted instead of the
appropriate ones for the build.
In preparation for supporting MIPSr6, remove this redundant directive.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:12 +0000 (10:52 +0100)]
MIPS: Support for targetting MIPSr6
Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way
that we currently select release 1 or release 2 targets. MIPSr6 is not
entirely backwards compatible with earlier releases of the architecture.
Some instructions are encoded differently, some are removed, some are
reused, so it is not practical to run U-Boot built for earlier revisions
on a MIPSr6 system. Update their Kconfig help text to reflect that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:11 +0000 (10:52 +0100)]
MIPS: Simplify CONFIG_SYS_CPU values
Rather than having the values for CONFIG_SYS_CPU depend upon each
architecture revision, have them depend upon the more general
CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the
architecture revisions.
This is done in preparation for adding MIPSr6 support, which would
otherwise need to introduce new cases here.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:10 +0000 (10:52 +0100)]
MIPS: Use unchecked immediate addition/subtraction
In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Marek Vasut [Fri, 6 May 2016 18:10:41 +0000 (20:10 +0200)]
mips: ath79: Add support for TPLink WDR4300
Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:40 +0000 (20:10 +0200)]
mips: ath79: Add AR934x support
Add support for the Atheros AR934x WiSoCs. This patchs adds complete
system init, including PLL and DRAM init, both of which happen from
full C environment, since the AR934x has proper SRAM.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:33 +0000 (20:10 +0200)]
mips: Add MIPS 74Kc tune
Add MIPS 74Kc tune Kconfig option.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
[added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Thu, 5 May 2016 18:14:00 +0000 (20:14 +0200)]
mips: Fix compiler warning in cpu.c
There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:
In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default]
int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
^
include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
PIC32 internal flash devices are parallel NOR flash divided into
number of banks to allow erase-programming in one while fetch and
execution continues on other. As the flash banks are memory mapped
stored code can be executed directly from flash (XIP), also there
is additional hardware logic to prefetch and cache contents to
improve execution performance. These flash can also be used to
store user data (like environment).
Flash erase and programming are handled by on-chip NVM controller.
Driver implemented driver model but MTD is not really support.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
flash: add device ID for Microchip PIC32 internal flash.
Microchip PIC32 has internal parallel flash (non-CFI compliant).
These flash devices do not support any identifier command so no
standard IDs. Added unique IDs to seperate these flash devices
from others supported by U-Boot.
Wills Wang [Wed, 16 Mar 2016 08:59:58 +0000 (16:59 +0800)]
drivers: spi: add spi support for QCA/Atheros ath79 SOCs
This patch add a compatible spi driver for ath79 series SOC.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:57 +0000 (16:59 +0800)]
drivers: serial: add serial driver for ar933x SOC
This patch add support for ar933x serial.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Wills Wang [Wed, 16 Mar 2016 08:59:56 +0000 (16:59 +0800)]
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:55 +0000 (16:59 +0800)]
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Introduce parse_i2c_bus_addr() to generalize the parsing of i2c bus number and
i2c device address. This is done in preparation for merging layout aware and
layout unaware command parsing into one function.
No functional changes.
Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
cmd: eeprom: add support for layout aware commands
Introduce the (optional) eeprom print and eeprom update commands.
These commands are eeprom layout aware:
* The eeprom print command prints the contents of the eeprom in a human
readable way (eeprom layout fields, and data formatted to be fit for human
consumption).
* The eeprom update command allows user to update eeprom fields by specifying
the field name, and providing the new data in a human readable format (same
format as displayed by the eeprom print command).
* Both commands can either auto detect the layout, or be told which layout to
use.
New CONFIG options:
CONFIG_CMD_EEPROM_LAYOUT - enables commands.
CONFIG_EEPROM_LAYOUT_HELP_STRING - tells user what layout names are supported
Feature API:
__weak int parse_layout_version(char *str)
- override to provide your own layout name parsing
__weak void __eeprom_layout_assign(struct eeprom_layout *layout, int layout_version);
- override to setup the layout metadata based on the version
__weak int eeprom_layout_detect(unsigned char *data)
- override to provide your own algorithm for detecting layout version
eeprom_field.c
- contains various printing and updating functions for common types of
eeprom fields. Can be used for defining custom layouts.
Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
cmd: eeprom: add bus switching support for all i2c drivers
The i2c_init function is always provided when CONFIG_SYS_I2C is
defined. No need to limit ourselves to just one supported I2C driver
(soft_i2c). Update the #ifdef conditions to support bus switching for
all I2C drivers.
Cc: Heiko Schocher <hs@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Marek Vasut [Sat, 30 Apr 2016 12:45:42 +0000 (14:45 +0200)]
arm: mvebu: a38x: Weed out floating point use
For reason unknown, recently, the DDR init code writers are really fond
of hiding some small floating point operating deep in their creations.
This patch removes one from the Marvell A38x code.
Instead of returning size of chip as float from ddr3_get_device_size()
in GiB units, return it as int in MiB units. Since this would interfere
with the huge switch code in ddr3_calc_mem_cs_size(), rework the code
to match the change.
Before this patch, the cs_mem_size variable could have these values:
( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 =
{ 0.000000, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000,
0.250000, 0.500000, 1.000000, 2.000000, 4.000000, }
The switch code checked for a subset of the resulting RAM sizes, which
is in range 128 MiB ... 2048 MiB.
With this patch, the cs_mem_size variable can have these values:
( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 =
{ 0, 64, 128, 256, 512, 1024, 2048, 4096 }
To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB
and 4096 MiB options.
Removing the floating point stuff also saves 1.5k from text segment:
clearfog : spl/u-boot-spl:all -1592 spl/u-boot-spl:text -1592
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
York Sun [Thu, 7 Apr 2016 16:56:48 +0000 (09:56 -0700)]
powerpc: Disable flush or invalidate dcache by range for some SoCs
Commit ac337168a unified functions to flush and invalidate dcache by
range. These two functions were no-op for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues when the dcache is flushed. While the root cause is under
investigation, disable these functions for affected SoCs so various
drivers can work.