In xhci_queue_command(), when the command is not 'reset endpoint',
'stop endpoint' or 'set TR dequeue pointer', endpoint ID should not
be encoded in the TRB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
Bin Meng [Wed, 19 Jul 2017 13:49:53 +0000 (21:49 +0800)]
usb: xhci: Remove incorrect comments for struct xhci_container_ctx
There is no member called 'dma' in struct xhci_container_ctx. Remove
the comments that mentions it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
usb: host: ehci-generic: add error path and .remove callback
Use an array to save enabled clocks reference and deasserted resets
in order to respectively disabled and asserted them in case of error
during probe() or during driver removal.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This function is usefull to get phandle number contained
in a property list.
For example, this allows to allocate the right amount
of memory to keep clock's reference contained into the
"clocks" property.
To implement it, either of_count_phandle_with_args() or
fdtdec_parse_phandle_with_args() are used respectively
for live tree and flat tree.
By passing index = -1, these 2 functions returns the
number of phandle contained into the property list.
Add also the dev_count_phandle_with_args() based on
ofnode_count_phandle_with_args()
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
A few lines (defines and declarations) had been duplicated when the
puma-rk3399 board was initially merged. This removes the duplicates
and changes the style to use local constants instead of pasted
literals.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[fixed up commit-message & converted to use 'const u32':] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:52:24 +0000 (17:52 +0800)]
rockchip: add u-boot specific dts for rk3036 sdk
Add this dts to enable debug uart releated devices
before relocation.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:52:01 +0000 (17:52 +0800)]
rockchip: use puts instead of printf when back to bootrom
printf will increase the code size more than 1kb, but platform
like rk3036 has no enough space for it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:51:30 +0000 (17:51 +0800)]
rockchip: enable SPL_LIBGENERIC for rk3036 based boards
function board_init_f_init_reserve will call memset, which
is implemented in lib, and enabled by CONFIG_SPL_LIBGENERIC_SUPPORT
in spl stage.
To reduce the code size, also enable SPL_TINY_MEMSET.
As rk3036 will return to bootrom immediately after dram
initialization, there is no need to run DM, so disable
SPL_DM_SERIAL.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:51:07 +0000 (17:51 +0800)]
rockchip: disable SPL_ARCH_MEMCPY/MEMSET for rk3036
RK3036 has no enough sapce use ARCH_MEMCPY/MEMSET in spl stage
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:50:46 +0000 (17:50 +0800)]
rockchip: set malloc pool size to 0 before relocation in spl state on rk3036 based board
RK3036 only has 4kb sram, the spl code will use
3.4 ~ 3.5 kb, the last 0.5kb are used for SP and
GD, so there is no space for malloc. Also, the spl
will directly return to bootrom after dram initialized,
they never need the space for malloc.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:49:59 +0000 (17:49 +0800)]
sandbox: use CONFIG_VAL(SYS_MALLOC_F_LEN) to distinguish malloc pool size before relocation
SPL and normal u-boot stage use different malloc pool size
configuration before relocation, so use CONFIG_VAL(SYS_MALLOC_F_LEN)
to fit different boot stage.
Signed-off-by: Andy Yan <andyshrk@gmail.com>
Changes in v3:
- use CONFIG_VAL(), which suggested by Simon
Changes in v2: None
arch/sandbox/cpu/start.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:49:01 +0000 (17:49 +0800)]
microblaze: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:47:27 +0000 (17:47 +0800)]
powerpc: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:45:27 +0000 (17:45 +0800)]
mips: spl: configure SYS_MALLOC_F_LEN independently for SPL and full U-Boot
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Mon, 24 Jul 2017 09:43:34 +0000 (17:43 +0800)]
spl: make SPL and normal u-boot stage use independent SYS_MALLOC_F_LEN
Some platforms have very limited SRAM to run SPL code, so there may
not be the same amount space for a malloc pool before relocation in
the SPL stage as the normal U-Boot stage.
Make SPL and (the full) U-Boot stage use independent SYS_MALLOC_F_LEN,
so the size of pre-relocation malloc pool can be configured memory
space independently.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up commit-message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Leo Wen [Tue, 25 Jul 2017 12:47:47 +0000 (20:47 +0800)]
rockchip: firefly: Add "usb start" to auto-start USB device
Add "preboot=usb start" to ROCKCHIP_DEVICE_SETTINGS,you don't
need to input "usb start" in command line of u-boot console,it
can auto-start the USB device,after that usb keyboard can work.
Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Leo Wen [Tue, 25 Jul 2017 12:47:46 +0000 (20:47 +0800)]
rockchip: firefly: Set the environment variable 'usbkbd' to the stdin
Add the 'usbkbd' environment variable to the 'stdin', the contents of
the keyboard input can be auto-displayed on the serial terminal,so
you don't need to manually set the environment variable 'stdin'.
Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Leo Wen [Tue, 25 Jul 2017 12:47:45 +0000 (20:47 +0800)]
rockchip: firefly: Add some macros to enable the usb keyboard
Add four macros of CONFIG_USB_KEYBOARD,CONFIG_DM_KEYBOARD,etc in the
firefly-rk3288_defconfig,can support usb keyboard device when these four
macros are enabled.
Signed-off-by: Leo Wen <leo.wen@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Wed, 26 Jul 2017 10:29:01 +0000 (12:29 +0200)]
rockchip: rk3399: enable SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT via Kconfig
SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC_SUPPORT were previously
enabled through rk3399_common.h. This change implies these options
through Kconfig.
These need to always be active for the RK3399, as follows:
- SPL_SERIAL_SUPPORT is needed to pass the SPL build
- SPL_DRIVERS_MISC_SUPPORT is needed to pass the SPL build
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
rockchip: rk3288: Add support for drive-strength in PINCTRL
Currently, drive-strenght to 12ma are described and supposed to be used
on RK3288. However, the pinctrl driver for this SoC only handles muxing
and pull up/pull down via PU/PD control registers. So complex IPs like
GMAC are working in normal ethernet 100mbps, but not at 1gbps typically.
This commit adds support for handling drive-strength of 12ma, when it's
defined in the DT.
Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 25 Jul 2017 04:00:05 +0000 (12:00 +0800)]
rockchip: use UUID for root partitions
We use to use /dev/mmcbl0p7 as root partition, and pass it
to kernel by cmdline, but the mmc number in kernel in not
fixed, we need to change the bootargs to adapt it from time
to time.
We can use the UUID to fix it, the ID is from:
https://www.freedesktop.org/wiki/Specifications/DiscoverablePartitionsSpec/
ARM 32bit: 69dad710-2ce4-4e3c-b16c-21a1d49abed3
ARM 64bit: b921b045-1df0-41c3-af44-4c6f280d3fae
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Wed, 19 Jul 2017 12:32:23 +0000 (14:32 +0200)]
rockchip: dts: rk3399-puma: put EFI partition entries at 2MB
When creating a EFI/GUID partition map for the RK3399-Q7 through
U-Boot, the partition entries should be places at a 1MB offset from
the start of the device to give us space for the environment (at 16KB
on SD/MMC devices), the SPL stage (at 32KB on SD/MMC devices) and the
image payload (at 256KB on SD/MMC devices).
This change sets this up through the u-boot,efi-partition-entries-offset
/config property in the RK3399-Q7 DTSI.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Wed, 19 Jul 2017 12:32:22 +0000 (14:32 +0200)]
rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) before SPL
As our SPL stage can grow quite large (80KB+ are not unusual) on the
RK3399-Q7, the default setting for the environment location (in
include/configs/rockchip-common.h) can overlap our SPL.
This change finally makes use of the 'u-boot,mmc-env-offset' DTS
property to override the environment location and put it at 16KB into
the device, which is right before the SPL (located at 32KB).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 11 Jul 2017 18:49:44 +0000 (20:49 +0200)]
rockchip: clk: rk3399: remove unused fields from priv-structures
This removes the unused 'rate' field from both rk3399_pmuclk_priv and
rk3399_clk_priv. I didn't bother to check where this came from (i.e.
what the historical context of these was), but only verified that
these are indeed unused across all code-paths.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 11 Jul 2017 18:49:43 +0000 (20:49 +0200)]
rockchip: clk: rk3368: remove unused fields from rk3368_clk_priv
The rk3368_clk_priv has two unused fields: rate, has_bwadj. This
removes them as there's no need for either (i.e. has_bwadj is always
true for the RK3368, according to its TRM).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 11 Jul 2017 18:59:45 +0000 (20:59 +0200)]
rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for auto-alloc
The clk driver for the RK3368 picked the wrong data structure's size
for its auto-alloc size: the size was calculated on the structure
representing the CRU hardware block instead of the priv structure.
As the CRU's register file is much larger than the driver's priv,
this did not cause any pain (except wasting memory).
Fix this by using the correct data structure's size.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Tue, 11 Jul 2017 19:04:45 +0000 (21:04 +0200)]
rockchip: spl: make boot0 hook TPL safe
When building for a TPL/SPL setup (e.g. on the RK3368), we need the
TPL stage to have the extra space for for the 'Rockchip SPL name'
(i.e. 'RK33' word). Yet, the SPL will start execution at its first
word (i.e. the first word in the SPL binary needs to be a valid
instruction). To make things a bit more involved, CONFIG_SPL_BUILD
is defined both for the SPL and the TPL stage.
To avoid having to explicitly test for the first stage (TPL, if and
only if TPL and SPL are built, SPL otherwise), this commit modifies
the sequence to repeat the 'b reset' (instead of reserving 4 bytes
of undefined space) at the start of the boot0 hook: if overwritten
(and execution starts at the second word), the first instruction is
still a 'b reset'... if not overwritten, we start on a 'b reset' as
well.
This solution wouldn't even require the check whether we are in the
SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for
documentation purposes.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 19 Jul 2017 11:54:22 +0000 (19:54 +0800)]
power: pwm_regulator: remove redundant code
The regulator_enable() should be called from upper layer like
regulators_enable_boot_on(), remove it from pwm regulator driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[fixed up typo in commit message:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 19 Jul 2017 11:54:21 +0000 (19:54 +0800)]
power: pwm_regulator: fix the pwm_set_config parameter order
The rkpwm reg order has fixed by below patch: e3ef41d rockchip: pwm: fix the register layout for the PWM controller
We need to correct the parameter order for pwm_set_config() to make
the pwm regulator works correctly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Wed, 19 Jul 2017 11:54:20 +0000 (19:54 +0800)]
rockchip: dts: correct vdd_log setting for firefly-rk3399
Add regulator-init-microvolt for driver to init the regulator,
and the min output value is not 800000mV for the PWM2 io domain has
changed to VCC3V0 instead of VCC1V8 in rockchip evb, we need to
correct it with the value measured when PWM2 output HIGH.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 18 Jul 2017 13:55:08 +0000 (21:55 +0800)]
rockchip: dts: firefly using ddr3 1600
According to my test, some of firefly-rk3399 hang after dram init
when using ddr3-1333 config, while using ddr3-1600 config works
for all the board I have test.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.
phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.
Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
rockchip: rk3288: Revert MAC_TXCLK in pinctrl for GMAC
This reverts TXCLK toggling that was accidently dropped while reworking
commit 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the gmac
ethernet interface"). So the TX clock is enabled and we can use
GMAC_ROCKCHIP in 1Gbps when basic PINCTRL support is enabled
(!PINTRL_FULL).
Fixes: 2454b719fb87 ("rockchip: rk3288: Add pinctrl support for the...") Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Fri, 14 Jul 2017 16:09:25 +0000 (18:09 +0200)]
rockchip: timer: make register sizes explicit
We are about to reuse the rockchip timer (header file) for 64bit ARMv8
chips, so it seems a good time to make the register sizes explicit by
changing from 'unsigned int' to 'u32'.
Reorders the header-includes in rk_timer.c to ensure that 'u32' is
definded before it is used by 'asm/arch/timer.h'.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tom Rini [Tue, 18 Jul 2017 18:14:19 +0000 (14:14 -0400)]
FIT: List kernel_noload in the list of types
In the source_file_format.txt file we talk about how to construct a
valid FIT image. While it already says to look at the source for the
full list, add kernel_noload to the explicit list of types. This is
arguably the most important type to use as most often we are including a
kernel that will run from wherever it is loaded into memory and execute.
This for example, allows you to create a single FIT image for Linux that
can be used on both OMAP and i.MX devices as the kernel will not need to
be moved in memory.
STM32F7 and H7 shared the same SDRAM control block.
On STM32H7 few control bits has been added.
The current driver need some minor adaptation as FMC block
enable/disable for H7.
Retrieve RAM base address from DT instead of using STM32_SDRAM_FMC
For STM32F7, FMC block base address is 0xA0000000, but SDRAM
registers are located at offset 0x140 inside FMC block.
Update the stm32_fmc_regs fields with all FMC registers
to map SDRAM registers at the right address.
This allow to remove include/dm/platform_data/serial_stm32x7.h
which was included in the past by stm32x7 driver and by
stm32f746-disco.c board file.
Since patch 42bf5e7c27 "serial: stm32f7: add device tree support"
this file is no more needed in board file.
Add clock framework .get_rate callback.
This step will allow to convert all drivers which was using
proprietary clock_get() to use clock framework .get_rate().
configs: ti: armv7: Fixes bug in fit_loadaddr for ramfs boot
The load address of ramdisk, rdaddr is 0x88080000 and fit_loadaddr
is defined as 0x88000000. This leaves only 512Kbytes for the
fit image. When the FIT images are larger than this, it will
overwite the ramdisk and cause the boot to fail.
For eg, The K2 HS fit images are a few MB and end up overwriting
the ramdsk. This patch moves the fit_loadaddr to 0x87000000,
leaving a 16MB window for the fit image. This memory can be
reclaimed once the kernel starts running.
arm: mach-keystone: Updates mon_install for K2G HS
On early K2 devices (eg. K2HK) the secure ROM code does not support
loading secure code to firewall protected memory, before decrypting,
authenticating and executing it.
To load the boot monitor on these devices, it is necessary to first
authenticate and run a copy loop from non-secure memory that copies
the boot monitor behind firewall protected memory, before decrypting
and executing it.
On K2G, the secure ROM does not allow secure code executing from
unprotected memory. Further, ROM first copies the signed and encrypted
image into firewall protected memory, then decrypts, authenticates
and executes it.
As a result of this, we cannot use the copy loop for K2G. The
mon_install has to be modified to pass the address the signed and
encrypted secure boot monitor image to the authentication API.
For backward compatibility with other K2 devices and K2G GP,
the mon_install API still supports a single argument. In this case
the second argument is set to 0 by u-boot and is ignored by ROM
Andrew F. Davis [Mon, 17 Jul 2017 17:59:14 +0000 (12:59 -0500)]
configs: k2x_evm: Reorder default boot command
We first split the CONFIG_BOOTCOMMAND into its components to improve
readability. We then make the following order changes:
- Run findfdt first so the fdt name can be used in envboot like OMAP
- Install the boot monitor before running the PMMC so we can make any
needed secure changes before PMMC, do this on both HS and non-HS
- Move set_name_pmmc to just before get_pmmc_${boot}
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
configs: k2x_evm: Adds environment variables for secure devices
Updates the default u-boot environment variables to support secure
boot. On secure devices, a secure boot monitor (sec-bm) needs to
be installed by u-boot.
Signed-off-by: Madan Srinivas <madans@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
board_is*("rev", board_ti_get_rev()) uses strncmp() for
revison detection and assumes it is success if return value
is <= 0. This will fail in case of multiple versions, as
revb will be true for board_is_*revb() and board_is_*reva().
Fix it by looking for exact match of the string.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
ARM: uniphier: remove part number info from the boot log
As is often the case with SoC development, slightly different
products (i.e. different part number) are developed based on the
same silicon-die. Such fine grained information is unmaintainable.
It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.
Simon Glass [Mon, 24 Jul 2017 03:19:40 +0000 (21:19 -0600)]
env: Move help from README to Kconfig
The CONFIG_ENV_IS_IN_... options which have already been converted to
Kconfig only have a small amount of help. Move the rest of it over from
the README.
Simon Glass [Mon, 24 Jul 2017 03:19:39 +0000 (21:19 -0600)]
Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig
This converts the following to Kconfig:
CONFIG_ENV_IS_IN_MMC
CONFIG_ENV_IS_IN_NAND
CONFIG_ENV_IS_IN_UBI
CONFIG_ENV_IS_NOWHERE
In fact this already exists for sunxi as a 'choice' config. However not
all the choices are available in Kconfig yet so we cannot use that. It
would lead to more than one option being set.
In addition, one purpose of this series is to allow the environment to be
stored in more than one place. So the existing choice is converted to a
normal config allowing each option to be set independently.
There are not many opportunities for Kconfig updates to reduce the size of
this patch. This was tested with
./tools/moveconfig.py -i CONFIG_ENV_IS_IN_MMC
And then manual updates. This is because for CHAIN_OF_TRUST boards they
can only have ENV_IS_NOWHERE set, so we enforce that via Kconfig logic
now.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Paul Burton [Tue, 25 Jul 2017 14:07:03 +0000 (15:07 +0100)]
mips-relocs: Fix warning from gcc 6.3
It seems that gcc 6.3 at least is smart enough to warn about the _val
variable being unassigned in the default case in the set_hdr_field()
macro, but not smart enough to figure out that the default case is never
taken. This results in warnings such as the following:
pfx##hdr32[idx].field = _val; \
^
../tools/mips-relocs.c:51:11: note: _val was declared here
uint64_t _val; \
^
../tools/mips-relocs.c:88:2: note: in expansion of macro set_hdr_field
set_hdr_field(p, idx, field, val)
^~~~~~~~~~~~~
../tools/mips-relocs.c:408:3: note: in expansion of macro set_phdr_field
set_phdr_field(i, p_filesz, load_sz);
^~~~~~~~~~~~~~
../tools/mips-relocs.c: In function main:
../tools/mips-relocs.c:77:25: warning: _val may be used uninitialized
in this function [-Wmaybe-uninitialized]
Avoid this by assigning _val = 0 in the default case, and asserting that
we didn't actually hit it for good measure.
For reference gcc 7.1.1 seems to be smart enough to not hit the above
warning without this patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Fixes: 011dd93ca97a ("MIPS: Stop building position independent code") Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: u-boot@lists.denx.de
This patch fixes 2 bugs introduced by the following commit
2bb5b63 MIPS: bootm: rework and fix broken bootm code
The CONFIG_IS_ENABLED macro prepends 'CONFIG_' Hence, remove CONFIG_
from CONFIG_MIPS_BOOT_ENV_LEGACY usage.
Also, 2bb5b63 reworks bootm so that linux_env_legacy runs before
linux_cmdline_legacy. However, linux_env_legacy depends on
linux_cmdline_legacy running first as linux_cmdline_init initialilzes
linux_argp which linux_env_legacy later depends on during its
initialization.
Reorder the code so that linux_cmdline_legacy runs before
linux_env_legacy.
Paul Burton [Mon, 19 Jun 2017 18:53:47 +0000 (11:53 -0700)]
MIPS: Stop building position independent code
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.
Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:
This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.
Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:
Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.
This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.
Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Paul Burton [Fri, 16 Jun 2017 00:05:09 +0000 (17:05 -0700)]
Makefile: Allow arch post-link hook
This commit allows an architecture to provide a Makefile.postlink whose
u-boot target gets invoked after the u-boot ELF is linked. This will be
of use for MIPS in a following commit.
This mirrors Linux commit fbe6e37dab97 ("kbuild: add arch specific
post-link Makefile").
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org> Cc: u-boot@lists.denx.de Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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