Becky Bruce [Wed, 23 Jan 2008 22:31:00 +0000 (16:31 -0600)]
86xx: Rearrange the sequence in start.S
* split the BAT initialization so that only 2 BATs (for the boot page
and stack) are programmed very early on. The rest are initialized later.
* Move other BAT setup, ccsrbar setup, and law setup later in the code
after translation has been enabled.
These changes will facilitate the moving of law and BAT initialization
to C code, and will aid with 36-bit physical addressing support.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The patch adds 4 boards, called AcTux-1 .. AcTux-4. This patch contains the
files that
contain changes for multiple boards, the board-specific files follow as
separate patches.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
enables the RTS signal with CONFIG_SERIAL_RTS_ACTIVE.
No handshaking is done, but the active RTS signal allows to
connect to the target using a PC which is using RTS/CTS
handshake, and does no harm if the PC is set to ignore RTS.
Signed-off-by: Michael Schwingen <michael@schwingen.org>
load ixp42x NPE firmware from separate flash block, remove dead code
Hi,
the following patch adds support to move the IXP42X NPE firmware to a
separate flash block, whose start address is defined in
CONFIG_IXP4XX_NPE_EXT_UCODE_BASE. Using that, it is possible to build
NPE-enabled u-boot without copyright problems due to the NPE firmware.
I hope the patch applies, I get whitespace-related differences in the NPE
files due to trailing whitespace in the original versions.
Signed-off-by: Michael Schwingen <michael@schwingen.org> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Haiying Wang [Wed, 16 Jan 2008 22:12:12 +0000 (17:12 -0500)]
FSL: Fix common EEPROM_data structure definition
- Fix EEPROM_data structure definition according to System EEPROM Data Format.
- Read MAC addresses from EEPROM to ethXaddr before saving ethXaddr to
bd->bi_ethaddr.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Ben Warren [Thu, 17 Jan 2008 03:37:35 +0000 (22:37 -0500)]
Add support for a Freescale non-CPM SPI controller
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family. Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Matthias Fuchs [Thu, 17 Jan 2008 06:45:05 +0000 (07:45 +0100)]
net: add 'ethrotate' environment variable
[PATCH] net: add 'ethrotate' environment variable
This patch replaces the buildtime configuration option
CONFIG_NET_DO_NOT_TRY_ANOTHER through the 'ethrotate' runtime
configuration veriable. See README.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Niklaus Giger [Wed, 16 Jan 2008 17:39:20 +0000 (18:39 +0100)]
ppc4xx: Netstal HCU4 board: added various fixes and POST
- Moved some common code to netstal/common/nm_bsp.c.
- sdram initialisation goes go netstal/common/fixed_sdram.c.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Niklaus Giger [Thu, 17 Jan 2008 11:53:56 +0000 (12:53 +0100)]
ppc4xx: netstal/common define routines used by all boards
Added some routines used by all Netstal boards:
- nm_bsp.c: - nm_show_print and
- common_misc_init_r
- set_params_for_sw_install. Very specific code to handle our SW
installation procedure
- fixed_sdram.c: Common routines for HCU4 (and upcoming) MCU25 boards
to handle sdram initialization.
- nm.h: Common header
Niklaus Giger [Wed, 16 Jan 2008 17:39:18 +0000 (18:39 +0100)]
ppc4xx: Netstal HCU5 board: added various fixes and POST
- Moved some common code to nestal/common/nm_bsp.c.
- Added support for the vxWorks EDR.
- Enable trace for Lauterbach, if present.
- Added support for POST.
- Stylistic cleanups (multi-line comments/ enforce 80 colomn width)
Kumar Gala [Thu, 17 Jan 2008 04:38:34 +0000 (22:38 -0600)]
85xx: Reworked initial processor init
Reworked the initial processor initialzation sequence:
* introduced cpu_early_init_f that is run in address space 1 (AS=1)
* Moved TLB/LAW and CCSR init into cpu_early_init_f()
* Reworked initial asm code to do most of the core init before TLBs
The main reasons for these changes are to allow handling of 36-bit phys
addresses in the future and some of the issues that will exist when we
do that.
There are a few caveats on what can be initialized via the LAW and TLB
static tables:
* TLB entry 14/15 can't be initialized via the TLB table
* any LAW that covers the implicit boot window (4G-8M to 4G) must map to
the code that is currently executing.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 17 Jan 2008 04:33:22 +0000 (22:33 -0600)]
85xx: Introduce new tlb API
Add a set of functions to manipulate TLB entries:
* set_tlb() - write a tlb entry
* invalidate_tlb() - invalidate a tlb array
* disable_tlb() - disable a variable size tlb entry
* init_tlbs() - setup initial tlbs based on static table
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 16 Jan 2008 16:04:42 +0000 (10:04 -0600)]
85xx: Use proper defines for PCI addresses
We should be using the _MEM_PHYS for LAW and TLB setup and not _MEM_BASE.
While _MEM_BASE & _MEM_PHYS are normally the same, _MEM_BASE should only
be used for configuring the PCI ATMU.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
drivers/net/rtl8139.c: rx_status should be le32_to_cpu(rx_status).
rx_status on the memory is basically in LE, but needs to be handled in CPU
endian. le32_to_cpu() takes up this mission. Even if on the sane hardware,
it'll work fine.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Cc: Masami Komiya <mkomiya@sonare.it> Cc: Lucas Jin <lucasjin@gmail.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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