]> git.sur5r.net Git - u-boot/log
u-boot
11 years agopowerpc/t4240qds: fix XAUI card PHY address
Shaohui Xie [Mon, 25 Mar 2013 07:33:16 +0000 (07:33 +0000)]
powerpc/t4240qds: fix XAUI card PHY address

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoT4/serdes: fix the serdes clock frequency
Roy Zang [Mon, 25 Mar 2013 07:33:15 +0000 (07:33 +0000)]
T4/serdes: fix the serdes clock frequency

Reverse the bit sequence to set and display serdes clock frequency
correctly. The correct bit maps in BRDCFG2 are
0 1 2 3 4 5 6 7
S1RATE[1:0] S2RATE[1:0]  S3RATE[1:0]  S4RATE[1:0]

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoe6500: Move L1 enablement after L2 enablement
Andy Fleming [Mon, 25 Mar 2013 07:33:14 +0000 (07:33 +0000)]
e6500: Move L1 enablement after L2 enablement

The L1 D-cache on e6500 is write-through. This means that it's not
considered a good idea to have the L1 up and running if the L2 is
disabled. We don't actually *use* the L1 until after the L2 is
brought up on e6500, so go ahead and move the L1 enablement after
that code is done.

Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/t4240qds: Fix SPI flash type
Shaohui Xie [Mon, 25 Mar 2013 07:33:13 +0000 (07:33 +0000)]
powerpc/t4240qds: Fix SPI flash type

T4240QDS uses a SST instead of SPANSION SPI flash.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Update corenet global utility block registers
York Sun [Mon, 25 Mar 2013 07:33:12 +0000 (07:33 +0000)]
powerpc/mpc85xx: Update corenet global utility block registers

Fix ccsr_gur for corenet platform. Remove non-exist registers. Add fuse
status register.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Add definitions for HDBCR registers
Andy Fleming [Mon, 25 Mar 2013 07:33:10 +0000 (07:33 +0000)]
powerpc/mpc85xx: Add definitions for HDBCR registers

Makes it a bit easier to see if we've properly set them. While
we're in there, modify the accesses to HDBCR0 and HDBCR1  to actually
use those definitions.

Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/B4860: Corrected FMAN1 operating frequency print at u-boot
Sandeep Singh [Mon, 25 Mar 2013 07:33:09 +0000 (07:33 +0000)]
powerpc/B4860: Corrected FMAN1 operating frequency print at u-boot

The bit positions for FMAN1 freq in RCW is different for B4860.
Also addded a case when FMAN1 frewuency is equal to systembus.

Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Mon, 13 May 2013 22:17:39 +0000 (18:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

11 years agox86: Add coreboot timestamps
Simon Glass [Wed, 17 Apr 2013 16:13:48 +0000 (16:13 +0000)]
x86: Add coreboot timestamps

Add selected coreboot timestamps into bootstage to get a unified view of
the boot timings.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Support adding coreboot timestanps to bootstage
Simon Glass [Wed, 17 Apr 2013 16:13:47 +0000 (16:13 +0000)]
x86: Support adding coreboot timestanps to bootstage

Coreboot provides a lot of useful timing information. Provide a facility
to add this to bootstage on start-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: config: Enable LZO for coreboot, remove zlib, gzip
Simon Glass [Wed, 17 Apr 2013 16:13:46 +0000 (16:13 +0000)]
x86: config: Enable LZO for coreboot, remove zlib, gzip

We don't use zlib and gzip but do use lzo, so enable this.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not defined
Simon Glass [Wed, 17 Apr 2013 16:13:45 +0000 (16:13 +0000)]
x86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not defined

This local variable is not used unless CONFIG_GZIP is defined. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agobootstage: Allow marking a particular line of code
Simon Glass [Wed, 17 Apr 2013 16:13:44 +0000 (16:13 +0000)]
bootstage: Allow marking a particular line of code

Add a function which allows a (file, function, line number) to be marked
in bootstage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
11 years agox86: Enable bootstage for coreboot
Simon Glass [Wed, 17 Apr 2013 16:13:43 +0000 (16:13 +0000)]
x86: Enable bootstage for coreboot

This is a convenient way of finding out where boottime is going. Enable
it for coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoCall bootstage_relocate() after malloc is initted
Doug Anderson [Wed, 17 Apr 2013 16:13:42 +0000 (16:13 +0000)]
Call bootstage_relocate() after malloc is initted

In a previous CL we added the bootstage_relocate(), which should be
called after malloc is initted.  Now we call it on generic board.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 years agobootstage: Copy bootstage strings post-relocation
Doug Anderson [Wed, 17 Apr 2013 16:13:41 +0000 (16:13 +0000)]
bootstage: Copy bootstage strings post-relocation

Any pointers to name strings that were passed to bootstage_mark_name()
pre-relocation should be copied post-relocation so that they don't get
trashed as the original location of U-Boot is re-used for other
purposes.

This change introduces a new API call that should be called from
board_init_r() after malloc has been initted on any board that uses
bootstage.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 years agobootstage: Add stubs for new bootstage functions
Simon Glass [Wed, 17 Apr 2013 16:13:40 +0000 (16:13 +0000)]
bootstage: Add stubs for new bootstage functions

Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined.
Add one to avoid #ifdefs in the code when this is used in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
11 years agox86: Re-enable PCAT timer 2 for beeping
Simon Glass [Wed, 17 Apr 2013 16:13:39 +0000 (16:13 +0000)]
x86: Re-enable PCAT timer 2 for beeping

While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Remove ISR timer
Simon Glass [Wed, 17 Apr 2013 16:13:38 +0000 (16:13 +0000)]
x86: Remove ISR timer

This is no longer used since we prefer the more accurate TSC timer, so
remove the dead code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Remove old broken timer implementation
Simon Glass [Wed, 17 Apr 2013 16:13:37 +0000 (16:13 +0000)]
x86: Remove old broken timer implementation

Tidy up some old broken and unneeded implementations. These are not used
by coreboot or anything else now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Add TSC timer
Simon Glass [Wed, 17 Apr 2013 16:13:36 +0000 (16:13 +0000)]
x86: Add TSC timer

This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.

Tidy up some old broken and unneeded implementations at the same time.

To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.

Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Rationalise kernel booting logic and bootstage
Simon Glass [Wed, 17 Apr 2013 16:13:35 +0000 (16:13 +0000)]
x86: Rationalise kernel booting logic and bootstage

The 'Starting linux' message appears twice in the code, but both call
through the same place. Unify these and add calls to bootstage to
mark the occasion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Implement panic output for coreboot
Simon Glass [Wed, 17 Apr 2013 16:13:34 +0000 (16:13 +0000)]
x86: Implement panic output for coreboot

panic_puts() can be called in early boot to display a message. It might
help with early debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
11 years agox86: Declare global_data pointer when it is used
Simon Glass [Wed, 17 Apr 2013 16:13:33 +0000 (16:13 +0000)]
x86: Declare global_data pointer when it is used

Several files use the global_data pointer without declaring it. This works
because the declaration is currently a NOP. But still it is better to
fix this so that x86 lines up with other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Remove legacy board init code
Simon Glass [Wed, 17 Apr 2013 16:13:32 +0000 (16:13 +0000)]
x86: Remove legacy board init code

Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Remove unused portion of link script
Simon Glass [Wed, 17 Apr 2013 16:13:31 +0000 (16:13 +0000)]
x86: Remove unused portion of link script

Since we don't have real-mode code now, we can remove this chunk of the link
script.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agox86: Remove unused bios/pci code
Simon Glass [Wed, 17 Apr 2013 16:13:30 +0000 (16:13 +0000)]
x86: Remove unused bios/pci code

Graeme Russ pointed out that this code is no longer used. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
11 years agoavr32: fix relocation address calculation
Andreas Bießmann [Tue, 7 May 2013 23:25:17 +0000 (23:25 +0000)]
avr32: fix relocation address calculation

Commit 1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
section.h symbol files) changed the __bss_end symbol type from char[] to
ulong. This led to wrong relocation parameters which ended up in a not working
u-boot. Unfortunately this is not clear to see cause due to RAM aliasing we
may get a 'half-working' u-boot then.

Fix this by dereferencing the __bss_end symbol where needed.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agoMove FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h
Gerald Van Baren [Sun, 5 May 2013 02:17:49 +0000 (22:17 -0400)]
Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h

The define should not have been put in fdt.h originally, libfdt_env.h
is the proper place for target-specific customizations.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
11 years agoAdded license header to dtc/libfdt/fdt.h and libfdt_env.h
Justin Sobota [Fri, 15 Feb 2013 16:06:10 +0000 (11:06 -0500)]
Added license header to dtc/libfdt/fdt.h and libfdt_env.h

This commit adds a license header to fdt.h and libfdt_env.h
because the license was omitted.

U-Boot note: the u-boot libfdt_env.h header portion was not applied to
the u-boot libfdt_env.h because that file was created by Gerald Van Baren
(with a license header). - gvb

Ref: DTC commit 27cdc1b1

Signed-off-by: Justin Sobota <jsobota@ti.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
11 years agoFix typo
François Revol [Sat, 2 Feb 2013 23:52:21 +0000 (00:52 +0100)]
Fix typo

Ref: DTC commit cc11e522

Signed-off-by: François Revol <revol@free.fr>
11 years agoExport fdt_stringlist_contains()
Simon Glass [Mon, 21 Jan 2013 20:59:18 +0000 (12:59 -0800)]
Export fdt_stringlist_contains()

This function is useful outside libfdt, so export it.

Ref: DTC commit b7aa300e

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
11 years agoMerge branch 'patman' of git://git.denx.de/u-boot-x86
Tom Rini [Fri, 10 May 2013 01:04:32 +0000 (21:04 -0400)]
Merge branch 'patman' of git://git.denx.de/u-boot-x86

11 years agoopenrisc: move board linker script(s) to a common in cpu/
Stefan Kristiansson [Wed, 1 May 2013 09:32:46 +0000 (09:32 +0000)]
openrisc: move board linker script(s) to a common in cpu/

Unifies the openrisc boards linker scripts into a common one.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
11 years agoopenrisc: specify a memory region for u_boot_lists
Stefan Kristiansson [Wed, 1 May 2013 09:32:45 +0000 (09:32 +0000)]
openrisc: specify a memory region for u_boot_lists

Since there are two memory areas defined, vectors and ram,
the linker will error when neither of them are specified for a
section.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
11 years agofs/ext4: Support device block sizes != 512 bytes
Egbert Eich [Wed, 1 May 2013 01:13:19 +0000 (01:13 +0000)]
fs/ext4: Support device block sizes != 512 bytes

The 512 byte block size was hard coded in the ext4 file systems.
Large harddisks today support bigger block sizes typically 4096
bytes.
This patch removes this limitation.

Signed-off-by: Egbert Eich <eich@suse.com>
11 years agoFix references to the documentation files
Anatolij Gustschin [Tue, 30 Apr 2013 11:15:33 +0000 (11:15 +0000)]
Fix references to the documentation files

Many boot image configuration files refer to the
appropriate documentation file, but these references
contain typos in the directory and file name. Fix
them. Also fix reference to doc/README.SPL file.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agopatman: Do not hardcode python path
Michal Simek [Mon, 6 May 2013 04:11:58 +0000 (04:11 +0000)]
patman: Do not hardcode python path

Patman requires python 2.7.4 to run but it doesn't
need to be placed in /usr/bin/python.
Use env to ensure that the interpreter used is
the first one on environment's $PATH on system
with several versions of Python installed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agobuildman: Allow conflicting tags to avoid spurious errors
Simon Glass [Thu, 2 May 2013 14:46:02 +0000 (14:46 +0000)]
buildman: Allow conflicting tags to avoid spurious errors

Conflicting tags can prevent buildman from building two series which exist
one after the other in a branch. There is no reason not to allow this sort
of workflow with buildman, so ignore conflicting tags in buildman.

Change-Id: I2231d04d8684fe0f8fe77f8ea107e5899a3da5e8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoenv: throw an error when an empty key is used
Lucian Cojocar [Sun, 28 Apr 2013 11:31:57 +0000 (11:31 +0000)]
env: throw an error when an empty key is used

If the environment contains an entry like "=value" "\0" we should throw
an error when parsing the environment. Otherwise, U-Boot will enter in
an infinite loop.

Signed-off-by: Lucian Cojocar <cojocar@gmail.com>
11 years agobuild: Pull -DBUILD_TAG into separate ifdef
Marek Vasut [Sat, 27 Apr 2013 07:50:11 +0000 (07:50 +0000)]
build: Pull -DBUILD_TAG into separate ifdef

Currently the base setting for CFLAGS is split in two possibilities,
one with -DBUILD_TAG appended at the end and one without, the rest of
CFLAGS is the same in both cases. Change this so CFLAGS are always set
and the -DBUILD_TAG is appended in separate ifdef.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
11 years agogpio: Add support for microblaze xilinx GPIO
Michal Simek [Wed, 24 Apr 2013 08:01:20 +0000 (10:01 +0200)]
gpio: Add support for microblaze xilinx GPIO

Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.

Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.

There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.

Adding several gpios IP is also possible and supported.

For listing gpio configuration please use "gpio status" command

This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
 may be undefined [-Wsequence-point]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agomicroblaze: bootm: Add support for loading initrd
Michal Simek [Thu, 2 May 2013 10:49:18 +0000 (12:49 +0200)]
microblaze: bootm: Add support for loading initrd

fdt_initrd add additional information to DTB about initrd
addresses which are later used by kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agomicroblaze: bootm: Fix coding style issues
Michal Simek [Thu, 2 May 2013 10:51:48 +0000 (12:51 +0200)]
microblaze: bootm: Fix coding style issues

Prepare place for new patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agonds32: Use sections header to obtain link symbols
Kuan-Yu Kuo [Tue, 23 Apr 2013 07:47:47 +0000 (07:47 +0000)]
nds32: Use sections header to obtain link symbols

Include this header to get access to link symbols, which are otherwise
removed.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
11 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-mmc
Tom Rini [Tue, 7 May 2013 14:09:00 +0000 (10:09 -0400)]
Merge branch 'master' of git://www.denx.de/git/u-boot-mmc

11 years agommc: fsl_esdhc: Use calloc()
Fabio Estevam [Thu, 27 Dec 2012 08:51:08 +0000 (08:51 +0000)]
mmc: fsl_esdhc: Use calloc()

A malloc() followed by memset() can be simply replaced by calloc().

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agommc: sdhci: return error when failed add_sdhci().
Jaehoon Chung [Thu, 13 Dec 2012 20:07:12 +0000 (20:07 +0000)]
mmc: sdhci: return error when failed add_sdhci().

If failed the add_host(), it is reasonable that return value of
add_sdhci().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agosdhci: Add sdhci support for spear devices
Vipin Kumar [Wed, 5 Dec 2012 20:44:09 +0000 (20:44 +0000)]
sdhci: Add sdhci support for spear devices

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agodavinci, mmc: Added a delay reading ext CSD register
Davide Bonfanti [Thu, 29 Nov 2012 01:06:53 +0000 (01:06 +0000)]
davinci, mmc: Added a delay reading ext CSD register

Without this additional delay, some eMMC don't negotiate properly bus width
Tested on:
 - Toshiba THGBM2G8D8FBAIB
 - Toshiba THGBM4G4D1HBAR
 - Micron MTFC4GMVEA (the one giving the problem)
 - Hynix H26M64002BNR
 - SanDisk SDIN5E1-32G

Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agommc: Split device init to decouple OCR-polling delay
Che-Liang Chiou [Wed, 28 Nov 2012 15:21:13 +0000 (15:21 +0000)]
mmc: Split device init to decouple OCR-polling delay

Most of time that MMC driver spends on initializing a device is polling
OCR (operation conditions register).  To decouple this polling loop,
device init is split into two parts: The first part fires the OCR query
command, and the second part polls the result.  So the caller is now no
longer bound to the OCR-polling delay; he may fire the query, go
somewhere and then come back later for the result.

To use this, call mmc_set_preinit() on any device which needs this.

This can save significant amounts of time on boot (e.g. 200ms) by
hiding the MMC init time behind other init.

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agousb: common: Use a global definition for 'min3'
Vivek Gautam [Wed, 24 Apr 2013 02:50:13 +0000 (02:50 +0000)]
usb: common: Use a global definition for 'min3'

We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
11 years agousb: fix: Fixing Port status and feature number constants
Vivek Gautam [Wed, 24 Apr 2013 02:50:12 +0000 (02:50 +0000)]
usb: fix: Fixing Port status and feature number constants

Fix the Port status bit constants and Port feature number
constants as a part of USB 2.0 and USB 3.0 Hub class.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agousb: hub: Parallelize power-cycling of root-hub ports
Vivek Gautam [Wed, 24 Apr 2013 02:50:11 +0000 (02:50 +0000)]
usb: hub: Parallelize power-cycling of root-hub ports

Untill now we power-cycle (aka: disable power on a port
and re-enabling again) one port at a time.
Delay of 20ms for Port-power to change multiplies with
number of ports in this case.
So better we parallelize this process:
disable power on all ports, wait for port-power to stabilize
and then re-enable the power subsequently.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agoUSB: ohci-at91: make OHCI work on at91sam9g10 SoC
Bo Shen [Wed, 17 Apr 2013 00:09:51 +0000 (00:09 +0000)]
USB: ohci-at91: make OHCI work on at91sam9g10 SoC

The at91sam9g10 need to configure HCK0 to make OHCI work

Signed-off-by: Bo Shen <voice.shen@atmel.com>
11 years agoUSB: SS: Add support for Super Speed USB interface
Vivek Gautam [Fri, 12 Apr 2013 11:04:38 +0000 (16:34 +0530)]
USB: SS: Add support for Super Speed USB interface

This adds usb framework support for super-speed usb, which will
further facilitate to add stack support for xHCI.

Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agousb: hub: Fix enumration timeout
Vivek Gautam [Fri, 12 Apr 2013 11:04:37 +0000 (16:34 +0530)]
usb: hub: Fix enumration timeout

Patch b6d7852c increases timeout for enumeration, taking
worst case to be 10 sec.
get_timer() api returns timestamp in milliseconds, which is
what we are checking in the do-while() loop in usb_hub_configure()
(get_timer(start) < CONFIG_SYS_HZ * 10).
This should give us a required check for 10 seconds, and thereby
we don't need to add additional mdelay of 100 microseconds in
each cycle.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
11 years agousb: Update device class in usb device's descriptor
Vivek Gautam [Fri, 12 Apr 2013 11:04:36 +0000 (16:34 +0530)]
usb: Update device class in usb device's descriptor

Fetch the device class into usb device's dwcriptors,
so that the host controller's driver can use this info
to differentiate between HUB and DEVICE.

Signed-off-by: Amar <amarendra.xt@samsung.com>
11 years agousb: hub: Power-cycle on root-hub ports
Vivek Gautam [Fri, 12 Apr 2013 11:04:35 +0000 (16:34 +0530)]
usb: hub: Power-cycle on root-hub ports

XHCI ports are powered on after a H/W reset, however
EHCI ports are not. So disabling and re-enabling power
on all ports invariably.

Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agoUSB: Some cleanup prior to USB 3.0 interface addition
Vivek Gautam [Fri, 12 Apr 2013 11:04:34 +0000 (16:34 +0530)]
USB: Some cleanup prior to USB 3.0 interface addition

Some cleanup in usb framework, nothing much on feature side.

Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agousb: common: Weed out USB_**_PRINTFs from usb framework
Vivek Gautam [Fri, 12 Apr 2013 11:04:33 +0000 (16:34 +0530)]
usb: common: Weed out USB_**_PRINTFs from usb framework

USB_PRINTF, USB_HUB_PRINTF, USB_STOR_PRINTF, USB_KBD_PRINTF
are nothing but conditional debug prints, depending on DEBUG.
So better remove them and use debug() simply.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agousb: Add new command to set USB 2.0 port test modes
Julius Werner [Thu, 28 Feb 2013 18:08:40 +0000 (18:08 +0000)]
usb: Add new command to set USB 2.0 port test modes

This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.

Signed-off-by: Julius Werner <jwerner@chromium.org>
11 years agoUSB: EHCI: Add weak functions to support new chip
Jim Lin [Wed, 27 Mar 2013 00:52:32 +0000 (00:52 +0000)]
USB: EHCI: Add weak functions to support new chip

Add ehci_get_port_speed() and ehci_set_usbmode() weak functions
for platform driver to support new chip.

Signed-off-by: Jim Lin <jilin@nvidia.com>
11 years agoP1022DS: Set CONFIG_SPL_MAX_SIZE directly
Tom Rini [Fri, 3 May 2013 13:19:43 +0000 (09:19 -0400)]
P1022DS: Set CONFIG_SPL_MAX_SIZE directly

With the u-boot-with-spl.bin rule calling $(OBJCOPY) with
CONFIG_SPL_PAD_TO, and CONFIG_SPL_PAD_TO defaulting to
CONFIG_SPL_MAX_SIZE we cannot use math here, so set it to 4096 rather
than 4 * 1024.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Thu, 2 May 2013 23:54:32 +0000 (19:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

11 years agopowerpc/85xx: set USB2 default mode to 'device' for (super)hydra boards
Shaohui Xie [Mon, 25 Mar 2013 07:30:15 +0000 (07:30 +0000)]
powerpc/85xx: set USB2 default mode to 'device' for (super)hydra boards

The Hydra and Superhydra (P3041DS, P5020DS, and P5040DS) boards have a
second USB port that can be configured in either host, peripheral (aka
device), or OTG (on-the-go) mode.  When configured in host mode, if
the port is connected to another USB host, damage to the board can
occur.

To avoid this, we change the default setting to peripheral mode.  Ideally,
we'd set it to OTG mode, but currently there is no OTG support for
these boards.

Setting the hwconfig variable will also update the device tree, and so
Linux will configure the port for peripheral mode as well.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC
Xu Jiucheng [Mon, 25 Mar 2013 07:30:13 +0000 (07:30 +0000)]
powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC

When P1021RDB-PC reboot system, the board will hung at uboot DDR
configuration. For P1021RDB-PC DDR reset pin is multiplex with
QE, so uboot will reserve this pin for QE and skip DDR reset.
Other platforms without QE will do this reset. This patch adds
a slight code to reset DDR chip by QE CE_PB8 pin for NAND and
NOR FLASH boot. For booting from SPI FALSH and SD card, it
seems possible to use the rom on chip to write to the GPIO
pins before configuring the DDR.

Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Changed LIODN offset values
Cristian Sovaiala [Mon, 25 Mar 2013 07:30:12 +0000 (07:30 +0000)]
powerpc/mpc85xx: Changed LIODN offset values

Extending LIODN offset range from 1-5 to 1-10
While using a qman portal with a higher index the LIODN offset
is incorrectly set, thus extending the range of offsets covers
all 10 qman portals

Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Acked-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Extend workaround for erratum DDR_A003 to other SoCs
York Sun [Mon, 25 Mar 2013 07:30:11 +0000 (07:30 +0000)]
powerpc/mpc85xx: Extend workaround for erratum DDR_A003 to other SoCs

Erratum DDR_A003 applies to P5020, P3041, P4080, P3060, P2041, P5040.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p1010rdb: add readme document for p1010rdb
Shengzhou Liu [Mon, 25 Mar 2013 07:30:10 +0000 (07:30 +0000)]
powerpc/p1010rdb: add readme document for p1010rdb

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p1010rdb: Change flexcan compatible string
Shengzhou Liu [Mon, 25 Mar 2013 07:30:09 +0000 (07:30 +0000)]
powerpc/p1010rdb: Change flexcan compatible string

Change flexcan compatible string from "fsl,flexcan-v1.0"
to "fsl,p1010-flexcan" to match the device tree.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/85xx: add SerDes bank 4 lanes
Timur Tabi [Mon, 25 Mar 2013 07:30:08 +0000 (07:30 +0000)]
powerpc/85xx: add SerDes bank 4 lanes

Only some chips have four SerDes banks, so don't define lanes for a bank
that doesn't exist.

Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoqoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020
Zhicheng Fan [Mon, 25 Mar 2013 07:30:07 +0000 (07:30 +0000)]
qoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020

Resolve P1020 second USB controller multiplexing with eLBC
         - mandatory to mention USB2 in hwconfig string to select it
           over eLBC, otherwise USB2 node is removed
         - works only for SPI and SD boot

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Zhicheng Fan <B32736@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agodoc/ramboot.mpc85xx: Documented the RAMBOOT for MPC85xx
Poonam Aggrwal [Mon, 25 Mar 2013 07:30:06 +0000 (07:30 +0000)]
doc/ramboot.mpc85xx: Documented the RAMBOOT for MPC85xx

There could be scenarios where the user would like to manually(via JTAG)
configure the DDR/L2SRAM and load the bootloader binary onto DDR/L2SRAM.
This document explains thse usecases and the detailed explanation of what needs
to be done to use it.

Most of the code from CONFIG_SYS_RAMBOOT will be used except for small changes
of CCSRBAR etc.

The changes are not very large, but it is good to document them so that user
can get it working at once.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx:IFC Errata A003399 is not valid for BSC913x
Prabhakar Kushwaha [Wed, 20 Mar 2013 18:36:06 +0000 (18:36 +0000)]
powerpc/mpc85xx:IFC Errata A003399 is not valid for BSC913x

As per Errata list of BSC9131 and BSC9132, IFC Errata A003399 is no more
valid. So donot compile its workaround.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agompc85xx: Fix a compiler warning when CONFIG_WATCHDOG is turned on
Horst Kronstorfer [Wed, 13 Mar 2013 10:14:05 +0000 (10:14 +0000)]
mpc85xx: Fix a compiler warning when CONFIG_WATCHDOG is turned on

cpu.c:288:2:
warning: implicit declaration of function 'reset_85xx_watchdog'
[-Wimplicit-function-declaration]

Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)
Xulei [Mon, 11 Mar 2013 17:56:34 +0000 (17:56 +0000)]
powerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)

On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2.

In formal release document, the errata number should be USB14 instead of USB138.

Signed-off-by: xulei <Lei.Xu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: xulei <B33228@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/b4860qds: Add the tlb entries for SRIO interfaces
Liu Gang [Thu, 7 Mar 2013 22:41:02 +0000 (22:41 +0000)]
powerpc/b4860qds: Add the tlb entries for SRIO interfaces

Add the tlb entries based on the configuration of the SRIO interfaces.
Every SRIO interface has 256M space:

#define CONFIG_SYS_SRIO1_MEM_VIRT   0xa0000000
#define CONFIG_SYS_SRIO1_MEM_PHYS   0xc20000000ull

#define CONFIG_SYS_SRIO2_MEM_VIRT   0xb0000000
#define CONFIG_SYS_SRIO2_MEM_PHYS   0xc30000000ull

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agofman/mEMAC: set SETSP bit in IF_MODE regisgter for RGMII speed
Zang Roy-R61911 [Mon, 4 Mar 2013 03:59:20 +0000 (03:59 +0000)]
fman/mEMAC: set SETSP bit in IF_MODE regisgter for RGMII speed

Some legacy RGMII phys don't have in band signaling for the
speed information. so set the RGMII MAC mode according to
the speed got from PHY.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Reported-by: John Traill <john.traill@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: set clock-frequency for T4/B4 clockgen node
Tang Yuantian [Thu, 28 Feb 2013 23:24:34 +0000 (23:24 +0000)]
powerpc/mpc85xx: set clock-frequency for T4/B4 clockgen node

For T4/B4, the clockgen node compatible string is updated to version 2.
Add clock-frequency setting for this new version.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/b4860: Adding workaround errata A-005871
Shengzhou Liu [Wed, 27 Feb 2013 21:56:54 +0000 (21:56 +0000)]
powerpc/b4860: Adding workaround errata A-005871

Per the latest errata updated, B4860/B4420 Rev 1.0 has also
errata A-005871, so adding define A-005871 for B4 SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/b4: Fix the wrong register offset of B4 PCIE module
Liu Gang [Mon, 25 Feb 2013 00:14:17 +0000 (00:14 +0000)]
powerpc/b4: Fix the wrong register offset of B4 PCIE module

B4420/B4860 PCIE can not work because of the wrong definition of
the PCIE register offset in the file:
arch/powerpc/include/asm/immap_85xx.h

Add the judgement of B4420/B4860 to make the register offset to:
#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0x200000

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/p1022ds: Add support for NAND and NAND boot using SPL
Matthew McClintock [Mon, 18 Feb 2013 10:02:19 +0000 (10:02 +0000)]
powerpc/p1022ds: Add support for NAND and NAND boot using SPL

Add defines needed to access NAND, remove second flash bank that is
actually connected to NAND.

Add nand booting support for P1022DS with hardcoded DDR config using
SPL framework from 2011

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: add setting of clock-frequency for mpic node
Dongsheng.wang@freescale.com [Wed, 30 Jan 2013 18:51:52 +0000 (18:51 +0000)]
powerpc/mpc85xx: add setting of clock-frequency for mpic node

Set the device tree property associated with the mpic source
frequency. The frequency is used for mpic timer.

Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agopowerpc/mpc85xx: Add revision properties in portal device tree node 'pme'
Jeffrey Ladouceur [Fri, 25 Jan 2013 10:38:53 +0000 (10:38 +0000)]
powerpc/mpc85xx: Add revision properties in portal device tree node 'pme'

The 'fsl,pme-rev1' and 'fsl-pme-rev2' properties have been added to the
pme portal node. This is required for software to determine which version
of PME hardware is present and take appropriate actions.
These properties are a direct reflection of the corresponding ccsr pme
register value.

Also removed unnecessary static global variables.

Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoboard/freescale/common/cds_pci_ft.c: Fix rotate wrong cells in interrupt-map property
Jiang Bin [Mon, 19 Nov 2012 22:31:24 +0000 (22:31 +0000)]
board/freescale/common/cds_pci_ft.c: Fix rotate wrong cells in interrupt-map property

For linux 3.x, the size of each item in interrupt-map property is 9 not 7.
Don't use the static value and calculate the size with following cells:
PCI #address-cells, PCI #interrupt-cells,
PIC address, PIC #address-cells, PIC #interrupt-cells.

Signed-off-by: Bin Jiang <bin.jiang@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc5xxx
Tom Rini [Thu, 2 May 2013 20:21:20 +0000 (16:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

11 years agompc5200: a3m071/a4m2k: Miscellaneous updates and fixes
Stefan Roese [Thu, 25 Apr 2013 23:20:23 +0000 (23:20 +0000)]
mpc5200: a3m071/a4m2k: Miscellaneous updates and fixes

The changes to a3m071/a4m2k in summary are:
- Enable CAN1 on I2C in GPS Port Configuration
- Enable SPI on PSC2
- Activate network console
- New flash partitioning
- Fix some typos
- Pass host name to Linux
- Change rootfs to squashfs,jffs2
- Enable UBI/UBIFS support
- Enable FIT support

Signed-off-by: Stefan Roese <sr@denx.de>
11 years agompc5200: a3m071/a4m2k: Fix problem with increased global_data struct
Stefan Roese [Thu, 25 Apr 2013 23:10:02 +0000 (23:10 +0000)]
mpc5200: a3m071/a4m2k: Fix problem with increased global_data struct

The v2013.04 release has this patch set included:

5cb48582 "Add architecture-specific global data"

With this, the global_data struct is now common and new variables
have been added. Resulting in a bigger struct. Unfortunately the
currently allocated 128 bytes are just a bit too small for this
new struct.

This patch now uses the automatically generated struct size instead to
not run into this problem again.

Please note that this problem might hit some other platforms which
currently reserve a tight space of 128 bytes for the global_data
struct!

Signed-off-by: Stefan Roese <sr@denx.de>
11 years agompc5200: a3m071/a4m2k: Enable flash verify option
Stefan Roese [Thu, 4 Apr 2013 03:55:42 +0000 (03:55 +0000)]
mpc5200: a3m071/a4m2k: Enable flash verify option

Signed-off-by: Stefan Roese <sr@denx.de>
11 years agompc512x: remove dead code
Anatolij Gustschin [Sat, 30 Mar 2013 09:26:36 +0000 (09:26 +0000)]
mpc512x: remove dead code

The prt_mpc512x_clks() function isn't referenced
anywhere and its prototype is wrong. Remove it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
11 years agoomap5_uevm: Enable redundant MMC environment
Tom Rini [Tue, 30 Apr 2013 20:04:17 +0000 (16:04 -0400)]
omap5_uevm: Enable redundant MMC environment

Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agomx28evk: Guard NAND-related ENV defines with CONFIG_ENV_IS_IN_NAND
Tom Rini [Tue, 30 Apr 2013 20:00:15 +0000 (16:00 -0400)]
mx28evk: Guard NAND-related ENV defines with CONFIG_ENV_IS_IN_NAND

The redundancy related defines are only correct for NAND, so guard all
of that area with CONFIG_ENV_IS_IN_NAND

Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoenv_mmc: add support for redundant environment
Michael Heimpold [Wed, 10 Apr 2013 10:36:19 +0000 (10:36 +0000)]
env_mmc: add support for redundant environment

This patch add support for storing the environment redundant on
mmc devices. Substantially it re-uses the logic from the NAND implementation,
that means using an incremental counter for marking newer data.

Signed-off-by: Michael Heimpold <mhei@heimpold.de>
11 years agolib: consolidate hang()
Andreas Bießmann [Thu, 18 Apr 2013 22:48:50 +0000 (22:48 +0000)]
lib: consolidate hang()

Delete all occurrences of hang() and provide a generic function.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
[trini: Modify check around puts() in hang.c slightly]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agotx25: add CONFIG_SPL_LIBGENERIC_SUPPORT
Andreas Bießmann [Thu, 18 Apr 2013 22:48:49 +0000 (22:48 +0000)]
tx25: add CONFIG_SPL_LIBGENERIC_SUPPORT

In order to use the generic hang() later on pull libgeneric in SPL.
This has no impact on the SPL size.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agomx31pdk: add CONFIG_SPL_LIBGENERIC_SUPPORT
Andreas Bießmann [Thu, 18 Apr 2013 22:48:48 +0000 (22:48 +0000)]
mx31pdk: add CONFIG_SPL_LIBGENERIC_SUPPORT

In order to use the generic hang() later on pull libgeneric in SPL.
This has no impact on the SPL size.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agonios2: fix style in board.c.
Andreas Bießmann [Thu, 18 Apr 2013 22:48:47 +0000 (22:48 +0000)]
nios2: fix style in board.c.

Make nios2's board.c checkpatch clean.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agomicroblaze: fix style in board.c
Andreas Bießmann [Thu, 18 Apr 2013 22:48:46 +0000 (22:48 +0000)]
microblaze: fix style in board.c

Make microblaze's board.c checkpatch clean.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Michal Simek <monstr@monstr.eu>
11 years agopart/dev_desc: Add log2 of blocksize to block_dev_desc data struct
Egbert Eich [Tue, 9 Apr 2013 21:11:56 +0000 (21:11 +0000)]
part/dev_desc: Add log2 of blocksize to block_dev_desc data struct

log2 of the device block size serves as the shift value used to calculate
the block number to read in file systems when implementing avaiable block
sizes.
It is needed quite often in file systems thus it is pre-calculated and
stored in the block device descriptor.

Signed-off-by: Egbert Eich <eich@suse.com>