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11 years agoexynos: change indentation of defines in cpu.h
Minkyu Kang [Mon, 1 Apr 2013 19:22:40 +0000 (19:22 +0000)]
exynos: change indentation of defines in cpu.h

Fix the indentation of some defines by tab.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: pwm: Remove dead code of function exynos5_get_pwm_clk
Akshay Saraswat [Thu, 28 Mar 2013 04:32:24 +0000 (04:32 +0000)]
Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk

As we shall now be using clock_get_periph_rate function.
We find no reason for keeping code in function exynos5_get_pwm_clk.
Hence, removing it.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: pwm: Use generic api to get pwm clk freq
Padmavathi Venna [Thu, 28 Mar 2013 04:32:23 +0000 (04:32 +0000)]
Exynos: pwm: Use generic api to get pwm clk freq

Use generic api to get the pwm clock frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: clock: Correct pwm source clk selection
Padmavathi Venna [Thu, 28 Mar 2013 04:32:22 +0000 (04:32 +0000)]
Exynos: clock: Correct pwm source clk selection

MPLL is selected as the source clk of pwm by default

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: clock: Add generic api to get the clk freq
Padmavathi Venna [Thu, 28 Mar 2013 04:32:21 +0000 (04:32 +0000)]
Exynos: clock: Add generic api to get the clk freq

Add generic api to get the frequency of the required peripherial. This
API gets the source clock frequency and returns the required frequency
by dividing with first and second dividers based on the requirement.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: Add peripherial id for pwm
Padmavathi Venna [Sun, 31 Mar 2013 18:42:24 +0000 (18:42 +0000)]
Exynos: Add peripherial id for pwm

Add peripherial id for pwm inorder to support
generic api to get the clk frequency

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: Tidy up the pwm_config function in the exynos pwm driver
Gabe Black [Thu, 28 Mar 2013 04:32:20 +0000 (04:32 +0000)]
Exynos: Tidy up the pwm_config function in the exynos pwm driver

Some small fixes in the exynos pwm driver:

1. NS_IN_HZ is non-sensical since these are not compatible units. This
constant actually describes the number of nanoseconds in a second. Renamed it
to NS_IN_SEC. Also dropped the unnecessary parenthesis.
2. The variable "period" is not used to hold a period, it's used to hold a
frequency. Renamed it to "frequency".
3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if
which checks that condition will never execute. Also, there should be no
problem if the pwm never switches, so there's no reason to subtract one from
tcmp and therefore no reason to compare it against zero. Removed both ifs. If
they weren't removed, tcmp should be a signed value.
4. Add a check for a 0 period.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
Gabe Black [Thu, 28 Mar 2013 04:32:19 +0000 (04:32 +0000)]
Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4

The pwm_config function in the exynos pwm driver divides by its period
period parameter. A function was calling pwm_config with a 0ns period and a
0ns duty cycle. That doesn't actually make any sense physically, and results
in a divide by zero in the driver. This change changes the parameters to be a
100000ns period and duty cycle.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: pwm: Fix two bugs in the exynos pwm configuration code
Gabe Black [Thu, 28 Mar 2013 04:32:18 +0000 (04:32 +0000)]
Exynos: pwm: Fix two bugs in the exynos pwm configuration code

First, the "div" value was being used incorrectly to compute the frequency of
the PWM timer. The value passed in is a constant which reflects the value
that would be found in a configuration register, 0 to 4. That should
correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was
being used instead.

Second, the reset value of the timers were being calculated to give an overall
frequency, thrown out, and set to a maximum value. This was done so that PWM 4
could be used as the system clock by counting down from a high value, but it
was applied indiscriminantly. It should at most be applied only to PWM 4.

This change also takes the opportunity to tidy up the pwm_init function.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained
Build and boot U-boot with this patch, backlight works properly.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: Add timer_get_us function
Che-Liang Chiou [Thu, 28 Mar 2013 04:32:17 +0000 (04:32 +0000)]
Exynos: Add timer_get_us function

timer_get_us returns the time in microseconds since a certain reference
point of history.  However, it does not guarantee to return an accurate
time after a long period; instead, it wraps around (that is, the
reference point is reset to some other point of history) after some
periods. The frequency of wrapping around is about an hour (or 2^32
microseconds).

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: Change get_timer() to work correctly
Simon Glass [Thu, 28 Mar 2013 04:32:16 +0000 (04:32 +0000)]
Exynos: Change get_timer() to work correctly

At present get_timer() does not return sane values. It should count up
smoothly in milliscond intervals.

We can change the PWM to count down at 1MHz, providing a resolution
of 1us and a range of about an hour between required get_timer() calls.

Test with command "sf probe 1:0; time sf read 40008000 0 1000".
Try with different numbers of bytes and see that sane values are obtained

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos5: config: enable time command
Akshay Saraswat [Thu, 28 Mar 2013 04:32:15 +0000 (04:32 +0000)]
Exynos5: config: enable time command

This patch enables time command.

Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos5: clock: Fix a typo bug in exynos clock init
Akshay Saraswat [Thu, 21 Mar 2013 02:13:13 +0000 (02:13 +0000)]
Exynos5: clock: Fix a typo bug in exynos clock init

We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating any big issue. But it is better to fix this error for better
readability of the code.

Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoExynos: config: Enable hash command
Akshay Saraswat [Wed, 20 Mar 2013 21:00:59 +0000 (21:00 +0000)]
Exynos: config: Enable hash command

This enables hash command.

Tested with command "hash sha256 0x40008000 0x2B 0x40009000".
Used mm and md to write a standard string to memory location
0x40008000 and ran the above command to verify the output.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agogen: Add sha h/w acceleration to hash
Akshay Saraswat [Wed, 20 Mar 2013 21:00:58 +0000 (21:00 +0000)]
gen: Add sha h/w acceleration to hash

Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoExynos: config: Enable ACE HW for SHA 256 for Exynos
Akshay Saraswat [Wed, 20 Mar 2013 21:00:57 +0000 (21:00 +0000)]
Exynos: config: Enable ACE HW for SHA 256 for Exynos

This enables SHA 256 for exynos.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoExynos: Add hardware accelerated SHA256 and SHA1
Akshay Saraswat [Wed, 20 Mar 2013 21:00:56 +0000 (21:00 +0000)]
Exynos: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using ACE hardware.

Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoExynos: clock: Fix a bug in PLL lock check condition
Akshay Saraswat [Fri, 15 Mar 2013 02:29:09 +0000 (02:29 +0000)]
Exynos: clock: Fix a bug in PLL lock check condition

The condition for testing of PLL getting locked was incorrect. Rectify
this error in this patch.

Reported-by: Alexei Fedorov <alexie.fedorov@arm.com>
Signed-off-by: Hatim Ali <hatim.rv@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agospl:falcon:trats: Fix SPL image size computing.
Przemyslaw Marczak [Tue, 12 Mar 2013 03:41:49 +0000 (03:41 +0000)]
spl:falcon:trats: Fix SPL image size computing.

"spl_imgsize" was set as decimal variable by "setexpr"
and this causes wrong image size written by "ext4write".
Preset this val with "0x" prefix allow to fix this issue.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agospi: exynos: Fix compiler warnings for non-dt systems
Vivek Gautam [Tue, 5 Mar 2013 03:49:57 +0000 (03:49 +0000)]
spi: exynos: Fix compiler warnings for non-dt systems

Enclosing process_nodes() and spi_get_config() inside
CONFIG_OF_CONTROL, since they are compiled only for DT systems.

This fixes following warning:
exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function]

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoSMDK5250: Fix compiler warning for non-dt systems
Vivek Gautam [Tue, 5 Mar 2013 03:49:56 +0000 (03:49 +0000)]
SMDK5250: Fix compiler warning for non-dt systems

Compiling for non-dt systems gives folowing warning:
smdk5250.c: In function 'board_eth_init':
smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable]

Declare variable 'node' only for dt enabled systems to remove this
warning.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoSMDK5250: Use statically defined structures only in non DT case
Ajay Kumar [Thu, 21 Feb 2013 23:53:09 +0000 (23:53 +0000)]
SMDK5250: Use statically defined structures only in non DT case

Since we have DT support in exynos_fb and exynos_dp drivers now,
we need not define any static structure or platform data related to
display in the board file smdk5250.c.
So, we place the already existing structures inside #ifndef CONFIG_OF_CONTROL block.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoSMDK5250: Add device node for DP
Ajay Kumar [Thu, 21 Feb 2013 23:53:08 +0000 (23:53 +0000)]
SMDK5250: Add device node for DP

Add DT bindings for DP supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Add device node for DP
Ajay Kumar [Thu, 21 Feb 2013 23:53:07 +0000 (23:53 +0000)]
EXYNOS5: Add device node for DP

Add DT node and bindings documentaion for DP.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_dp: Add function to parse DP DT node
Ajay Kumar [Thu, 21 Feb 2013 23:53:06 +0000 (23:53 +0000)]
video: exynos_dp: Add function to parse DP DT node

Add function to parse the required platform data fron DP DT node
and fill the edp_info structure.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: FDT: Add compatible strings for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:05 +0000 (23:53 +0000)]
EXYNOS5: FDT: Add compatible strings for FIMD

Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_dp: Make dp_regs global
Ajay Kumar [Thu, 21 Feb 2013 23:53:04 +0000 (23:53 +0000)]
video: exynos_dp: Make dp_regs global

dp_regs variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it once using exynos_dp_set_base_addr().
>From then on, other funtions can use the address stored in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoSMDK5250: Add device node for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:03 +0000 (23:53 +0000)]
SMDK5250: Add device node for FIMD

Add DT bindings for FIMD supporting an eDP panel of size 2560x1600.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Add device node for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:02 +0000 (23:53 +0000)]
EXYNOS5: Add device node for FIMD

Add DT node and bindings documentation for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_fb: add DT support for FIMD driver
Ajay Kumar [Thu, 21 Feb 2013 23:53:01 +0000 (23:53 +0000)]
video: exynos_fb: add DT support for FIMD driver

Add function to parse FIMD data from device tree.
The driver still supports non-DT case.
Define panel_info statically in some file if you are not using DT.
If you have defined DT node for FIMD, panel_info will be filled
using the bindings of FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS: FDT: Add compatible strings for FIMD
Ajay Kumar [Thu, 21 Feb 2013 23:53:00 +0000 (23:53 +0000)]
EXYNOS: FDT: Add compatible strings for FIMD

Add required compatible information for FIMD.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_fb: Make fimd_ctrl global
Ajay Kumar [Thu, 21 Feb 2013 23:52:59 +0000 (23:52 +0000)]
video: exynos_fb: Make fimd_ctrl global

fimd_ctrl variable was redundantly defined across all the functions in
the driver even though it contains just the same address. We make it
global and initialize it in exynos_fimd_lcd_init. From then on, other
funtions can use the data in the global variable.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_dp: Remove callbacks from the driver
Ajay Kumar [Thu, 21 Feb 2013 23:52:58 +0000 (23:52 +0000)]
video: exynos_dp: Remove callbacks from the driver

Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agovideo: exynos_fb: Remove callbacks from the driver
Ajay Kumar [Thu, 21 Feb 2013 23:52:57 +0000 (23:52 +0000)]
video: exynos_fb: Remove callbacks from the driver

Replaced the functionality of callbacks by using a standard set of functions.
Instead of implementing and hooking up a callback, put the same code in one of
the standard set of functions by overriding it.

This patch is tested only on SMDK5250.
For Trats and universal_c210 board, it is only compile tested.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoEXYNOS5: Add L2 Cache Support.
Rajeshwari Shinde [Thu, 29 Nov 2012 20:29:35 +0000 (20:29 +0000)]
EXYNOS5: Add L2 Cache Support.

This patch set adds L2 Cache Support to EXYNOS.

Signed-off-by: Arun Mankuzhi <arun.m@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
11 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 26 Mar 2013 09:40:13 +0000 (10:40 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

11 years agoMerge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 26 Mar 2013 08:51:09 +0000 (09:51 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'

11 years agoTegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards
Tom Warren [Mon, 18 Mar 2013 21:52:26 +0000 (14:52 -0700)]
Tegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boards

Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: MMC: Add SD bus power-rail init routine
Tom Warren [Mon, 18 Mar 2013 21:51:20 +0000 (14:51 -0700)]
Tegra114: MMC: Add SD bus power-rail init routine

T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
Tom Warren [Mon, 18 Mar 2013 21:47:55 +0000 (14:47 -0700)]
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table

SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup
before the MMC driver is added.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Tom Warren [Mon, 18 Mar 2013 21:46:46 +0000 (14:46 -0700)]
Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)

Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: dalmore: config: enable SPI
Allen Martin [Sat, 16 Mar 2013 18:58:14 +0000 (18:58 +0000)]
tegra114: dalmore: config: enable SPI

Turn on SPI in dalmore config file

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: add SPI driver
Allen Martin [Sat, 16 Mar 2013 18:58:13 +0000 (18:58 +0000)]
tegra114: add SPI driver

Add driver for tegra114 SPI controller.  This controller is not
compatible with either the tegra20 or tegra30 controllers, so it
requires a new driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: dalmore: fdt: enable dalmore SPI controller
Allen Martin [Sat, 16 Mar 2013 18:58:12 +0000 (18:58 +0000)]
tegra114: dalmore: fdt: enable dalmore SPI controller

Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: fdt: add SPI blocks
Allen Martin [Sat, 16 Mar 2013 18:58:11 +0000 (18:58 +0000)]
tegra114: fdt: add SPI blocks

Add nodes for t114 SPI controller hardware

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: fdt: add apbdma block
Allen Martin [Sat, 16 Mar 2013 18:58:10 +0000 (18:58 +0000)]
tegra114: fdt: add apbdma block

Add node for apbdma controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra114: fdt: add compatible string for tegra114 SPI ctrl
Allen Martin [Sat, 16 Mar 2013 18:58:09 +0000 (18:58 +0000)]
tegra114: fdt: add compatible string for tegra114 SPI ctrl

Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agosf: winbond: add W25Q32DW
Allen Martin [Sat, 16 Mar 2013 18:58:08 +0000 (18:58 +0000)]
sf: winbond: add W25Q32DW

Add support for Winbond W25Q32DW 32Mbit part

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agospi: add common fdt SPI driver interface
Allen Martin [Sat, 16 Mar 2013 18:58:07 +0000 (18:58 +0000)]
spi: add common fdt SPI driver interface

Add a common interface to fdt based SPI drivers.  Each driver is
represented by a table entry in fdt_spi_drivers[].  If there are
multiple SPI drivers in the table, the first driver to return success
from spi_init() will be registered as the SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra20: spi: move fdt probe to spi_init
Allen Martin [Sat, 16 Mar 2013 18:58:06 +0000 (18:58 +0000)]
tegra20: spi: move fdt probe to spi_init

Make the tegra20 SPI driver similar to the tegra30 (and soon to be
tegra114) SPI drivers in preparation of common fdt SPI driver front
end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: spi: pull register structs out of headers
Allen Martin [Sat, 16 Mar 2013 18:58:05 +0000 (18:58 +0000)]
tegra: spi: pull register structs out of headers

Move register structs from headers into .c files and use common name.
This is in preparation of making common fdt front end for SPI
drivers.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: spi: remove non fdt support
Allen Martin [Sat, 16 Mar 2013 18:58:04 +0000 (18:58 +0000)]
tegra: spi: remove non fdt support

Remove non fdt support from tegra20 and tegra30 SPI drivers in
preparation of new common fdt based SPI driver front end.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: spi: rename tegra SPI drivers
Allen Martin [Sat, 16 Mar 2013 18:58:03 +0000 (18:58 +0000)]
tegra: spi: rename tegra SPI drivers

Rename tegra SPI drivers to tegra20_flash and tegra20_slink in
preparation for commonization and addition of tegra114_spi.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: remove support for UART SPI switch
Allen Martin [Sat, 16 Mar 2013 18:58:02 +0000 (18:58 +0000)]
tegra: remove support for UART SPI switch

This feature was only used for tegra20 seaboard that had a pinmux
conflict on the SPI pins.  These boards were never manufactured, so
remove this support to clean up SPI driver.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoMerge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Sun, 24 Mar 2013 16:52:22 +0000 (17:52 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

11 years agommc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used
Peter Korsgaard [Thu, 21 Mar 2013 04:00:04 +0000 (04:00 +0000)]
mmc: omap_hsmmc.c: only register getcd/getwp callbacks if gpio could be used

Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1

(and undefined behaviour as the -1 error code is interpreted as gpio value)

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
11 years agommc: mmc_getcd/getwp: use sensible defaults
Peter Korsgaard [Thu, 21 Mar 2013 04:00:03 +0000 (04:00 +0000)]
mmc: mmc_getcd/getwp: use sensible defaults

Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.

Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
[trini: Add braces around first if test in each case to fix warning]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoarm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms
Tom Rini [Thu, 14 Mar 2013 06:49:04 +0000 (06:49 +0000)]
arm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms

All of these platforms have memory starting at 0x80000000, so this is
the correct CONFIG_STANDALONE_LOAD_ADDR for all of them.

Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoam335x_evm: Add better timings for the new BeagleBoard DDR3 part
Tom Rini [Thu, 21 Mar 2013 04:30:02 +0000 (04:30 +0000)]
am335x_evm: Add better timings for the new BeagleBoard DDR3 part

Tested-by: Rao Bodapati <rao@circuitco.com>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoti814x_evm: add ti814x evm board support
Matt Porter [Fri, 15 Mar 2013 10:07:10 +0000 (10:07 +0000)]
ti814x_evm: add ti814x evm board support

Add TI814X EVM board directory, config file, and MAINTAINERS
entry. Enable build.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Adapt to recent omap_hsmmc requirements, Matt re-tested]
Signed-off-by: Tom Rini <trini@ti.com>
11 years agons16550: enable quirks for ti814x
Matt Porter [Fri, 15 Mar 2013 10:07:09 +0000 (10:07 +0000)]
ns16550: enable quirks for ti814x

TI814X requires the same quirks as AM33XX to be enabled.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoam33xx: support ti814x mmc reference clock
Matt Porter [Fri, 15 Mar 2013 10:07:08 +0000 (10:07 +0000)]
am33xx: support ti814x mmc reference clock

TI814x has a 192MHz hsmmc reference clock. Select that clock rate
when building for TI814x.

Signed-off-by: Matt Porter <mporter@ti.com>
11 years agoam33xx: add dmm support to emif4 library
Matt Porter [Fri, 15 Mar 2013 10:07:07 +0000 (10:07 +0000)]
am33xx: add dmm support to emif4 library

Adds a config_dmm() routine to support TI814X DMM configuration.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoam33xx: add ti814x specific register definitions
Matt Porter [Fri, 15 Mar 2013 10:07:06 +0000 (10:07 +0000)]
am33xx: add ti814x specific register definitions

Support the ti814x specific register definitions within
arch-am33xx.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoam33xx: refactor am33xx mux support and add ti814x support
Matt Porter [Fri, 15 Mar 2013 10:07:05 +0000 (10:07 +0000)]
am33xx: refactor am33xx mux support and add ti814x support

AM33XX and TI814X have a similar mux though the pinmux register
layout and address space differ. Add a separate ti814x mux include
to support the TI814X-specific differences.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoam33xx: refactor am33xx clocks and add ti814x support
Matt Porter [Fri, 15 Mar 2013 10:07:04 +0000 (10:07 +0000)]
am33xx: refactor am33xx clocks and add ti814x support

Split clock.c for am335x and ti814x and add ti814x specific
clock support.

Signed-off-by: Matt Porter <mporter@ti.com>
11 years agoam33xx: refactor emif4/ddr to support multiple EMIF instances
Matt Porter [Fri, 15 Mar 2013 10:07:03 +0000 (10:07 +0000)]
am33xx: refactor emif4/ddr to support multiple EMIF instances

The AM33xx emif4/ddr support closely matches what is need to support
TI814x except that TI814x has two EMIF instances. Refactor all the
emif4 helper calls and the config_ddr() init function to use an
additional instance number argument.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoam33xx: convert defines from am33xx-specific to generic names
Matt Porter [Fri, 15 Mar 2013 10:07:02 +0000 (10:07 +0000)]
am33xx: convert defines from am33xx-specific to generic names

Eliminate AM33xx specific names to prepare for TI814x support
within AM33xx-land.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoam33xx: Add required includes to some omap/am33xx code
Tom Rini [Thu, 14 Mar 2013 11:15:25 +0000 (11:15 +0000)]
am33xx: Add required includes to some omap/am33xx code

- In arch/arm/cpu/armv7/omap-common/timer.c,
  drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files
  that the driver needs but had been relying on <config.h> to bring in.
- In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h>
- In am335x_evm.h and pcm051.h don't globally include
  <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h>
  as that is the only include which defines things the config uses.

Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
11 years agoigep00x0: Enable CONFIG_CMD_BOOTZ
Enric Balletbo i Serra [Fri, 15 Mar 2013 02:32:35 +0000 (02:32 +0000)]
igep00x0: Enable CONFIG_CMD_BOOTZ

With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default.  Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
11 years agoARM: AM33XX: Fix typo that causes an AM duplication in CPU name.
Enric Balletbo i Serra [Fri, 15 Mar 2013 01:35:37 +0000 (01:35 +0000)]
ARM: AM33XX: Fix typo that causes an AM duplication in CPU name.

Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see
something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
11 years agoam335x: Enable DDR PHY dynamic power down bit for DDR3 boards
Vaibhav Hiremath [Thu, 14 Mar 2013 21:11:16 +0000 (21:11 +0000)]
am335x: Enable DDR PHY dynamic power down bit for DDR3 boards

Enable DDR PHY dynamic power down bit, which enables
powering down the IO receiver when not performing read.

This also helps in reducing overall power consumption in
low power states (suspend/standby).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
11 years agoARM: tegra: enable workaround for ARM erratum 716044
Stephen Warren [Mon, 4 Mar 2013 13:29:41 +0000 (13:29 +0000)]
ARM: tegra: enable workaround for ARM erratum 716044

Tegra20 requires the workaround for this erratum. Enable it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
11 years agoARM: implement erratum 716044 workaround
Stephen Warren [Mon, 4 Mar 2013 13:29:40 +0000 (13:29 +0000)]
ARM: implement erratum 716044 workaround

Add common code to enable the workaround for ARM erratum 716044. This
will be enabled for Tegra.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
11 years agoam33xx:ddr:Fix config_sdram to work for all DDR
Steve Kipisz [Fri, 8 Mar 2013 07:40:58 +0000 (07:40 +0000)]
am33xx:ddr:Fix config_sdram to work for all DDR

The original write to sdram_config is correct for DDR3 but incorrect
for DDR2 so SPL was hanging. For DDR2, the write to sdram_config
should be after the writes to ref_ctrl. This was working for DDR3
because there was a write of 0x2800 to ref_ctrl before a write
to sdram_config.

Tested on: GP EVM 1.1A (DDR2), GP EVM 1.5A (DDR3),
           Beaglebone A6 (DDR2), Beagleone Blacd A4A (DDR3)

Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
11 years agoam335x_evm: Add more variables and switch to DT booting.
Koen Kooi [Thu, 14 Mar 2013 05:55:21 +0000 (05:55 +0000)]
am335x_evm: Add more variables and switch to DT booting.

Make bootcmd run findfdt so that we know what dtb file to load.  Add a
loadfdt command to load this file in.  Make mmcboot pass in ${fdtaddr}
and make the mmc section of bootcmd run loadfdt.

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoam335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env
Koen Kooi [Thu, 14 Mar 2013 05:55:20 +0000 (05:55 +0000)]
am335x_evm: Enable CMD_EXT4 and CMD_FS_GENERIC, add bootpart to env

The kernel is loaded from some form of ext[234] or FAT, depending on the
distribution used.  We add a bootpart variable to the environment so
that we can load from the correct mmc partition as well.  We leave
CONFIG_CMD_EXT2 for existing scripts that use ext2load.

Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoam335x_evm: add support for BeagleBone Black DT name
Koen Kooi [Thu, 14 Mar 2013 05:55:19 +0000 (05:55 +0000)]
am335x_evm: add support for BeagleBone Black DT name

Cc: Matt Porter <mporter@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Matt Porter <mporter@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Nishanth Menon <nm@ti.com>
11 years agoInitialise correct GPMC WAITx irq for AM33xx
Mark Jackson [Thu, 21 Feb 2013 02:49:38 +0000 (02:49 +0000)]
Initialise correct GPMC WAITx irq for AM33xx

Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Fix it such that WAIT0 irq is enabled instead.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agoAllow AM335x MPU core clock speed to be specified in the board config file
Mark Jackson [Mon, 4 Mar 2013 01:27:20 +0000 (01:27 +0000)]
Allow AM335x MPU core clock speed to be specified in the board config file

Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-

#define CONFIG_SYS_MPUCLK <desired clock freq in MHz>

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
11 years agocm-t35: add support for loading splash image from NAND
Nikita Kiryanov [Sat, 22 Dec 2012 21:03:48 +0000 (21:03 +0000)]
cm-t35: add support for loading splash image from NAND

Add support for loading splash image from NAND

Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
11 years agoARM: rpi_b: enable SD controller, add related env/cmds
Stephen Warren [Tue, 29 Jan 2013 16:37:42 +0000 (16:37 +0000)]
ARM: rpi_b: enable SD controller, add related env/cmds

Enable the SD controller driver for the Raspberry Pi. Enable a number
of useful MMC, partition, and filesystem-related commands. Set up the
environment to provide standard locations for loading a kernel, DTB,
etc. Provide a boot command that loads and executes boot.scr.uimg from
the SD card; this is written considering future extensibilty to USB
storage.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
11 years agommc: add bcm2835 driver
Stephen Warren [Tue, 29 Jan 2013 16:37:41 +0000 (16:37 +0000)]
mmc: add bcm2835 driver

This adds a simple driver for the BCM2835's SD controller.

Workarounds are implemented for:
* Register writes can't be too close to each-other in time, or they will
  be lost.
* Register accesses must all be 32-bit, so implement custom accessors.

This code was extracted from:
git://github.com/gonzoua/u-boot-pi.git master
which was created by Oleksandr Tymoshenko.

Portions of the code there were obviously based on the Linux kernel at:
git://github.com/raspberrypi/linux.git rpi-3.6.y
commit f5b930b "Main bcm2708 linux port" signed-off-by Dom Cobley.

swarren changed the following for upstream:
* Removed hack udelay()s in bcm2835_sdhci_raw_writel(); setting
  SDHCI_QUIRK_WAIT_SEND_CMD appears to solve the issues.
* Remove register logging from read*/write* functions.
* Sort out confusion with min/max_freq values passed to add_sdhci().
* Use more descriptive variable names and calculations in IO accessors.
* Simplified and commented twoticks_delay calculation.
* checkpatch fixes.

Cc: Andy Fleming <afleming@gmail.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Andy Fleming <afleming@gmail.com>
11 years agovideo: add a driver for the bcm2835
Stephen Warren [Tue, 29 Jan 2013 16:37:40 +0000 (16:37 +0000)]
video: add a driver for the bcm2835

The firmware running on the bcm2835 SoC's VideoCore CPU manages the
display controller. Add a simple "LCD" driver that communicates with the
firmware using the property mailbox protocol. This configures the
display and frame-buffer to match whatever physical resolution the
firmware chosen when booting, which is typically the native resolution
of the attached display device, presumably unless otherwise specified
in config.txt on the boot media.

Enable this driver in the Raspberry Pi board configuration.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
11 years agoARM: rpi_b: disable rpi_b dcache explicitly
Stephen Warren [Tue, 29 Jan 2013 16:37:39 +0000 (16:37 +0000)]
ARM: rpi_b: disable rpi_b dcache explicitly

There appears to be no implementation of flush_dcache_range() for
ARM1176, so explicitly disable dcache support to avoid references to
that function from the LCD core in the next patch. This was presumably
not noticed before simply because no drivers for the rpi_b were
attempting DMA.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
11 years agolcd: calculate line_length after lcd_ctrl_init()
Stephen Warren [Tue, 29 Jan 2013 16:37:38 +0000 (16:37 +0000)]
lcd: calculate line_length after lcd_ctrl_init()

When an LCD driver is actually driving a regular external display, e.g.
an HDMI monitor, the display resolution might not be known until the
display controller has initialized, i.e. during lcd_ctrl_init(). However,
lcd.c calculates lcd_line_length before calling this function, thus
relying on a hard-coded resolution in struct panel_info.

Instead, defer this calculation until after lcd_ctrl_init() has had the
chance to dynamically determine the resolution. This needs to happen
before lcd_clear(), since the value is used there.

grep indicates that no code outside lcd.c uses this lcd_line_length; in
particular, no lcd_ctrl_init() implementations read it.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
11 years agoARM: rpi_b: use bcm2835 mbox driver to get memory size
Stephen Warren [Tue, 29 Jan 2013 16:37:37 +0000 (16:37 +0000)]
ARM: rpi_b: use bcm2835 mbox driver to get memory size

The firmware running on the bcm2835 SoC's VideoCore CPU determines how
much of the system RAM is available for use by the ARM CPU. Previously,
U-Boot assumed that only 128MB was available, since this was the
smallest value configured by any public firmware. However, we can now
query the actual value at run-time from the firmware using the mbox
property protocol.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
11 years agoARM: bcm2835: add mailbox driver
Stephen Warren [Tue, 29 Jan 2013 16:37:36 +0000 (16:37 +0000)]
ARM: bcm2835: add mailbox driver

The BCM2835 SoC contains (at least) two CPUs; the VideoCore (a/k/a "GPU")
and the ARM CPU. The ARM CPU is often thought of as the main CPU.
However, the VideoCore actually controls the initial SoC boot, and hides
much of the hardware behind a protocol. This protocol is transported
using the SoC's mailbox hardware module.

Here, we add a very simplistic driver for the mailbox module, and define
a few structures for the property messages.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 18 Mar 2013 19:33:47 +0000 (15:33 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Mon, 18 Mar 2013 16:31:00 +0000 (12:31 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end.  We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.

Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h

Build tested for all of ARM and run-time tested on am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agousb: Add multiple controllers support for EHCI PCI
Vincent Palatin [Tue, 12 Mar 2013 03:45:31 +0000 (03:45 +0000)]
usb: Add multiple controllers support for EHCI PCI

Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Enable USB features for coreboot
Simon Glass [Wed, 6 Mar 2013 14:08:35 +0000 (14:08 +0000)]
x86: Enable USB features for coreboot

Enable PCI EHCI, storage, keyboard and Ethernet for USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agousb: usbeth: smsc95xx: remove EEPROM loaded check
Michael Spang [Wed, 6 Mar 2013 14:08:33 +0000 (14:08 +0000)]
usb: usbeth: smsc95xx: remove EEPROM loaded check

[port of Linux kernel commit bcd218be5aeb by Steve Glendinning]

The eeprom read & write commands currently check the E2P_CMD_LOADED_ bit is
set before allowing any operations.  This prevents any reading or writing
unless a correctly programmed EEPROM is installed.

Signed-off-by: Michael Spang <spang@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
11 years agousb: ehci: Fix aliasing issue in EHCI interrupt code
Vincent Palatin [Wed, 6 Mar 2013 14:08:32 +0000 (14:08 +0000)]
usb: ehci: Fix aliasing issue in EHCI interrupt code

The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agousb: ehci: Support interrupt transfers via periodic list
Patrick Georgi [Wed, 6 Mar 2013 14:08:31 +0000 (14:08 +0000)]
usb: ehci: Support interrupt transfers via periodic list

Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).

Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.

This provides support for USB keyboards using EHCI.

Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)

Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agousb: ehci: exynos: Enable non-dt path
Vivek Gautam [Wed, 6 Mar 2013 08:48:33 +0000 (14:18 +0530)]
usb: ehci: exynos: Enable non-dt path

Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agousb: ehci: exynos: Fix multiple FDT decode
Vivek Gautam [Wed, 6 Mar 2013 08:48:32 +0000 (14:18 +0530)]
usb: ehci: exynos: Fix multiple FDT decode

With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
11 years agoarm:trats: Use new ums command
Lukasz Majewski [Tue, 5 Mar 2013 11:10:18 +0000 (12:10 +0100)]
arm:trats: Use new ums command

This patch enables new "ums" command on Trats board

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
11 years agousb:gadget: USB Mass Storage Gadget support
Lukasz Majewski [Tue, 5 Mar 2013 11:10:17 +0000 (12:10 +0100)]
usb:gadget: USB Mass Storage Gadget support

This patch adds the USB Mass Storage Gadget to u-boot
New command called "ums" is implemented to provide access
to on-device embedded persistent memory.

USB Mass Storage is supposed to work on top of the USB
Gadget framework

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>
11 years agousb:composite: USB Mass Storage - f_mass_storage.c from Linux kernel
Piotr Wilczek [Tue, 5 Mar 2013 11:10:16 +0000 (12:10 +0100)]
usb:composite: USB Mass Storage - f_mass_storage.c from Linux kernel

The f_mass_storage.c source file from v2.6.36 Linux kernel.

commit 8876f5e7d3b2a320777dd4f6f5301d474c97a06c
Author: Michal Nazarewicz <m.nazarewicz@samsung.com>
Date:   Mon Jun 21 13:57:09 2010 +0200

USB: gadget: f_mass_storage: added eject callback

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Marek Vasut <marek.vasut@gmail.com>