Alex Kiernan [Tue, 29 May 2018 15:30:46 +0000 (15:30 +0000)]
fastboot: Rename fb_set_reboot_flag to fastboot_set_reboot_flag
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
all other fastboot code in the global name space. Fix the guards around
them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.
Move the weak implementation of fastboot_set_reboot_flag to fb_common.c
so we can call it from non-USB fastboot code.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Tue, 29 May 2018 15:30:45 +0000 (15:30 +0000)]
fastboot: Fix parameter types in _fb_nand_write
Compiling on a 64 bit target the arguments to _fb_nand_write are
incompatible:
drivers/fastboot/fb_nand.c: In function ‘_fb_nand_write’:
drivers/fastboot/fb_nand.c:101:42: warning: passing argument 3 of ‘nand_write_skip_bad’ from incompatible pointer type [-Wincompatible-pointer-types]
return nand_write_skip_bad(mtd, offset, &length, written,
^
In file included from drivers/fastboot/fb_nand.c:16:0:
include/nand.h:107:5: note: expected ‘size_t * {aka long unsigned int *}’ but argument is of type ‘unsigned int *’
int nand_write_skip_bad(struct mtd_info *mtd, loff_t offset, size_t *length,
^~~~~~~~~~~~~~~~~~~
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Tue, 29 May 2018 15:30:42 +0000 (15:30 +0000)]
fastboot: Correct dependencies in FASTBOOT_FLASH
Ensure that when selecting FASTBOOT_FLASH you end up with a buildable
configuration. Prior to this you could select NAND without MTDPARTS
and end up with an image which (surprisingly) excluded NAND.
Also fix dependencies on FASTBOOT_GPT_NAME/FASTBOOT_MBR_NAME which require
you have EFI_PARTITION/DOS_PARTITION enabled.
Delete redundant FASTBOOT_FLASH_NAND_DEV from Kconfig - it was only ever
used as a guard and the value was ignored in all cases, we're using
FASTBOOT_FLASH_NAND as the guard now.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Tue, 29 May 2018 15:30:41 +0000 (15:30 +0000)]
fastboot: Extract fastboot_okay/fail to fb_common.c
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented
so we can call them from a non-USB implementation.
Introduce fastboot_response which takes varargs parameters so we can
use it to generate formatted response strings. Refactor fastboot_okay/fail
to use it.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Alex Kiernan [Tue, 29 May 2018 15:30:39 +0000 (15:30 +0000)]
fastboot: Move fastboot to drivers/fastboot
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.
Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Philipp Tomsich [Thu, 24 May 2018 15:11:57 +0000 (17:11 +0200)]
rockchip: xhci: remove DTS parsing for PHY (which is unused)
The xhci wrapper-driver for Rockchip searches the DTS to find its
child node compatbile with 'rockchip,rk3399-usb3-phy' to retrieve the
base-address of the PHY. However, this is currently broken (and
always has been), returning NULL. However, the (wrongly) retrieved
base-address is never used.
We thus remove this code for now.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Bin Meng [Thu, 24 May 2018 06:40:50 +0000 (23:40 -0700)]
usb: xhci: Handle endianness in xhci_set_configuration()
In xhci_set_configuration(), 'Context Entries' field in the slot
context was cleared with mask LAST_CTX_MASK, but it should have
taken the endianness into consideration.
Bin Meng [Thu, 24 May 2018 06:40:49 +0000 (23:40 -0700)]
usb: xhci: Fix config fail of FS hub behind a HS hub with MTT
If a full speed hub connects to a high speed hub which supports MTT,
the MTT field of its slot context will be set to 1 when xHCI driver
setups an xHCI virtual device in xhci_setup_addressable_virt_dev().
Once usb core fetch its hub descriptor, and need to update the xHC's
internal data structures for the device, the HUB field of its slot
context will be set to 1 too, meanwhile MTT is also set before, this
will cause configure endpoint command fail. In the case, we should
clear MTT to 0 for full speed hub according to section 6.2.2.
This keeps in sync with Linux kernel commit: 096b110: usb: xhci: fix config fail of FS hub behind a HS hub with MTT
Bin Meng [Thu, 24 May 2018 06:40:48 +0000 (23:40 -0700)]
usb: xhci: Initialize dev_state to 0 in the input slot context
Per xHCI spec chapter 6.2.2 table 6-7, as input, software shall
initialize the dev_state field to '0'. Though this does not seem
to cause any issue with most xHC implementations, let's do this
to conform with the spec.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marek Vasut <marek.vasut@gmail.com> Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
Bin Meng [Thu, 24 May 2018 06:40:47 +0000 (23:40 -0700)]
usb: xhci: Set accurate add context flags when updating hub attributes
If a USB 3.0 hub is plugged into the root port of the xHC, the xHCI
driver will issue a 'Configure Endpoint' command to the xHC for it
to update its internal data structure for this hub device. The hub
attributes are in the slot context so we need tell xHC to update the
slot context by setting the add context flags of the input control
context to only cover the slot context.
At present the add context flags is or'ed with the slot context bit,
but it should really be accurately set to the slot context, as the
variable that holds the value of the add context flags comes from
whatever was set in the last command execution, which may contain
additional contexts that 'Configure Endpoint' command should not
touch. Some xHC implementations like x86 don't complain such, but
it was observed on Renesas RCar Gen3 platform that the RCar xHC
complains with a 'TRB error' completion codes as the response.
Reported-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marek Vasut <marek.vasut@gmail.com> Tested-by: Matthias Blankertz <matthias.blankertz@cetitec.com>
usb: xhci-rcar: deregister before deactivating clock
During the execution of xhci_deregister xHCI registers are accessed. If
the clock is already deactivated when xhci_deregister is called this can
lead to undefined behavior. Change the order to deregister the device
before deactivating the clock.
Alex Deymo [Mon, 28 May 2018 15:19:35 +0000 (17:19 +0200)]
Import Android's dt_table.h for DT image format
Android documentation defines the recommended image format for storing
DTB/DTBO files in a single dtbo.img image. This patch includes the
latest header file with the struct definitions for this format from
AOSP.
The header was adapted to U-Boot's coding style and the function
declarations were removed.
Signed-off-by: Alex Deymo <deymo@google.com>
[trini: Change SDPX tag location] Signed-off-by: Tom Rini <trini@konsulko.com>
Chris Packham [Sat, 26 May 2018 10:32:29 +0000 (22:32 +1200)]
configs: remove CONFIG_SYS_MVFS
This was being used by some Marvell boards to enable some file system
related features (many of which have already been moved to Kconfig).
Make the future migration of the final 2 or 3 config options easier by
expanding #define CONFIG_SYS_MVFS into the options that it enables and
remove CONFIG_SYS_MVFS.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Rick Chen [Tue, 29 May 2018 03:07:53 +0000 (11:07 +0800)]
board: ax25-ae350: Support cfi flash
Add smc_init() to get register base from dts and
deal with atfsmc020 controler initialzation job.
Write protect is enabled by default. So WP shall
be disabled when startup, then cfi flash can be
detected and erasing and writing can be executed.
Adp-ae3xx and adp-ag101p both do smc initilize job
in lowlevel_init.S and get register base fron
CONFIG_FTSMC020_BASE. They also can be moved those
codes to board stage. Remind them as todo jobs.
After that CONFIG_FTSMC020_BASE can be removed.
Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Mon, 28 May 2018 11:06:37 +0000 (19:06 +0800)]
efi_loader: Enable RISC-V support
We have almost all pieces needed to support RISC-V UEFI binaries in place already.
The only missing piece are ELF relocations for runtime code and
data.
This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER configuration
switch on RISC-V platforms.
Alexander Graf [Mon, 23 Apr 2018 05:59:48 +0000 (07:59 +0200)]
distro: Extend with RISC-V defines
While we don't have UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's copy the removable file paths
from the RISC-V edk2 port.
Also add the official VCI strings that contain the standardized RISC-V
architecture ID fields.
Alexander Graf [Mon, 23 Apr 2018 05:59:46 +0000 (07:59 +0200)]
riscv: Add board_quiesce_devices stub
This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.
Chris Packham [Sat, 26 May 2018 10:32:28 +0000 (22:32 +1200)]
configs: remove redundant comment sections
mv-common.h and mv-plug-common.h still had comments delimiting sections
of configuration options that have all been moved to Kconfig by previous
treewide efforts. Remove the redundant comment sections.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Sat, 26 May 2018 09:43:56 +0000 (21:43 +1200)]
configs: remove empty #ifdef block from mv-common.h
The last option guarded by this ifdef was removed in commit 68d534201733
("sf: Move SPI flash drivers to defconfig"). Remove the now empty
ifdef/endif block and the associated comment.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Fri, 25 May 2018 07:49:27 +0000 (15:49 +0800)]
arm64: mvebu: defconfig: enable CONFIG_AHCI_MVEBU
This patch enables the new ahci mvebu driver for marvell arm64 platform
SOCs(A3k and A8k). And since AHCI_MVEBU selects SCSI_AHCI, so
"CONFIG_SCSI_AHCI=y" is removed from those default config files.
Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Fri, 25 May 2018 07:49:26 +0000 (15:49 +0800)]
ata: ahci_mvebu: add scsi support
Mvebu AHCI is AHCI driver which uses SCSI under the hood.
This patch adjusts AHCI setup to support SCSI by creating
a SCSI device as a child. Since the functions of creating
SCSI device need the kconfig option DM_SCSI, so let
AHCI_MVEBU select DM_SCSI.
Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
ata: ahci_mvebu: a8040 a0: remove bad port register offsets workarounds
This workaround was added for A8040/7040 A0.
A8040/7040 A0 is no longer supported so this workaround
can be removed.
Signed-off-by: David Sniatkiwicz <davidsn@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Fri, 25 May 2018 07:49:24 +0000 (15:49 +0800)]
ata: mvebu: move mvebu sata driver to drivers/ata directory
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.
Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Roese <sr@denx.de>
Enable SDHCI interface on AP and CP0 in A80x0 DTS files
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Evan Wang <xswang@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
mvebu: pinctrl: Add SD/eMMC PHY selector to the driver
When the pin control driver selects SD/eMMC function for
a pin group, there is additional configuration to be done
for this case - switch the PHY to work with SDHCI interface.
This patch adds the missing functionality into the pin
control driver.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Evan Wang <xswang@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Evan Wang [Fri, 25 May 2018 06:20:51 +0000 (14:20 +0800)]
mvebu: pinctrl: sync compatible string with Linux 4.17-rc4
For pinctrl driver of mvebu, the compatible strings
supported are defined differently from Linux version.
The patch aligned the compatible string with
Linux 4.17-rc4.
Signed-off-by: Evan Wang <xswang@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Ley Foon Tan [Fri, 18 May 2018 10:03:12 +0000 (18:03 +0800)]
malloc: Use malloc simple before malloc is fully initialized in memalign()
Follow implementation in mALLOc(). Check GD_FLG_FULL_MALLOC_INIT flag and use
malloc_simple if GD_FLG_FULL_MALLOC_INIT is unset. Adjust the malloc bytes
to align with the requested alignment.
The original memalign() function will access mchunkptr struct to adjust the
alignment if there is misalignment happen, but mchunkptr struct is not being
initialized before full malloc is initialized. This cause the system crash.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Patrick Delaunay [Thu, 17 May 2018 13:24:05 +0000 (15:24 +0200)]
stm32mp1: add bsec driver
Add a MISC driver with read and write access to BSEC IP
(Boot and Security and OTP control)
- offset 0: shadowed values
- offset 0x80000000: OTP fuse box values (SAFMEM)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 12:50:46 +0000 (14:50 +0200)]
stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)
To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 17 May 2018 12:50:43 +0000 (14:50 +0200)]
serial: stm32: Fix bits defines name
Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
Sort defines by descendant order.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:42 +0000 (12:13 +0300)]
serial: serial_msm: added pinmux & config
Serial port configuration was missing from previous implementation.
It only worked because it was preconfigured by LK.
This patch configures the uart for 115200 8N1.
It also configures the pin mux for uart pins using DT bindings.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Wed, 16 May 2018 09:13:40 +0000 (12:13 +0300)]
mach-snapdragon: Introduce pinctrl driver
This patch adds pinmux and pinctrl driver for TLMM
subsystem in snapdragon chipsets.
Currently, supporting only 8016, but implementation is
generic and 8096 can be added easily.
Driver is using the generic dt-bindings and doesn't
introduce any new bindings (yet).
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:37 +0000 (12:13 +0300)]
serial: serial_msm: fail probe if settings clocks fails
Failure to set the clocks will causes data abort exception when
trying to write to AHB uart registers.
This patch ensures that we don't touch these registers if clock
setting failed.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:36 +0000 (12:13 +0300)]
db820c: set clk node to be probed before relocation
The clock and serial nodes are needed before relocation.
This patch ensures that the msm-serial driver will probe
and provide uart output before relocation.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 16:38:13 +0000 (19:38 +0300)]
PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources
Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 15:47:51 +0000 (18:47 +0300)]
ARM: qemu-arm: Bump RAM size in AArch64 MMU table
Now that PCI devices work with highmem-enabled QEMU emulation, bump up
the RAM size in the MMU tables to gain access to the full 255 GB of RAM
potential instead of the puny 3 GB.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 15:47:50 +0000 (18:47 +0300)]
PCI: dm: Ignore 64-bit memory regions if CONFIG_SYS_PCI_64BIT not set
Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
that when 'highmem' is not disabled, QEMU appends 64-bit a memory
resource to the PCI controller's regions property in DT in addition to
the 32-bit PCI memory window in low memory. And the current DT parsing
code picks the last (thus the 64-bit one) memory resource, whose address
eventually gets silently truncated to 32 bits because
CONFIG_SYS_PCI_64BIT is not set, which obviously causes PCI to break.
Avoid this problem by ignoring memory regions whose addresses are above
the 32-bit boundary when CONFIG_SYS_PCI_64BIT is not set.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:20 +0000 (11:57 +0200)]
tpm: add PCR authentication commands support
Add support for the TPM2_PCR_SetAuthPolicy and
TPM2_PCR_SetAuthValue commands.
Change the command file and the help accordingly.
Note: These commands could not be tested because the TPMs available
do not support them, however they could be useful for someone else.
The user is warned by the command help.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / u-boot / log