Anton Persson [Thu, 17 Mar 2016 08:38:21 +0000 (09:38 +0100)]
bootp: Prevent u-boot from using others responses.
In rare circumstances two dhcp clients may generate the same
bootp ID. If this happens it is vital that the client also checks
the hw address in the received response to prevent IP address conflicts.
Signed-off-by: Anton Persson <don.juanton@gmail.com>
Stephen Warren [Thu, 17 Mar 2016 03:42:24 +0000 (21:42 -0600)]
mmc: bcm2835: fix 64-bit build warning
Fixes:
drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’:
drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Stephen Warren [Thu, 17 Mar 2016 03:40:57 +0000 (21:40 -0600)]
ARM: bcm2835: fix 64-bit build warning in mbox
Fixes:
arch/arm/mach-bcm283x/mbox.c: In function ‘bcm2835_mbox_call_prop’:
arch/arm/mach-bcm283x/mbox.c:118:48: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
arch/arm/mach-bcm283x/mbox.c:126:29: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Thu, 17 Mar 2016 03:40:56 +0000 (21:40 -0600)]
ARM: bcm283x: don't always define CONFIG_BCM2835
Currently, CONFIG_BCM2835 is defined for all BCM283x builds and _BCM2836
is defined when building for that SoC. That means there isn't a single
define that means "exactly BCM2835". This will complicate future patches
where BCM2835-vs-anything-else needs to be determined simply.
Modify the code to define one or the other of CONFIG_BCM2835/BCM2836 so
future patches are simpler.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Wed, 16 Mar 2016 14:41:23 +0000 (15:41 +0100)]
RPi: Enable caches for rpi2
Now that we have support for running with caches enabled in HYP mode,
opt in to that on the Raspberry Pi 2. This brings a significant performance
boost.
Alexander Graf [Wed, 16 Mar 2016 14:41:22 +0000 (15:41 +0100)]
lcd: Fix compile warning in 64bit mode
When compiling the code for 64bit, the lcd code emits warnings because it
tries to cast pointers to 32bit values. Fix it by casting them to longs
instead, actually properly aligning with the function prototype.
Alexander Graf [Wed, 16 Mar 2016 14:41:21 +0000 (15:41 +0100)]
arm: Add support for HYP mode and LPAE page tables
We currently always modify the SVC versions of registers and only support
the short descriptor PTE format.
Some boards however (like the RPi2) run in HYP mode. There, we need to modify
the HYP version of system registers and HYP mode only supports the long
descriptor PTE format.
So this patch introduces support for both long descriptor PTEs and HYP mode
registers.
Alexander Graf [Wed, 16 Mar 2016 14:41:20 +0000 (15:41 +0100)]
arm64: Add 32bit arm compatible dcache definitions
We want to be able to reuse device drivers from 32bit code, so let's add
definitions for all the dcache options that 32bit code has.
While at it, fix up the DCACHE_OFF configuration. That was setting the bits
to declare a PTE a PTE and left the MAIR index bit at 0. Drop the useless
bits and make the index explicit.
Nishanth Menon [Tue, 15 Mar 2016 23:09:17 +0000 (18:09 -0500)]
board: ti: DRA7: Add DRA72-rev C evm pinmux
Add the pinmux data for rev C evm. This is different from previous
revisions of the platform thanks to the deltas introduced both from
silicon side and from SoC side.
Based on J6EcoES2_EVM_Base_Config-20160309b and PCT-DRA72x-v1.3.0.7 for
SR2.0 silicon.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 15 Mar 2016 23:09:15 +0000 (18:09 -0500)]
ARM: OMAP5/DRA7: Split iodelay functionality into sub steps
Since many platforms may need different pad configuration required
depending on variation of the platform with minor deltas, it is
easier to maintain a sub step based approach to allow for pin mux
and iodelay configuration which may depend on the platform variations
and need to be done in IO isolation.
While we retain the older __recalibrate_iodelay function which provides
a ready sequencing, __recalibrate_iodelay_start and
__recalibrate_iodelay_end may be alternatively used now and the callers
will be responsible for the correct sequencing of operations.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
DDR configuration has changes from SR1.1 based Rev-A/B version of evm
to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher
density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB.
Update the DDR configuration based on data from EMIF configuration
tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the
configuration.
Tested-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Tue, 15 Mar 2016 23:09:12 +0000 (18:09 -0500)]
ARM: DRA7: hwdata: Update ioreg data for DRA72 SR2.0
Based on data from EMIF configuration tool 1.1.1. Expected update for
CTRL_WKUP_EMIF1_SDRAM_CONFIG_EXT in the next revision of the tool has
been incorporated as well.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Sam Protsenko [Fri, 25 Mar 2016 14:39:47 +0000 (16:39 +0200)]
usb: gadget: Move CONFIG_USB_GADGET to Kconfig
The description was borrowed from kernel. "tristate" type was changed
to "bool" (I believe we don't support modules for u-boot yet, right?).
CONFIG_USB_GADGET requires CONFIG_USB to be defined too, so add it along
as well.
Definitions were added to defconfig files in a way that
"make savedefconfig" generates exactly the same file as used defconfig.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Add zynq_zc702 conversion] Signed-off-by: Tom Rini <trini@konsulko.com>
Kevin Smith [Tue, 16 Feb 2016 21:28:19 +0000 (21:28 +0000)]
tools: kwboot: Add xmodem timeout option
Add command-line specification of xmodem timeout. If the binary
header needs to take a while to do something (e.g. DDR ECC
scrubbing), the xmodem transfer can time out. Add a configurable
xmodem block timeout to allow transfers with slow binary headers
to succeed.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Kevin Smith [Tue, 16 Feb 2016 21:28:17 +0000 (21:28 +0000)]
tools: kwboot: Clean up usage text
Usage text was getting unwieldy and somewhat incorrect. The
usage summary implied that some options were mutually exclusive
(e.g. -q or -s). Clean up the summary to just include the
important ones, and include a generic "[OPTIONS]" instead.
Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Andreas Färber [Mon, 15 Feb 2016 18:13:30 +0000 (19:13 +0100)]
arm: mvebu: db-88f6820: Drop obsolete binary.0 placeholder
It has been superseded in kwbimage.cfg in favor of an SPL in commit 9e30b31d20f0b793465d07f056b3d9885f578c0d (arm: mvebu: db-88f6820: Add
SPL support with DDR init code). Found via code review.
Cc: Stefan Roese <sr@denx.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 12 Feb 2016 13:24:07 +0000 (14:24 +0100)]
arm: mvebu: theadorable: Add StratixV FPGA programming support
This patch adds support for Altera StratixV bitstream programming. 2 FPGAs
are connected to the SPI busses. This patch uses board specific write
code to program the bitstream via SPI direct write mode.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 12 Feb 2016 12:52:16 +0000 (13:52 +0100)]
arm: mvebu: Add some SPI CS attributes
These attribute defines may be used to map an area of memory for direct
access to the specific SPI devices. See SPI Direct Access Mode for
further information.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 12 Feb 2016 12:48:02 +0000 (13:48 +0100)]
fpga: altera: Add StratixV support
This patch adds support for programming of the StratixV FPGAs. Programming
is done in this case (board theadorable) via SPI. The board may provide
board specific code for bitstream programming.
This StratixV support will be used by the theadorable board.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 12 Feb 2016 12:46:50 +0000 (13:46 +0100)]
gpio: Add DM GPIO driver for Marvell MVEBU
This patch adds a DM GPIO driver for the Marvell MVEBU SoCs. There are
other non-DM drivers that might be used on these platforms. But this
patch creates a new DM driver. Which will be used by all Armada XP/38x
boards. Other MVEBU SoC (Kirkwood / Orion) may follow once they
support DM as well.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>
Peter Korsgaard [Sun, 17 Jan 2016 17:23:45 +0000 (18:23 +0100)]
ARM: sheevaplug: correct nand partition layout
Commit 1e3d640316 (ARM: sheevaplug: redefine MTDPARTS) changed the partition
layout (without any description why), but didn't change the offset/size to
load the kernel from or the root=/dev/mtdblockX in the bootargs.
The 3MB forseen for a kernel is furthermore too little. A 4.4 build of
mvebu_v5_defconfig is 3.6MB:
-rw-r--r-- 1 peko peko 3.6M Jan 16 20:24 uImage.kirkwood-sheevaplug
When device tree support for sheevaplug was added to the kernel in commit ee514b381e (ARM: Kirkwood: Add dts files for Sheevaplug and eSATA
Sheevaplug) a default flash partition layout (used if mtdparts= isn't passed
on the command line / CONFIG_MTD_CMDLINE_PARTS isn't enabled) with 1MB for
u-boot / environment, 4MB for the kernel and the rest for the rootfs, so use
that layout here and adjust the kernel loading to match.
Signed-off-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Stefan Roese <sr@denx.de>
vishnupatekar [Wed, 23 Mar 2016 17:54:33 +0000 (01:54 +0800)]
sunxi: A83T: fix 32bit overflow warning
In mctl_channel_init, (0x50<<26) which overflows 32bit.
It was supposed to be 0x50<<16,corrected now.
Reported-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 22 Mar 2016 21:51:52 +0000 (22:51 +0100)]
sunxi: Select CONFIG_OF_BOARD_SETUP from arch/arm/Kconfig
Always select OF_BOARD_SETUP on sunxi, rather then having it in almost
all our defconfigs. This also fixes it missing from some recently
added defconfigs.
This commit also modifies our ft_board_setup() to not cause warnings
when CONFIG_VIDEO_DT_SIMPLEFB is not set, since we will now always
build it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
vishnupatekar [Mon, 21 Mar 2016 14:28:56 +0000 (22:28 +0800)]
sunxi: sinovoip-bpi-m3: drop LDO settings from defconfig
Kconfig default settings are same as mentioned Sinovoip
Bpi-m3 schematic.
As axp818 ALDO support is enabled, it causes bpi-m3 fail to boot
if ALDOs are set to 0.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 22 Mar 2016 19:10:30 +0000 (20:10 +0100)]
sunxi: Turn satapwr on from board_init
There are 2 reasons for doing this:
1) The main reason for doing this is to move it outside of
board/sunxi/ahci.c, so that it can be used on boards which use
a usb<->sata chip too;
2) While doing this I realized that doing it from board_init also meant
doing it much earlier. Some printf get_timer(0) calls show that the
time between board_init() and scsi_init() is more then 600 ms,
so we can drop the mdelay(500)
While at it also drop the printf("SUNXI SCSI INIT\n") AHCI init is
noisy enough by itself.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 17 Mar 2016 12:53:03 +0000 (13:53 +0100)]
sunxi: Fix gmac not working due to cpu_eth_init no longer being called
cpu_eth_init is no longer called for dm enabled eth drivers, this
was causing the sunxi gmac eth controller to no longer work in u-boot.
This commit fixes this by calling the clock, reset and pinmux setup
function from s_init() and enabling the phy power pin (if any) from
board_init().
The enabling of phy power cannot be done from s_init because it uses dm
and dm is not ready yet at this point.
Note that the mdelay is dropped as the phy gets enabled much earlier
now, so it is no longer needed.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Karsten Merker <merker@debian.org> Tested-by: Michael Haas <haas@computerlinguist.org>
Hans de Goede [Mon, 21 Mar 2016 13:44:35 +0000 (14:44 +0100)]
sunxi: Fix 2nd usb controller on sun4i/sun7i no longer working
The 2nd usb controller on sun4i/sun7i has its base address 0x8000
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
are interleaved with the ohci clk-gates introducing a hole between
the clks for usb1 and usb2.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 18 Mar 2016 07:43:04 +0000 (08:43 +0100)]
sunxi: Add a bunch of missing compatible strings to sunxi_gpio.c
The kernel has different compatible strings for the pio block
because the pin-muxing is different on all the different SoCs,
but sunxi_gpio.c only support the basic gpio functionality, which
is identical everywhere. Add the missing compatible strings for
various SoC models.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Alex Kaplan [Mon, 7 Mar 2016 12:50:20 +0000 (13:50 +0100)]
sunxi: Enable composite video out on the CHIP
The CHIP has a composite video output in the mini-Jack connector, alongside
with the 2 audio channels. Enable this output in U-Boot.
Signed-off-by: Alex Kaplan <kaplan2539@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Boris Brezillon [Mon, 7 Mar 2016 12:44:11 +0000 (13:44 +0100)]
sunxi: Fix DCDC2 output in CHIP_defconfig
Unlike the datasheet recommendation, the R8 SoC requires a 1.4V supply
for its CPU when operating at 1Ghz.
Rely on the default value specified in the Kconfig entry.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Lawrence Yu [Fri, 4 Mar 2016 17:08:56 +0000 (09:08 -0800)]
sunxi: Configure only LVDS pins instead of all LCD pins when LVDS interface selected
The behavior before this patch would attempt to configure the mux
setting for pins 0 to 27 on PORTD to all be setting 3 for LVDS. The
LVDS interface actually only uses pins 18 to 27 and not pins 0 to 27
as in the parallel LCD interface. This patch restricts the
configuration to only the relevant pins 18 to 27 on PORTD.
This was tested on a sun8i A33 tablet with an LVDS screen. MMC1 has
the capability to use pins 2 to 7 on PORTD and the mux on those pins
was being inadvertently set to setting 3 for MMC functionality which
this patch corrects.
Signed-off-by: Lawrence Yu <lyu@micile.com>
[hdegoede@redhat.com: Only apply this change to A23 / A33] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Wed, 23 Mar 2016 08:59:23 +0000 (09:59 +0100)]
sunxi: Add defconfig and dts for Orange Pi 2 SBC
The Orange Pi 2 is a SBC based on the Allwinner H3 SoC with a uSD slot,
4 USB ports connected via a USB-2 hub, a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via a RTL8189ETV sdio wifi chip, USB OTG, HDMI,
a TRRS headphone jack for stereo out and composite out, a microphone,
an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header
and a 40-pin GPIO header.
The added dts file is identical to the one submitted to the upstream
kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Chen-Yu Tsai [Mon, 21 Mar 2016 08:39:07 +0000 (16:39 +0800)]
sunxi: Add defconfig for Sinlinx SinA31s
The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.
The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume
buttons, RS232 style UART and USB OTG (though VBUS is not connected).
Various headers are available for other addon modules, such as SDIO
WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Marcus Cooper [Tue, 15 Mar 2016 17:47:39 +0000 (18:47 +0100)]
sun7i: Add defconfig for the Itead Ibox
Add defconfig for the multi board device based on the
Allwinner A20 SoC. It contains the A20 Itead Core module and a
base board for the external interfaces.
The core module comes with 4GB NAND and 1GB DDR RAM.
The base board to which the core board is connected provides
3 USB 2.0 Host ports, 1 USB 2.0 OTG, 1 uSD slot, 10/100 Ethernet
port, HDMI, IR receiver, SPDIF and a 32-pin GPIO header. This
header expands the features of core board by exposing the VGA pins,
audio In/Out pins, SATA, SPI, I2C, UARTS, USB-OTG and power..
Signed-off-by: Marcus Cooper <codekipper@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Chen-Yu Tsai [Wed, 27 Jan 2016 08:34:44 +0000 (16:34 +0800)]
sunxi: Add defconfig for Cubietruck Plus
Cubietruck Plus is a A83T/H8 based development board. The board has
standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host
via HSIC USB Hub, USB OTG, SATA via USB bridge, gigabit ethernet,
WiFi, headphone out / mic in, and various GPIO headers.
The board also has an EEPROM on i2c0 which holds the MAC address.
DLDO3 and DLDO4 provide power to the EMAC pins and PHY. Pin PA20
is connected to the reset control of the PHY. EMAC is not actually
supported yet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 14 Mar 2016 16:35:12 +0000 (17:35 +0100)]
sunxi: Add defconfig and dts for the Polaroid MID2809PXE4 tablet
The Polaroid MID2809PXE4 is a 9" tablet which is clearly marked
Polaroid MID2809PXE4 on the back. It features a 9" 16:9 800x480 LCD,
A23 Soc, 1GB RAM, 8GB NAND, gsl3670 touchscreen and esp8089 wifi.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Thu, 10 Mar 2016 21:35:56 +0000 (22:35 +0100)]
sunxi: Add defconfig and dts for Difrence DIT4350 tablet
The Difrnce dit4350 tablet is a tiny tablet with a 4.3" 16:9 480x272 LCD,
A13 SoC, 512M RAM, 4G NAND, solomon systech ssd2532qn6 touchscreen at
i2c1 address 0x48, Memsic MXC622X accelerometer at i2c1 address 0x15 and
rtl8188etv wifi.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 9 Mar 2016 21:45:23 +0000 (22:45 +0100)]
sunxi: Add defconfig and dts for colorfly e708 q1 tablet
The colorfly e708 q1 is a 7" tablet which is clearly marked as colorfly
e708 q1 on the back. It features a 9:16 800x1280 IPS LCD, A31s SoC,
1GB RAM, 8G NAND, ilitek 2139qt004 touchscreen on i2c-1 addr 0x41,
stk8313 accelerometer on i2c-2 addr 0x22 and a rtl8188etv wifi chip.
The added dts is identical to the dts submitted to the upstream kernel,
note this commit also syncs axp22x.dtsi and sun6i-a31.dtsi with the
upstream kernel as the added dts depends on these.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 16 Mar 2016 19:57:28 +0000 (20:57 +0100)]
sunxi: Fix clock_twi_onoff for sun8i-a83
clock_sun8i_a83.c did not contain a clock_twi_onoff implementation
at all, this is fixed by moving the clock_sun6i.c implementation,
which is correct for the a83 too, to a shared location.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Note this adds a number of new unused board dts files. I've asked the
authors of the kernel commits adding these to submit a matching defconfig
to u-boot.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 16 Mar 2016 12:41:23 +0000 (13:41 +0100)]
include/dt-bindings: Sync some files with the kernel
This commit syncs the dt-bindings/input/* headers with the kernel (v4.5)
and adds dt-bindings/clock/sun4i-a10-pll2.h, both are necessary for newer
sunxi dts files to build.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 4 Mar 2016 09:57:34 +0000 (10:57 +0100)]
sunxi: A23: Fix some revisions needing a different magic sram poke
I've had this one a23 tablet which would not boot and I've finally
figured out what the problem is by looking at the released boot0 code,
it seems the magic sram controller poke which we need to do in s_init()
depends on the revision of the a23.
Specifically this change is needed to get the A23 SoC I have with the
following serial to boot: "E6071AB 26Y7".
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Masahiro Yamada [Tue, 22 Mar 2016 16:40:05 +0000 (01:40 +0900)]
ARM: uniphier: switch to raw U-Boot image
Now everything is done to load a raw U-Boot proper image instead of
an mkimage-processed one (as far as I tested on NAND, eMMC, NOR).
The SPL already knows the load address of the U-Boot proper without
parsing its uImage header because the load address is defined by
CONFIG_SYS_TEXT_BASE, assuming that the two images are generated from
the same build.
My main motivation of this switch is to use u-boot-with-spl.bin, a
concatenation of u-boot-spl.bin and u-boot.bin. (I wish there were
a concatenation of u-boot-spl.bin and u-boot.img...) Anyway, this
commit would be useful for one-shot image burn.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:52 +0000 (16:41 +0900)]
ARM: uniphier: support Debug UART
For ARM32 architecture, CONFIG_DEBUG_LL is available for early
low-level debugging (and actually UniPhier 32bit SoCs use it), but
ARM64 architecture does not support it. Instead, CONFIG_DEBUG_UART
is available as an architecture-independent debug facility.
This commit supports it on all the UniPhier SoCs (including the new
ARMv8 SoCs), which is very useful for new SoC bringups.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:51 +0000 (16:41 +0900)]
ARM: uniphier: add System Control register macros for ARMv8 SoCs
The System Control block moved to a completely different register
map for ARMv8 SoCs, so it cannot be shared with the ARM 32-bit ones.
Define register macros in a new header file.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:47 +0000 (16:41 +0900)]
ARM: uniphier: enable DDR PHY parameter dump commands by default
These commands are not necessarily needed for usual operations
(they are useful in case of DDR memory trouble), but enabling them
by default would be nice in terms of the compilation test coverage.
They are small enough, so limited impact on the memory footprint.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:46 +0000 (16:41 +0900)]
ARM: uniphier: add work-around to support Micro Support Card v3.6.10
Due to some hardware guy's awful work, this version is not compatible
with v3.6: the logic of BIT(0) of the reset logic is inverted! (and
v3.6.10 is horribly wrong in multiple ways), but this is what we have
to solve now.
The v3.6 expects 0x0000 set to the register for reset de-assertion,
while v3.6 does 0x0001.
This commit (ab)uses another bug of v3.6.10 to work around the issue.
The UniPhier System Bus is a 16-bit bus, which this support card is
connected to. A 32-bit write to the bus (writel() function call) is
divided into two 16-bit write transactions, with LSB the first. What
is amazing for v3.6.10 is that access to address 4N + 2 goes to 4N
(Jesus Christ!).
For clarification, things are like this:
writel(0x00010000, MICRO_SUPPORT_CARD_RESET);
is done with two bus transactions as follows
[1] write 0x0000 to address MICRO_SUPPORT_CARD
[2] write 0x0001 to address MICRO_SUPPORT_CARD + 2
For v3.6, [1] is written to the register and [2] is correctly ignored
because there is nothing at the address MICRO_SUPPORT_CARD + 2. This
is what we expect.
For v3.6.10, [1] is written to the reset register and then [2] is
over-written to the same register due to the bus access bug.
For the latter, it produces a glitch signal to the BIT[0], so the
device state is lost due to the reset pulse. This solution only
works for the start-up code.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:45 +0000 (16:41 +0900)]
ARM: uniphier: drop ifdef in ddrphy-regs.h
The ifdef conditionals in header files prevent us from multi-SoC
support in a single U-Boot image. Detect SoC specific parameters
run-time rather than define them statically with an ifdef in
ddrphy-regs.h.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:44 +0000 (16:41 +0900)]
ARM: uniphier: refactor SBC init code
There is a bunch of duplication in the System Bus Controller init
code. Roughly, there are two types in the SBC mode: Adress/Data
Multiplex Mode and Save Pins Mode. Consolidate per-SoC functions
into the two, plus per-SoC optional init code.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:43 +0000 (16:41 +0900)]
ARM: uniphier: drop PH1- prefix from CONFIG options and file names
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too
long. It would not hurt to drop "PH1_" because "UNIPHIER_" already
well specifies the SoC family. Also, rename files for consistency.
Masahiro Yamada [Fri, 18 Mar 2016 07:41:41 +0000 (16:41 +0900)]
ARM: uniphier: remove commented out define
This TODO is no longer useful. CONFIG_SYS_NS16550_SERIAL is just
ignored on DM serial.
If one wants to use the 16550A UART device on the UniPhier Micro
Support Card, it can be enabled by CONFIG_SYS_NS16550 via Kconfig.
Please notice CONFIG_SPL_OF_TRANSLATE must be enabled as well and
the device tree must be treaked in order to use the NS16550 serial
on SPL.
Masahiro Yamada [Wed, 16 Mar 2016 03:10:00 +0000 (12:10 +0900)]
spl_mmc: allow to load raw image
The function spl_parse_image_header() falls back to a raw image
if the U-Boot header is missing and CONFIG_SPL_PANIC_ON_RAW_IMAGE
is undefined. While, mmc_load_image_raw_sector() only accepts a
U-Boot legacy image or an FIT image, preventing us from loading a
raw image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Mon, 21 Mar 2016 13:47:41 +0000 (06:47 -0700)]
net: Move CONFIG_RTL8139 to Kconfig
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: Fixup MPC8641HPCN* and r2dplus configs] Signed-off-by: Tom Rini <trini@konsulko.com>
projects / u-boot / log