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8 years agoarm: am437x: cm-t43: split board file
Nikita Kiryanov [Fri, 19 Feb 2016 17:19:45 +0000 (19:19 +0200)]
arm: am437x: cm-t43: split board file

Simplify the board file by splitting it to spl portion and u-boot portion.
Some unnecessary includes were identified and removed. No functional changes.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: am437x: cm-t43: define prompt
Nikita Kiryanov [Fri, 19 Feb 2016 17:19:44 +0000 (19:19 +0200)]
arm: am437x: cm-t43: define prompt

Define prompt for cm-t43.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: am437x: cm-t43: support all available SPI flash chips
Nikita Kiryanov [Fri, 19 Feb 2016 17:19:43 +0000 (19:19 +0200)]
arm: am437x: cm-t43: support all available SPI flash chips

Add full support for SPI flash chips to future-proof U-Boot for cm-t43.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: am437x: cm-t43: migrate CONFIG_DM_SERIAL to config file
Nikita Kiryanov [Fri, 19 Feb 2016 17:19:42 +0000 (19:19 +0200)]
arm: am437x: cm-t43: migrate CONFIG_DM_SERIAL to config file

Move CONFIG_DM_SERIAL to cm_t43_defconfig. This forces us to update the
CONFIG_SYS_NS16550_REG_SIZE value for SPL.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoarm: am437x: cm-t43: fix cm-t43 boot
Nikita Kiryanov [Fri, 19 Feb 2016 17:19:41 +0000 (19:19 +0200)]
arm: am437x: cm-t43: fix cm-t43 boot

spl_board_init() is necessary for boot. Remove the #undef that keeps
it out of the boot sequence.

Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard/BuR/kwb: cosmetic changes
Hannes Schmelzer [Fri, 19 Feb 2016 11:09:46 +0000 (12:09 +0100)]
board/BuR/kwb: cosmetic changes

- fixup typo
- fixup identation

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard/BuR: split bur_am335x_common.h into am335x-specific and BuR common parts
Hannes Schmelzer [Fri, 19 Feb 2016 11:09:45 +0000 (12:09 +0100)]
board/BuR: split bur_am335x_common.h into am335x-specific and BuR common parts

bur_am335x_common.h today holds all common configuration which is shared
over all B&R boards.

In future we want to bring up boards which are not based on AM335x only
but we still want to have common configuration over all B&R boards
independent from their architecture.

To prepare this we introduce a new file "bur_cfg_common.h", where we
move all common things, which are not architecture specific, from
bur_am335x_common.h.

On B&R am335x boards we include from now:

#include <configs/bur_cfg_common.h>
#include <configs/bur_am335x_common.h>

On other B&R boards, we include only
#include <configs/bur_cfg_common.h>

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard/BuR: move everything possible from board's headerfile to KConfig
Hannes Schmelzer [Fri, 19 Feb 2016 11:09:44 +0000 (12:09 +0100)]
board/BuR: move everything possible from board's headerfile to KConfig

We drop everything possible things from board headerfiles and replace
this functionality with responsible settings in Kconfig (_defconfig).

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard/BuR: use default u-boot prompt on all B&R boards
Hannes Schmelzer [Fri, 19 Feb 2016 11:09:43 +0000 (12:09 +0100)]
board/BuR: use default u-boot prompt on all B&R boards

There is no need to have some specific prompt, so we drop this within
defconfigs.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard/BuR: drop ETH-support in SPL-Stage
Hannes Schmelzer [Fri, 19 Feb 2016 11:09:42 +0000 (12:09 +0100)]
board/BuR: drop ETH-support in SPL-Stage

During very early prototype-phase we did boot the AM335x boards
initially from CPSW-EMAC.

Now we don't need this feature anymore.

So we drop it to save MLO-space and having therefore a more quickly
boot.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoOMAP3SOM BOARD: Auto detect Logic PD Models
Adam Ford [Thu, 18 Feb 2016 03:49:49 +0000 (21:49 -0600)]
OMAP3SOM BOARD: Auto detect Logic PD Models

Logic PD makes four different system on modules.  This patch will auto
detect the board type and identify the corresponding device tree image.

V2:
Added 'default:' case to switch statement
Since board_late_init() is defined as int, we now return 0

Signed-off-by: Derald Woods <woods.technical@gmail.com>
Signed-off-by: Adam Ford <aford173@gmail.com>
8 years agotest/py: only check for SPL signature if SPL uses serial output
Heiko Schocher [Wed, 17 Feb 2016 17:32:51 +0000 (18:32 +0100)]
test/py: only check for SPL signature if SPL uses serial output

check for U-Boot SPL signature only if SPL really has a serial output.
So check if CONFIG_SPL_SERIAL_SUPPORT is active in board config.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
8 years agopci_rom: fix may be used uninitialized warning
Andreas Bießmann [Tue, 16 Feb 2016 22:29:31 +0000 (23:29 +0100)]
pci_rom: fix may be used uninitialized warning

Building pci_rom.c with my toolchain complains about may be used uninitialized
rom varaible:

---8<---
+drivers/pci/pci_rom.c:269:25: note: 'rom' was declared here
w+drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
w+drivers/pci/pci_rom.c:154:14: warning: 'rom' may be used uninitialized in this function [-Wmaybe-uninitialized]
--->8---

Fix this as done in 55616b86c745fcac5a791268ab8e7cba36965c0f the ram variable.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
8 years agosamsung: fix mkorigenspl for darwin
Andreas Bießmann [Tue, 16 Feb 2016 22:29:30 +0000 (23:29 +0100)]
samsung: fix mkorigenspl for darwin

Compiling the mkorigenspl tool on darwin complains about undefined ulong. Fix
this by using the unified way.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agotools: -Wno-deprecated-declarations for OpenSSL on darwin
Andreas Bießmann [Tue, 16 Feb 2016 22:29:28 +0000 (23:29 +0100)]
tools: -Wno-deprecated-declarations for OpenSSL on darwin

Since OpenSSL is deprecated on OS X in favour of Common Crypto API disable the
warning for this host OS.

Another solution would be to add some glue layer for crypto stuff, but I think
this is not worth the effort.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoGracefully handle 64-bit signed-extended 32-bit Load addresses
William Cohen [Tue, 16 Feb 2016 13:57:46 +0000 (08:57 -0500)]
Gracefully handle 64-bit signed-extended 32-bit Load addresses

To follow the MIPS 32-bit and 64-bit memory map conventions (*) recent
MIPS Linux kernels are using a 64-bit sign extended value
(0xffffffff80010000) for the 32-bit load address (0x80010000) of the
Creator CI20 board kernel.  When this 64-bit argument was passed to
mkimage running on a 32-bit machine such as the Creator CI20 board the
load address was incorrectly formed from the upper 32-bit sign-extend
bits (0xffffffff) by the strtoul instead of from the lower 32-bits
(0x80010000).  The mkimage should be able to tolerate the longer
sign-extended 64-bit version of the 32-bit arguments with the use of
strtoull.  Use of the strtoll in place of the strtol in mkimage.c
resolves the issue of self hosted kernel builds for the Creator CI20
board (+) and (++).

(*) http://techpubs.sgi.com/library/dynaweb_docs/0620/SGI_Developer/books/DevDriver_PG/sgi_html/ch01.html
(+) https://github.com/MIPS/CI20_linux/issues/23
(++) https://github.com/MIPS/CI20_linux/issues/22

Signed-off-by: William Cohen <wcohen@redhat.com>
8 years agostm32: add support for stm32f7 & stm32f746 discovery board
Vikas Manocha [Thu, 11 Feb 2016 23:47:20 +0000 (15:47 -0800)]
stm32: add support for stm32f7 & stm32f746 discovery board

This patch adds support for stm32f7 family & stm32f746 board.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
8 years agostm32x7: add support for stm32x7 serial driver
Vikas Manocha [Thu, 11 Feb 2016 23:47:19 +0000 (15:47 -0800)]
stm32x7: add support for stm32x7 serial driver

This patch adds support for stm32f7 family usart peripheral.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agogpio: stm32_gpio: move base addresses to the soc file
Vikas Manocha [Thu, 11 Feb 2016 23:47:18 +0000 (15:47 -0800)]
gpio: stm32_gpio: move base addresses to the soc file

Base addresses for GPIOs could be different for different socs, this
patch moves the base addresses from driver to the soc specific location.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
8 years agogpio: stm32_gpio: move clock config from driver to board
Vikas Manocha [Thu, 11 Feb 2016 23:47:17 +0000 (15:47 -0800)]
gpio: stm32_gpio: move clock config from driver to board

This patch removes the gpio clock enable from gpio driver & move it in the
board code, making it possible to use the gpio driver with other socs.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 23 Feb 2016 20:35:47 +0000 (15:35 -0500)]
Merge branch 'master' of http://git.denx.de/u-boot-sunxi

8 years agosunxi: H3: Add support for the host usb-phys
Jelle van der Waa [Tue, 9 Feb 2016 22:59:33 +0000 (23:59 +0100)]
sunxi: H3: Add support for the host usb-phys

Add support for phy 1-3.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: power: add support for sy8106a driver
Jelle van der Waa [Tue, 23 Feb 2016 17:47:19 +0000 (18:47 +0100)]
sunxi: power: add support for sy8106a driver

SY8106A is a PMIC which is used on the Allwinner
H3 Orange Pi Pc and Plus board. The VOUT1_SEL register is
implemented to set the default V-CPU voltage to 1200 mV.

This driver is required to ensure the SY8106A V-CPU
voltage is set to 1200 mV after a software reset. On cold
boot the default SY8106A output voltage is selected to be
1200 mV by a pair of resistors on the Orange Pi PC and Plus.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Tue, 23 Feb 2016 13:13:46 +0000 (08:13 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

8 years agospi: spi-uclass: Set slave wordlen with SPI_DEFAULT_WORDLEN
Christophe Ricard [Sun, 17 Jan 2016 10:56:48 +0000 (11:56 +0100)]
spi: spi-uclass: Set slave wordlen with SPI_DEFAULT_WORDLEN

In some case wordlen may not be set. Use SPI_DEFAULT_WORDLEN as default.

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agospi: omap3: Remove unused variable irqstatus in omap3_spi_txrx
Christophe Ricard [Sun, 17 Jan 2016 10:56:47 +0000 (11:56 +0100)]
spi: omap3: Remove unused variable irqstatus in omap3_spi_txrx

Remove unused variable irqstatus in omap3_spi_txrx

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agodefconfig: am437x_sk_evm: enable dma driver model
Mugunthan V N [Mon, 15 Feb 2016 10:01:42 +0000 (15:31 +0530)]
defconfig: am437x_sk_evm: enable dma driver model

enable dma driver model for am437x_sk_evm as ti-edma3 supports
driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agodrivers: dma: ti-edma3: convert driver to adopt driver model
Mugunthan V N [Mon, 15 Feb 2016 10:01:41 +0000 (15:31 +0530)]
drivers: dma: ti-edma3: convert driver to adopt driver model

adopt ti-edma3 driver to device driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agospi: ti_qspi: compile out spi_flash_copy_mmap when CONFIG_DMA is defined
Mugunthan V N [Mon, 15 Feb 2016 10:01:40 +0000 (15:31 +0530)]
spi: ti_qspi: compile out spi_flash_copy_mmap when CONFIG_DMA is defined

When CONFIG_DMA is defined the default spi_flash_copy_mmap() can
handle dma memory copy, so compile out spi_flash_copy_mmap() from
ti_qspi driver when CONFIG_DMA config is defined.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agosf: spi_flash: use dma to copy data from mmap region if platform supports
Mugunthan V N [Mon, 15 Feb 2016 10:01:39 +0000 (15:31 +0530)]
sf: spi_flash: use dma to copy data from mmap region if platform supports

Add dma memcpy api to the default spi_flash_copy_mmap(), so that
dma will be used to copy data when CONFIG_DMA is defined for the
platform.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agodma: Kconfig: Add TI_EDMA3 entry
Mugunthan V N [Mon, 15 Feb 2016 10:01:38 +0000 (15:31 +0530)]
dma: Kconfig: Add TI_EDMA3 entry

Add TI_EDMA3 entry on Kconfig with help description.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agodm: implement a DMA uclass
Mugunthan V N [Mon, 15 Feb 2016 10:01:37 +0000 (15:31 +0530)]
dm: implement a DMA uclass

Implement a DMA uclass so that the devices like ethernet, spi,
mmc etc can offload the data transfers from/to the device and
memory.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
8 years agoARM: zynq: Wire-up saving environment to QSPI
Michal Simek [Sat, 13 Feb 2016 11:02:53 +0000 (12:02 +0100)]
ARM: zynq: Wire-up saving environment to QSPI

Extend options for saving variables to QSPI.

Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 22 Feb 2016 18:12:47 +0000 (13:12 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

8 years agovideo: Add S3C24xx framebuffer support
Marek Vasut [Sat, 11 Oct 2014 16:42:49 +0000 (18:42 +0200)]
video: Add S3C24xx framebuffer support

Add basic framebuffer driver for the S3C24xx family of CPUs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
V2: Keep the Makefile sorted.
Acked-by: Anatolij Gustschin <agust@denx.de>
8 years agoARM: zynq: Enable EDID for zybo
Michal Simek [Sat, 13 Feb 2016 09:49:03 +0000 (10:49 +0100)]
ARM: zynq: Enable EDID for zybo

Zybo contains on board HDMI that's why enable EDID.
Doing it via config because zynq i2c driver hasn't been moved to DM yet
and enabling via Kconfig requires DM_I2C.
This will be moved that driver is moved to DM.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add reset-gpio property for USB on Zybo
Michal Simek [Sat, 13 Feb 2016 09:38:08 +0000 (10:38 +0100)]
ARM: zynq: Add reset-gpio property for USB on Zybo

DTS syncup with Linux kernel.
Add missing reset-gpio property.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: phy: realtek: Use generic genphy_parse_link() for RTL8211E
Michal Simek [Sat, 13 Feb 2016 09:31:32 +0000 (10:31 +0100)]
net: phy: realtek: Use generic genphy_parse_link() for RTL8211E

The problem with current implementation is that SPDDONE bit is 1
but link bit is zero. That's why phydev->link is setup to 0
which ending up in driver failure that link is not up.

Log:
Zynq> dhcp
ethernet@e000b000 Waiting for PHY auto negotiation to complete.......
done
ethernet@e000b000: No link.

There is at least 1ms delay between spddone bit and link up.

Use genphy_read_status() instead of realtek implemenation which is
working with page 11. Linux driver is also using generic implementation.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Enable Realtek phys by default
Michal Simek [Sat, 6 Feb 2016 12:34:54 +0000 (13:34 +0100)]
ARM: zynq: Enable Realtek phys by default

This phy is available at Zybo board.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoi2c: spd: Extend SPD memory types
Michal Simek [Mon, 15 Feb 2016 10:58:37 +0000 (11:58 +0100)]
i2c: spd: Extend SPD memory types

Decode DDR, DDR3 and DDR4 memories.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agodm: ns16550: Add support for reg-offset property
Michal Simek [Tue, 16 Feb 2016 15:05:23 +0000 (16:05 +0100)]
dm: ns16550: Add support for reg-offset property

reg-offset is the part of standard 8250 binding in the kernel.
It is shifting start of address space by reg-offset.
On Xilinx platform this offset is typically 0x1000.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agozynq-common: Fix usbboot env variable
Jason Wu [Mon, 22 Feb 2016 12:07:49 +0000 (22:07 +1000)]
zynq-common: Fix usbboot env variable

Remove the miss-placed \0 and add missing ; for usbboot env variable.

Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Enable SPL RAM support by default
Michal Simek [Wed, 17 Feb 2016 07:38:38 +0000 (08:38 +0100)]
ARM: zynq: Enable SPL RAM support by default

Use RAM support in jtagboot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
8 years agoARM: zynq: Enable u-boot,dm-pre-reloc for qspi
Nathan Rossi [Tue, 16 Feb 2016 13:05:03 +0000 (23:05 +1000)]
ARM: zynq: Enable u-boot,dm-pre-reloc for qspi

Enable u-boot,dm-pre-reloc for qspi for zc706, zed and microzed.

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoserial: zynq: Change logic in putc
Michal Simek [Wed, 3 Feb 2016 14:16:51 +0000 (15:16 +0100)]
serial: zynq: Change logic in putc

Sync logic with Linux kernel where TX empty flag is checked before char
is sent.
This logic is fixing problem with console on zynqmp platform.

For example:
DRAM:  2 GiB
Enabling Caches...
EL Level: ��   sdhci@ff170000: 0
Using default environment

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
8 years agoARM: zynq: Remove ZYNQ_BOOT_FREEBSD option
Michal Simek [Thu, 4 Feb 2016 10:08:26 +0000 (11:08 +0100)]
ARM: zynq: Remove ZYNQ_BOOT_FREEBSD option

Remove CONFIG_ZYNQ_BOOT_FREEBSD configuration option and setup
CONFIG_SYS_MMC_MAX_DEVICE 1 for all Zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Read memory size setting from DT
Michal Simek [Thu, 4 Feb 2016 10:03:20 +0000 (11:03 +0100)]
ARM: zynq: Read memory size setting from DT

OF_CONTROL is setup by default and memory reading is done via DT. Remove
all config files with memory references.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: Kconfig: Add Arasan SDHCI entry
Michal Simek [Thu, 4 Feb 2016 10:43:40 +0000 (11:43 +0100)]
mmc: Kconfig: Add Arasan SDHCI entry

Add Arasan SDHCI entry to Kconfig and fix all references.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: zc770: Remove unused ifdefs for xm011 and xm013
Michal Simek [Thu, 4 Feb 2016 09:56:23 +0000 (10:56 +0100)]
zynq: zc770: Remove unused ifdefs for xm011 and xm013

Clean config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Remove unused SPI base addresses
Michal Simek [Thu, 4 Feb 2016 07:35:53 +0000 (08:35 +0100)]
ARM: zynq: Remove unused SPI base addresses

Remove unused macros. Adresses are taken from DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
8 years agovideo: freetype: Fix a memory leak with a bad parameter
Simon Glass [Mon, 22 Feb 2016 04:10:26 +0000 (21:10 -0700)]
video: freetype: Fix a memory leak with a bad parameter

Make sure to free memory used when the scale facture is incorrect.

Reported-by: Coverity (CID: 24068)
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agovideo: truetype: Fix a memory leak on error
Simon Glass [Mon, 22 Feb 2016 04:10:25 +0000 (21:10 -0700)]
video: truetype: Fix a memory leak on error

When the resolution is not supported we should free the memory we don't plan
to use.

Reported-by: Coverity (CID: 135127)
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Sun, 21 Feb 2016 12:56:16 +0000 (07:56 -0500)]
Merge branch 'master' of git://www.denx.de/git/u-boot-imx

8 years agoimx: mx7d: isolate resources to domain 0 for A7 core
Peng Fan [Thu, 28 Jan 2016 08:55:09 +0000 (16:55 +0800)]
imx: mx7d: isolate resources to domain 0 for A7 core

In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time. Also if M4 enters stop mode, A7 will have no
chance to access the peripheral.
There are 26 peripherals affected by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is to set the peripherals to Domain0 by A core, since A core
in Domain0. The peripherals which will be used by M4, will be set to Domain1
by M4.
For example, A core set WDOG4 to domain0, but when M4 boots up, M4 will
set WDOG4 to domain1, because M4 will use WDOG4.

So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above
to domain 0 only. M4 image will set the M4 to domain 1 and
set peripheral which it will use to domain 1.

This patch enables the CONFIG_IMX_RDC and CONFIG_IMX_BOOTAUX for
i.MX7D SABRESD board, and setup the 26 IP resources to domain 0.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx7dsabresd: add command and macros for boot m4 core
Peng Fan [Thu, 28 Jan 2016 08:55:08 +0000 (16:55 +0800)]
imx: mx7dsabresd: add command and macros for boot m4 core

Introduce macros and command to support booting M4 core for
i.MX7D SabreSD board.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx7: implement functions to boot auxiliary core
Peng Fan [Thu, 28 Jan 2016 08:55:07 +0000 (16:55 +0800)]
imx: mx7: implement functions to boot auxiliary core

Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.

arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx6sxsabresd: add command and macros for boot m4 core
Peng Fan [Thu, 28 Jan 2016 08:55:06 +0000 (16:55 +0800)]
imx: mx6sxsabresd: add command and macros for boot m4 core

Introduce macros and command to support booting M4 core for
i.MX6SX SabreSD board.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx6: implement functions to boot auxiliary core
Peng Fan [Thu, 28 Jan 2016 08:55:05 +0000 (16:55 +0800)]
imx: mx6: implement functions to boot auxiliary core

Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up.

arch_auxiliary_core_check_up is used to check whether M4 is running
or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will
use the pc and stack which is set in arch_auxiliary_core_up to set R15
and R13 register and boot.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: imx-common: introduce boot auxiliary core
Peng Fan [Thu, 28 Jan 2016 08:55:04 +0000 (16:55 +0800)]
imx: imx-common: introduce boot auxiliary core

To boot a auxiliary core in asymmetric multicore system, introduce the
new command "bootaux" to do it. Example of boot auxliary core from
0x70000000 where stores the boot head information that should be
parsed by auxiliary core, "bootaux 0x70000000".
Introduce Kconfig option IMX_BOOTAUX.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx7d: clock support for RDC
Peng Fan [Thu, 28 Jan 2016 08:55:03 +0000 (16:55 +0800)]
imx: mx7d: clock support for RDC

If CONFIG_IMX_RDC is enabled, enable clock for RDC and SEMAPHORE.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx7d: Add RDC support
Peng Fan [Thu, 28 Jan 2016 08:55:02 +0000 (16:55 +0800)]
imx: mx7d: Add RDC support

Add the peripherals/masters definitions and registers base addresses
for mx7d RDC.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx6sx Add RDC mappings of masters and peripherals
Peng Fan [Thu, 28 Jan 2016 08:55:01 +0000 (16:55 +0800)]
imx: mx6sx Add RDC mappings of masters and peripherals

Add the definitions for the RDC mappings for i.MX6 SoloX.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: imx-common: introduce Resource Domain Controller support
Peng Fan [Thu, 28 Jan 2016 08:55:00 +0000 (16:55 +0800)]
imx: imx-common: introduce Resource Domain Controller support

Introduce Resource Domain Controller support for i.MX.
Now i.MX6SX and i.MX7D supports this feature to assign masters
and peripherals to different domains.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx6: introduce rdc regs
Peng Fan [Thu, 28 Jan 2016 08:54:59 +0000 (16:54 +0800)]
imx: mx6: introduce rdc regs

Introudce rdc regs structure and rdc sema reg structure for i.MX6.
For now, to i.MX6, only i.MX6SX supports this.

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
8 years agoimx: mx6quq7: add sd card detection
Julien CORJON [Fri, 5 Feb 2016 15:19:33 +0000 (16:19 +0100)]
imx: mx6quq7: add sd card detection

Add board_mmc_getcd function and declare CD_GPIO for SDCard.

Signed-off-by: Julien Corjon <corjon.j@ecagroup.com>
8 years agoimx: mx6quq7: specify max_bus_witdh directly in usdhc_cfg
Julien CORJON [Fri, 5 Feb 2016 15:19:32 +0000 (16:19 +0100)]
imx: mx6quq7: specify max_bus_witdh directly in usdhc_cfg

Specify max_bus_width directly in usdhc_cfg static definition instead
of tweaking it in the board_mmc_init() function.

Signed-off-by: Julien Corjon <corjon.j@ecagroup.com>
8 years agoimx: mx6quq7: fix USDHC4 declaration
Julien CORJON [Fri, 5 Feb 2016 15:19:31 +0000 (16:19 +0100)]
imx: mx6quq7: fix USDHC4 declaration

USDHC2 does not exist on mx6quq7 board, as USDHC4 was already been
declared this is probably a typo.

Signed-off-by: Julien Corjon <corjon.j@ecagroup.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
8 years agoboard: tbs2910: Autoselect environment device when booting from SD
Soeren Moch [Thu, 4 Feb 2016 13:41:16 +0000 (14:41 +0100)]
board: tbs2910: Autoselect environment device when booting from SD

Implement board specific functions to select the environment device and
partition when booting from SD/MMC.

SD2:  mmc 0 0
SD3:  mmc 1 0
eMMC: mmc 2 1

Signed-off-by: Soeren Moch <smoch@web.de>
8 years agoimx: mx6: Implement mmc_get_env_part
Soeren Moch [Thu, 4 Feb 2016 13:41:15 +0000 (14:41 +0100)]
imx: mx6: Implement mmc_get_env_part

commit 216d286c7e3d3d83d4d8ccaf0415192e1b1040c0 [imx: mx6: implement
mmc_get_env_dev] introduced selection of the environment device according
to the boot device when booting from SD/MMC.

Extend this functionality for also selecting the device partition.

Signed-off-by: Soeren Moch <smoch@web.de>
8 years agopinctrl: imx: Support i.MX7D
Peng Fan [Wed, 3 Feb 2016 02:06:08 +0000 (10:06 +0800)]
pinctrl: imx: Support i.MX7D

Introudce i.MX7 pinctrl driver support.
For now only i.MX7D supported.
There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr.
To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg
and conf_reg can begin at 0.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agopinctrl: imx: Introduce pinctrl driver for i.MX6
Peng Fan [Wed, 3 Feb 2016 02:06:07 +0000 (10:06 +0800)]
pinctrl: imx: Introduce pinctrl driver for i.MX6

Introduce pinctrl for i.MX6
1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
3. To the pinctrl_ops implementation, only set_state is implemented.
   To i.MX6/7, the pinctrl dts entry is as following:
&iomuxc {
        pinctrl-names = "default";

        pinctrl_csi1: csi1grp {
                fsl,pins = <
                MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
                MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
                MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
                >;
        };

        [.....]
};
  there is no property named function or groups. So pinctrl_generic_set_state
  can not be used here.
5. This driver is a simple implementation for i.mx iomux controller,
   only parse the fsl,pins property and write value to registers.
6. With DEBUG enabled, we can see log when "i2c bus 0":
   "
   set_state_simple op missing
   imx_pinctrl_set_state: i2c1grp
   mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x14c val 0x10
   select_input: offset 0x5d8 val 0x1
   write config: offset 0x3bc val 0x7f
   mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
   write mux: offset 0x148 val 0x10
   select_input: offset 0x5d4 val 0x1
   write config: offset 0x3b8 val 0x7f
   "
   this means imx6 pinctrl driver works as expected.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoimx: Refactoring CAAM Job Ring structure and Secure Memory for imx7
Ulises Cardenas [Tue, 2 Feb 2016 10:39:39 +0000 (04:39 -0600)]
imx: Refactoring CAAM Job Ring structure and Secure Memory for imx7

Refactored data structure for CAAM's job ring and Secure Memory
to support i.MX7.

The new memory map use macros to resolve SM's offset by version.
This will solve the versioning issue caused by the new version of
secure memory of i.MX7

Signed-off-by: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
8 years agomx7dsabresd: Make 'ums' command functional
Fabio Estevam [Wed, 17 Feb 2016 15:34:22 +0000 (13:34 -0200)]
mx7dsabresd: Make 'ums' command functional

When running the 'ums' command we get:

=> ums 0 mmc 0
UMS: disk start sector: 0x0, count: 0xe18000
g_dnl_register: failed!, error: -22
ERROR: g_dnl_register failed
at common/cmd_usb_mass_storage.c:107/do_usb_mass_storage()

Fix this by initializing USB OTG1 port as USB device mode instead of host.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agomx7dsabresd: Use Adrian's NXP email address
Fabio Estevam [Wed, 17 Feb 2016 15:37:13 +0000 (13:37 -0200)]
mx7dsabresd: Use Adrian's NXP email address

Use the new NXP email address for the board maintainer.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agomx6ul_14x14_evk: Select CONFIG_FSL_QSPI
Fabio Estevam [Wed, 17 Feb 2016 19:32:14 +0000 (17:32 -0200)]
mx6ul_14x14_evk: Select CONFIG_FSL_QSPI

Select CONFIG_FSL_QSPI so that the SPI can be probed:

=> sf probe
SF: Detected N25Q256 with page size 256 Bytes, erase size 64 KiB, total 32 MiB

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
8 years agomxsboot: remove unused include
Andreas Bießmann [Tue, 16 Feb 2016 22:29:29 +0000 (23:29 +0100)]
mxsboot: remove unused include

Commit 276d3ebb883024d753cd9c69ab2fd243ffa1262e removed htole32() but missed
to remove the corresponding header. This is annoying, since BSD systems do not
have endian.h.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Michael Heimpold <mhei@heimpold.de>
8 years agox86: doc: Update to include Intel Bayley Bay board instructions
Bin Meng [Wed, 17 Feb 2016 08:47:04 +0000 (00:47 -0800)]
x86: doc: Update to include Intel Bayley Bay board instructions

Update existing documentation to mention Intel Bayley Bay board
instructions, an additional Bay Trail based board to MinnowMax.

This also adds a minor change to QEMU section to indicate clearly
the instructions are for bare mode.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: Add Intel Cougar Canyon 2 board
Bin Meng [Wed, 17 Feb 2016 08:16:25 +0000 (00:16 -0800)]
x86: Add Intel Cougar Canyon 2 board

This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agox86: ivybridge: bd82x6x: Support FSP enabled configuration
Bin Meng [Wed, 17 Feb 2016 08:16:24 +0000 (00:16 -0800)]
x86: ivybridge: bd82x6x: Support FSP enabled configuration

Wrap initialization codes with #ifndef CONFIG_HAVE_FSP #endif,
and enable the build for both FSP and non-FSP configurations.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: fsp: Make sure HOB list is not overwritten by U-Boot
Bin Meng [Wed, 17 Feb 2016 08:16:23 +0000 (00:16 -0800)]
x86: fsp: Make sure HOB list is not overwritten by U-Boot

Intel IvyBridge FSP seems to be buggy that it does not report memory
used by FSP itself as reserved in the resource descriptor HOB. The
FSP specification does not describe how resource descriptor HOBs are
generated by the FSP to describe what memory regions. It looks newer
FSPs like Queensbay and BayTrail do not have such issue. This causes
U-Boot relocation overwrites the important boot service data which is
used by FSP, and the subsequent call to fsp_notify() will fail.

To resolve this, we find out the lowest memory base address allocated
by FSP for the boot service data when walking through the HOB list in
fsp_get_usable_lowmem_top(). Check whether the memory top address is
below the FSP HOB list, and if not, use the lowest memory base address
allocated by FSP as the memory top address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested on link (ivybridge non-FSP)
Tested-by: Simon Glass <sjg@chromium.org>
8 years agosuperio: Add SMSC SIO1007 driver
Bin Meng [Wed, 17 Feb 2016 08:16:22 +0000 (00:16 -0800)]
superio: Add SMSC SIO1007 driver

The SMSC SIO1007 superio chipset integrates two ns16550 compatible
serial ports for legacy applications, 16 GPIO pins and some other
functionalities like power management.

This adds a simple driver to enable serial port and handle GPIO.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: ivybridge: Add FSP support
Bin Meng [Wed, 17 Feb 2016 08:16:21 +0000 (00:16 -0800)]
x86: ivybridge: Add FSP support

IvyBridge FSP package is built with a base address at 0xfff80000,
and does not use UPD data region. This adds basic FSP support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested on link (ivybridge non-FSP)
Tested-by: Simon Glass <sjg@chromium.org>
8 years agox86: fix memalign() parameter order
Stephen Warren [Fri, 12 Feb 2016 21:27:56 +0000 (14:27 -0700)]
x86: fix memalign() parameter order

Purely by code inspection, it looks like the parameter order to memalign()
is swapped; its parameters are (align, size). 4096 is a likely desired
alignment, and a variable named size sounds like a size:-)

Fixes: 45b5a37836d5 ("x86: Add multi-processor init")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Sat, 20 Feb 2016 22:32:48 +0000 (17:32 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

8 years agovinco: add Maintainers file
Andreas Bießmann [Sat, 20 Feb 2016 20:39:36 +0000 (21:39 +0100)]
vinco: add Maintainers file

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
8 years agoarc: cache - utilize IO coherency (AKA IOC) engine
Alexey Brodkin [Mon, 14 Dec 2015 14:15:13 +0000 (17:15 +0300)]
arc: cache - utilize IO coherency (AKA IOC) engine

With release of ARC HS38 v2.1 new IO coherency engine could be built-in
ARC core. This hardware module ensures coherency between DMA-ed data
from peripherals and L2 cache.

With L2 and IOC enabled there's no overhead for L2 cache manual
maintenance which results in significantly improved IO bandwidth.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agoarc: cache - accommodate different L1 cache line lengths
Alexey Brodkin [Mon, 14 Dec 2015 14:14:46 +0000 (17:14 +0300)]
arc: cache - accommodate different L1 cache line lengths

ARC core could be configured with different L1 and L2 (AKA SLC) cache
line lengths. At least these values are possible and were really used:
32, 64 or 128 bytes.

Current implementation requires cache line to be selected upon U-Boot
configuration and then it will only work on matching hardware. Indeed
this is quite efficient because cache line length gets hardcoded during
code compilation. But OTOH it makes binary less portable.

With this commit we allow U-Boot to determine real L1 cache line length
early in runtime and use this value later on. This extends portability
of U-Boot binary a lot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
8 years agospl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS
Guillaume GARDET [Thu, 18 Feb 2016 17:17:36 +0000 (18:17 +0100)]
spl: if MMCSD_MODE_RAW fails, try MMCSD_MODE_FS

Since commit fd61d39970b9901217efc7536d9f3a61b4e1752a:
        spl: mmc: add break statements in spl_mmc_load_image()
RAW and FS boot modes are now exclusive again. So, if MMCSD_MODE_RAW fails, the
board hangs. This patch allows to try MMCSD_MODE_FS then.

It has been tested on a beaglebone black to boot on an EXT partition.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 19 Feb 2016 14:25:09 +0000 (09:25 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

8 years agoARM: Add Support for the VInCo platform
Gregory CLEMENT [Wed, 16 Dec 2015 16:01:44 +0000 (17:01 +0100)]
ARM: Add Support for the VInCo platform

The Versatile Industrial Communication platform is a community oriented
board from Landis + Gyr. It comes with:
- an RS-485 port
- 2 Ethernet ports
- a wireless M-BUS
- a 4G modem
- a 4MB SPI flash
- a 4GB eMMC

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[rebase on current TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoARM: at91: sama5d2: configure the L2 cache memory
Samuel Mescoff [Tue, 16 Feb 2016 08:45:06 +0000 (09:45 +0100)]
ARM: at91: sama5d2: configure the L2 cache memory

The SAMA5D2 has a second internal SRAM that can be reassigned as a L2
cache memory.
Make sure it is configured as a L2 cache memory when booting from a SPL
image.

Based on the commit b5ea95ef2b5b from the at91bootstrap repository.

Signed-off-by: Samuel Mescoff <samuel.mescoff@mobile-devices.fr>
Reviewed-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoarm: at91: Add support for DENX MA5D4 SoM and EVK
Marek Vasut [Thu, 11 Feb 2016 13:13:38 +0000 (14:13 +0100)]
arm: at91: Add support for DENX MA5D4 SoM and EVK

Add support for DENX MA5D4 SoM and MA5D4EVK board, based on the
Atmel SAMA5D4 SoC. The SoM contains the SoC, eMMC, SPI NOR, SPI
CAN controllers and DRAM, the baseboard contains UART connectors,
ethernet port, microSD slot, LCD header, 2x CAN connector and a
lot of expansion headers.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agosiemens,at91: enable features for smartweb
Matthias Michel [Wed, 27 Jan 2016 14:56:07 +0000 (15:56 +0100)]
siemens,at91: enable features for smartweb

New features for smartweb:
* switch to hush command parser
* change autoboot stop to <ESC><ESC>
* allow to write ethaddr

Signed-off-by: Matthias Michel <matthias.michel@siemens.com>
Reviewed-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoboard: atmel: clean up the PMC_PLLICPR init code
Wenyou Yang [Tue, 2 Feb 2016 04:46:14 +0000 (12:46 +0800)]
board: atmel: clean up the PMC_PLLICPR init code

Due to introducing the PMC_PLLICPR init function, use this
function to clean up the code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoARM: at91: clean up the PMC_PLLICPR init code
Wenyou Yang [Tue, 2 Feb 2016 04:46:13 +0000 (12:46 +0800)]
ARM: at91: clean up the PMC_PLLICPR init code

Due to introducing the PMC_PLLICPR init function, use this
function to clean up the code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoARM: at91: clock: add PMC_PLLICPR init function
Wenyou Yang [Tue, 2 Feb 2016 04:46:12 +0000 (12:46 +0800)]
ARM: at91: clock: add PMC_PLLICPR init function

To avoid the duplicated code, add the PMC_PLLICPR init function.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoboard: atmel: siemens: clean up PLLB code
Wenyou Yang [Wed, 3 Feb 2016 02:20:45 +0000 (10:20 +0800)]
board: atmel: siemens: clean up PLLB code

Due to introducing the new PLLB clock handle functions,
use these functions to clean up the PLLB enable code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Heiko Schocher <hs@denx.de>
8 years agodrivers: usb: ohci-at91: clean up the PLLB code
Wenyou Yang [Wed, 3 Feb 2016 02:20:44 +0000 (10:20 +0800)]
drivers: usb: ohci-at91: clean up the PLLB code

Due to introducing the new PLLB clock handle functions,
use these functions to clean up the PLLB enable/disable code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Heiko Schocher <hs@denx.de>
8 years agoARM: at91: clock: add PLLB enable/disable functions
Wenyou Yang [Wed, 3 Feb 2016 02:20:43 +0000 (10:20 +0800)]
ARM: at91: clock: add PLLB enable/disable functions

To avoid the duplicated code, add the PLLB handle functions.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Heiko Schocher <hs@denx.de>
[add enable/disable functions to arm920t]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
8 years agoboard: atmel: siemens: clean up UTMI PLL code
Wenyou Yang [Tue, 2 Feb 2016 03:11:54 +0000 (11:11 +0800)]
board: atmel: siemens: clean up UTMI PLL code

Due to introducing the new UTMI PLL clock handle functions,
use the functions to reduce the duplicated code.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>