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u-boot
11 years agox86: spi: Set maximum write size for ICH
Simon Glass [Mon, 11 Mar 2013 06:08:07 +0000 (06:08 +0000)]
x86: spi: Set maximum write size for ICH

This SPI controller can only write 64 bytes at a time. Add this restriction
in so that 'sf write' works correct for blocks larger than 64 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agosf: Respect maximum SPI write size
Simon Glass [Mon, 11 Mar 2013 06:08:06 +0000 (06:08 +0000)]
sf: Respect maximum SPI write size

Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agospi: Add parameter for maximum write size
Simon Glass [Mon, 11 Mar 2013 06:08:05 +0000 (06:08 +0000)]
spi: Add parameter for maximum write size

Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
bytes that can be written at a time. Add this as a parameter so that
clients of the SPI interface can respect this value.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: spi: Add Intel ICH driver
Simon Glass [Tue, 19 Mar 2013 04:58:56 +0000 (04:58 +0000)]
x86: spi: Add Intel ICH driver

This supports Intel ICH7/9. The Intel controller is a little unusual in
that it is mostly intended for use with SPI flash, and has some
optimisations and features specifically for that application. In
particular it is not possible to support ongoing transactions that
continue over many calls with SPI_XFER_BEGIN and SPI_XFER_END.

This driver supports writes of up to 64 bytes at a time, the limit
for the controller. Future work will improve this.

Signed-off-by: Bernie Thompson <bhthompson@chromium.org>
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agosf: Use spi_flash_alloc() in each SPI flash driver
Simon Glass [Mon, 11 Mar 2013 06:08:03 +0000 (06:08 +0000)]
sf: Use spi_flash_alloc() in each SPI flash driver

Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agosf: Add spi_flash_alloc() to create a new SPI flash struct
Simon Glass [Mon, 11 Mar 2013 06:08:02 +0000 (06:08 +0000)]
sf: Add spi_flash_alloc() to create a new SPI flash struct

At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agospi: Use spi_alloc_slave() in each SPI driver
Simon Glass [Mon, 18 Mar 2013 19:23:40 +0000 (19:23 +0000)]
spi: Use spi_alloc_slave() in each SPI driver

Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agospi: Add function to allocate a new SPI slave
Simon Glass [Mon, 11 Mar 2013 06:08:00 +0000 (06:08 +0000)]
spi: Add function to allocate a new SPI slave

At present it is difficult to extend the SPI structure since all
drivers allocate it themselves, and few of them zero all fields. Add
a new function spi_alloc_slave() which can be used by SPI drivers
to perform this allocation, and thus ensure that all drivers can
better cope with SPI structure changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agofdt: Add fdtdec_get_addr_size() to read reg properties
Simon Glass [Tue, 19 Mar 2013 04:58:51 +0000 (04:58 +0000)]
fdt: Add fdtdec_get_addr_size() to read reg properties

It is common to have a "reg = <address size>" property in the FDT.
Add a function to handle this, similar to the existing
fdtdec_get_addr();

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Mon, 18 Mar 2013 16:31:00 +0000 (12:31 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end.  We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.

Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h

Build tested for all of ARM and run-time tested on am335x_evm.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoUse 'unsigned int' for global_data's baudrate
Simon Glass [Tue, 5 Mar 2013 14:40:05 +0000 (14:40 +0000)]
Use 'unsigned int' for global_data's baudrate

We decided to used unsigned int here, rather than unsigned long. But
for the generic global_data it is still unsigned long. So change it
over.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agosparc: Fix build warnings in serial.c
Simon Glass [Tue, 5 Mar 2013 14:40:04 +0000 (14:40 +0000)]
sparc: Fix build warnings in serial.c

These macros are already defined in io.h so should not be declared in
serial.c.

serial.c:38:0: warning: "READ_BYTE" redefined
/home/sjg/c/src/third_party/u-boot/files/include/asm/io.h:36:0: note: this is the location of the previous definition
serial.c:39:0: warning: "READ_HWORD" redefined
/home/sjg/c/src/third_party/u-boot/files/include/asm/io.h:37:0: note: this is the location of the previous definition
serial.c:40:0: warning: "READ_WORD" redefined
/home/sjg/c/src/third_party/u-boot/files/include/asm/io.h:38:0: note: this is the location of the previous definition
serial.c:41:0: warning: "READ_DWORD" redefined
/home/sjg/c/src/third_party/u-boot/files/include/asm/io.h:39:0: note: this is the location of the previous definition

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agosparc: Fix out-of-tree building
Simon Glass [Tue, 5 Mar 2013 14:40:03 +0000 (14:40 +0000)]
sparc: Fix out-of-tree building

It isn't clear why the sparc cpu Makefile has its own compile line, but
it does not work correctly with an out-of-tree build. Removing it fixes
this problem. Perhaps it does not introduce others.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoserial: ns16550: Remove unwanted cast
Simon Glass [Tue, 5 Mar 2013 14:40:02 +0000 (14:40 +0000)]
serial: ns16550: Remove unwanted cast

This cast does not seem correct, since we should be writing to a pointer,
not a ulong.

This fixes the following warning on nds32:

-ns16550.c:49: warning: passing argument 2 of 'writeb' makes pointer from integer without a cast

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoavr32: Fix cast warning in board.c
Simon Glass [Tue, 5 Mar 2013 14:40:01 +0000 (14:40 +0000)]
avr32: Fix cast warning in board.c

The frame buffer pointer in global_data is not a pointer, so we should
remove these casts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
11 years agoblackfin: Remove noreturn attribute from cpu_init_f()
Simon Glass [Tue, 5 Mar 2013 14:40:00 +0000 (14:40 +0000)]
blackfin: Remove noreturn attribute from cpu_init_f()

Now that board_init_f() is not marked as noreturn, we need to do the same
to blackfin's cpu_init_f() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoblackfin: Fix up board_type global data
Simon Glass [Tue, 5 Mar 2013 14:39:59 +0000 (14:39 +0000)]
blackfin: Fix up board_type global data

This should be in arch_global_data but was dropped in the change-over.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoexynos5: Enable generic board for Exynos5 device tree boards
Simon Glass [Tue, 5 Mar 2013 14:39:58 +0000 (14:39 +0000)]
exynos5: Enable generic board for Exynos5 device tree boards

Enable CONFIG_SYS_GENERIC_BOARD for all Exynos5 boards that use
CONFIG_OF_CONTROL.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Enable generic board
Simon Glass [Tue, 5 Mar 2013 14:39:57 +0000 (14:39 +0000)]
x86: Enable generic board

This will be used exclusively on x86, so enable it for the whole
architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agotegra: Enable generic board for Tegra
Simon Glass [Tue, 5 Mar 2013 14:39:56 +0000 (14:39 +0000)]
tegra: Enable generic board for Tegra

Bravely enable CONFIG_SYS_GENERIC_BOARD for all Tegra boards.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Enable generic board support
Simon Glass [Mon, 11 Mar 2013 07:40:13 +0000 (07:40 +0000)]
x86: Enable generic board support

This enables generic board support so that x86 boards can define
CONFIG_SYS_GENERIC_BOARD.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Use sections header to obtain link symbols
Simon Glass [Tue, 5 Mar 2013 14:39:54 +0000 (14:39 +0000)]
x86: Use sections header to obtain link symbols

These are defined in asm-generic/sections.h, so remove them from
architecture-specific files.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Adjust board_r.c for x86
Simon Glass [Tue, 5 Mar 2013 14:39:53 +0000 (14:39 +0000)]
x86: Adjust board_r.c for x86

For x86 the global_data is managed entirely by the start.S code so we do
not need to touch it. However, we do have some more initcalls to add.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agox86: Adjust board_f.c for x86
Simon Glass [Tue, 5 Mar 2013 14:39:52 +0000 (14:39 +0000)]
x86: Adjust board_f.c for x86

For x86, things have adjusted somewhat since this series was originally
written. It has its own way of running through initcalls which is actually
nicer than others archs.

Unfortunately this does introduce exceptions. We will soon require use of
generic board on x86, but until then we need to fit in with what is there,
and treat x86 as a special case.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoppc: Enable generic board support
Simon Glass [Mon, 11 Mar 2013 06:50:01 +0000 (06:50 +0000)]
ppc: Enable generic board support

This enables generic board support so that ppc boards can define
CONFIG_SYS_GENERIC_BOARD.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoAdjust board_r.c for ppc
Simon Glass [Thu, 14 Mar 2013 07:20:12 +0000 (07:20 +0000)]
Adjust board_r.c for ppc

This adds ppc features to the generic post-relocation board init.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoAdjust board_f.c for ppc
Simon Glass [Mon, 11 Mar 2013 14:30:42 +0000 (14:30 +0000)]
Adjust board_f.c for ppc

This adds ppc features to the generic pre-relocation board init.

This is a separate commit so that these features are clearly shown.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoAdd CONFIG_SYS_SYM_OFFSETS to support offset symbols
Simon Glass [Mon, 11 Mar 2013 07:06:48 +0000 (07:06 +0000)]
Add CONFIG_SYS_SYM_OFFSETS to support offset symbols

Link symbols as created by the link script can either be absolute or
relative to the text start. This option switches between the two options
so that we can support both.

As we convert architectures over to generic board, we can see if this
option is actually needed, or whether it is possible to unify this feature
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Enable generic board support
Simon Glass [Mon, 11 Mar 2013 06:49:57 +0000 (06:49 +0000)]
arm: Enable generic board support

This enables generic board support so that ARM boards can define
CONFIG_SYS_GENERIC_BOARD.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Remove use of board_early_init_r/last_stage_init()
Simon Glass [Tue, 5 Mar 2013 14:39:46 +0000 (14:39 +0000)]
arm: Remove use of board_early_init_r/last_stage_init()

These boards define CONFIG_LAST_STAGE_INIT and CONFIG_BOARD_EARLY_INIT_R
but these options are not available on ARM. Move them into the powerpc
common file instead.

This change affects: km_kirkwood_pci, mgcoge3un, kmnusa, kmcoge5un,
km_kirkwood and portl2.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoAdd spl load feature
Simon Glass [Tue, 5 Mar 2013 14:39:45 +0000 (14:39 +0000)]
Add spl load feature

This adds secondary program loader support to the generic board.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoIntroduce generic post-relocation board_r.c
Simon Glass [Mon, 11 Mar 2013 14:30:37 +0000 (14:30 +0000)]
Introduce generic post-relocation board_r.c

This file handles common post-relocation init for boards which use
the generic framework.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoIntroduce generic pre-relocation board_f.c
Simon Glass [Mon, 11 Mar 2013 06:49:53 +0000 (06:49 +0000)]
Introduce generic pre-relocation board_f.c

This file handles common pre-relocation init for boards which use
the generic framework.

It starts up the console, DRAM, performs relocation and then jumps
to post-relocation init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
11 years agoDeclare watchdog functions in watchdog.h
Simon Glass [Tue, 5 Mar 2013 14:39:42 +0000 (14:39 +0000)]
Declare watchdog functions in watchdog.h

These functions are only available for powerpc and are not declared in a
header file. We want to use the rest function in two places (board_f and
board_r), so declare the functions in watchdog.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years ago__HAVE_ARCH_GENERIC_BOARD controls availabilty of generic board
Simon Glass [Fri, 8 Mar 2013 13:45:27 +0000 (13:45 +0000)]
__HAVE_ARCH_GENERIC_BOARD controls availabilty of generic board

We are introducing a new unified board setup. Add a check to make sure that
board config files do not define CONFIG_SYS_GENERIC_BOARD unless their
architecture defines __HAVE_ARCH_GENERIC_BOARD

__HAVE_ARCH_GENERIC_BOARD will currently not be the default setting, but
we can switch this later when most architecture support generic board.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoIntroduce a basic initcall implementation
Simon Glass [Tue, 5 Mar 2013 14:39:40 +0000 (14:39 +0000)]
Introduce a basic initcall implementation

This library supports calling a list of functions one after the
other.

It is intended that we move to a more powerful initcall implementation
as proposed by Graeme Russ <graeme.russ@gmail.com>. For now, this allows
us to do the basics.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoChange stub example to use asm-generic/sections.h
Simon Glass [Tue, 5 Mar 2013 14:39:39 +0000 (14:39 +0000)]
Change stub example to use asm-generic/sections.h

We can use the declarations of __bss_start and _end from this header
instead of declaring them locally.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoarm: Use sections header to obtain link symbols
Simon Glass [Tue, 5 Mar 2013 14:39:38 +0000 (14:39 +0000)]
arm: Use sections header to obtain link symbols

Include this header to get access to link symbols, which are otherwise
removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoIntroduce generic link section.h symbol files
Simon Glass [Tue, 5 Mar 2013 14:39:37 +0000 (14:39 +0000)]
Introduce generic link section.h symbol files

We create a separate header file for link symbols defined by the link
scripts. It is helpful to have these all in one place and try to
make them common across architectures. Since Linux already has a similar
file, we bring this in even though many of the symbols there are not
relevant to us.

Each architecture has its own asm/sections.h where symbols specifc to
that architecture can be added. For now everything except AVR32 just
includes the generic header.

One change is needed in arch/avr32/lib/board.c to make this conversion
work.

Reviewed-by: Tom Rini <trini@ti.com> (version 5)
Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoReplace __bss_end__ with __bss_end
Simon Glass [Thu, 14 Mar 2013 06:54:53 +0000 (06:54 +0000)]
Replace __bss_end__ with __bss_end

Note this is a tree-wide change affecting multiple architectures.

At present we use __bss_start, but mostly __bss_end__. This seems
inconsistent and in a number of places __bss_end is used instead.

Change to use __bss_end for the BSS end symbol throughout U-Boot. This
makes it possible to use the asm-generic/sections.h file on all
archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoIntroduce generic u-boot.h file
Simon Glass [Tue, 5 Mar 2013 14:39:35 +0000 (14:39 +0000)]
Introduce generic u-boot.h file

This file holds the board info structure. We need this to be generic
for the unified board series, so create a structure which contains
the basic fields required by the main architectures.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 years agoMerge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 15 Mar 2013 19:50:43 +0000 (20:50 +0100)]
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

11 years agoMerge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 15 Mar 2013 14:18:31 +0000 (15:18 +0100)]
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

11 years agonitrogen: Use unsigned long to specify the total RAM size
fabio.estevam@freescale.com [Thu, 14 Mar 2013 02:32:55 +0000 (02:32 +0000)]
nitrogen: Use unsigned long to specify the total RAM size

When building for the nitrogen boards with 2GiB the following warning happens:

nitrogen6x.c:89:38: warning: integer overflow in expression [-Woverflow]

2GiB can not fit in 32-bits, so use ulong instead.

Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agonitrogen6x: Fix RAM size variable
Fabio Estevam [Thu, 14 Mar 2013 02:32:54 +0000 (02:32 +0000)]
nitrogen6x: Fix RAM size variable

Fix the following build error when buildig nitrogen6s1g:

nitrogen6x.c:89:17: error: 'CONFIG_DDR_MB' undeclared (first use in
this function)
nitrogen6x.c:89:17: note: each undeclared identifier is reported only
once for each function it appears in

Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
11 years agoTegra114: Dalmore: Add pad config tables/code based on pinmux code
Tom Warren [Mon, 11 Mar 2013 23:43:49 +0000 (16:43 -0700)]
Tegra114: Dalmore: Add pad config tables/code based on pinmux code

Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().

Currently, no padcfg entries exist. SDIO3CFG will be added when the
MMC driver is added as per the TRM to work with the SD-card slot on
Dalmore E1611.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: fdt: Move aliases from dtsi to dts file as per other Tegras
Tom Warren [Tue, 12 Mar 2013 00:07:21 +0000 (17:07 -0700)]
Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras

All other Tegra boards have their alias nodes in the .dts file

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits
Tom Warren [Wed, 13 Mar 2013 22:40:33 +0000 (15:40 -0700)]
Tegra114: Dalmore: Always use DEFAULT instead of DISABLE for lock bits

The pinmux code issues a warning if the caller attempts to disable the
lock bit in a pinmux register, since this is impossible (once it's
locked, the only way to unlock it is to reset the device/pmt controller).

The I2C/DDC/CEC/USB macros expect a lock setting to be passed in,
and the previous setting of DISABLE caused the pinmux table parsing
code to issue the warning. Changing the lock bits in these table
entries to DEFAULT (i.e. don't touch it) fixes this.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: Fix/update GP padcfg register struct
Tom Warren [Wed, 13 Mar 2013 22:13:47 +0000 (15:13 -0700)]
Tegra114: Fix/update GP padcfg register struct

Differences in padcfg registers (some removed, some added) between
Tegra30 and Tegra114 weren't picked up when I first ported this file.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra114: pinmux: Fix bad CAM_MCLK func 3 table entry
Tom Warren [Wed, 13 Mar 2013 22:00:54 +0000 (15:00 -0700)]
Tegra114: pinmux: Fix bad CAM_MCLK func 3 table entry

This caused CAM_MCLK's pinmux reg to be locked out, since the
table parsing code couldn't find a matching entry for VI_ALT3
and wrote garbage to the register.

Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoARM: tegra: enable a common set of disk-related commands everywhere
Stephen Warren [Thu, 28 Feb 2013 15:03:48 +0000 (15:03 +0000)]
ARM: tegra: enable a common set of disk-related commands everywhere

Enable a common set of partition types, filesystems, and related
commands in tegra-common.h, so that they are available on all Tegra
boards. This allows boot.scr (loaded and executed by the default
built-in environment) on those boards to assume that certain features
are always available.

Do this in tegra-common.h, so that individual board files can undefine
the features if they really don't want any of them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agodisk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART
Stephen Warren [Thu, 28 Feb 2013 15:03:47 +0000 (15:03 +0000)]
disk: define HAVE_BLOCK_DEVICE if CONFIG_CMD_PART

Various code that is conditional upon HAVE_BLOCK_DEVICE is required by
code conditional upon CONFIG_CMD_PART. So, enable HAVE_BLOCK_DEVICE if
CONFIG_CMD_PART is enabled.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agodisk: define HAVE_BLOCK_DEVICE in a common place
Stephen Warren [Thu, 28 Feb 2013 15:03:46 +0000 (15:03 +0000)]
disk: define HAVE_BLOCK_DEVICE in a common place

This set of ifdefs is used in a number of places. Move its definition
somewhere common so it doesn't have to be repeated.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoARM: tegra: make bounce buffer option common
Stephen Warren [Thu, 28 Feb 2013 15:03:45 +0000 (15:03 +0000)]
ARM: tegra: make bounce buffer option common

All Tegra devices will need CONFIG_BOUNCE_BUFFER. Move it to
tegra-common.h to ensure it's always set.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards
Tom Warren [Tue, 26 Feb 2013 19:36:22 +0000 (12:36 -0700)]
Tegra30: MMC: Enable DT MMC driver support for Tegra30 Cardhu boards

Tested on my Cardhu-A04 tablet, eMMC and SD-Card work fine, can load
a kernel off of an SD card OK, card detect works, and the env is now
stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver
Tom Warren [Mon, 4 Mar 2013 21:07:18 +0000 (14:07 -0700)]
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver

Tegra30 SD/MMC controller differs enough from Tegra20 that it
needs its own entry in the compat_names/compat_id tables and in
the Tegra MMC driver.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agommc: Tegra: Add SD bus power/voltage function and MMC pad init call.
Tom Warren [Tue, 26 Feb 2013 19:31:26 +0000 (12:31 -0700)]
mmc: Tegra: Add SD bus power/voltage function and MMC pad init call.

Tegra30 requires the SD Bus Voltage & Power bits be set in the SD
Power Control register. Tegra20 works w/o them set, but do it anyway
for those SoCs as it's part of the SD spec. Also call a common
board pad init routine (pad_init_mmc) in mmc_reset(), used by
Tegra30 only for now.

Note that Tegra20 SD/MMC HW differs enough from Tegra20 that a
new compatible entry is used in the fdt compat_names/id tables.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra30: MMC: Add SD bus power-rail and SDMMC pad init routines
Tom Warren [Tue, 26 Feb 2013 19:26:55 +0000 (12:26 -0700)]
Tegra30: MMC: Add SD bus power-rail and SDMMC pad init routines

T30 requires specific SDMMC pad programming, and bus power-rail bringup.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: MMC: Added/update SDMMC registers/base addresses for T20/T30
Tom Warren [Tue, 26 Feb 2013 18:17:43 +0000 (11:17 -0700)]
Tegra: MMC: Added/update SDMMC registers/base addresses for T20/T30

Removed SDMMC base addresses from tegra.h since they're no longer used.
Added additional vendor-specific SD/MMC registers and bus power defines.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)
Tom Warren [Tue, 26 Feb 2013 18:14:17 +0000 (11:14 -0700)]
Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)

Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra30: Cardhu: Add pad config tables/code based on pinmux code
Tom Warren [Wed, 6 Mar 2013 23:16:22 +0000 (16:16 -0700)]
Tegra30: Cardhu: Add pad config tables/code based on pinmux code

Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().

Currently, only SDIO1CFG is changed as per the TRM to work with
the SD-card slot on Cardhu.

Thanks to StephenW for the suggestion/original idea.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: pinmux: Update pinmux tables & code, fix a bug w/SDMMC3 init
Tom Warren [Fri, 1 Mar 2013 21:38:20 +0000 (14:38 -0700)]
Tegra114: pinmux: Update pinmux tables & code, fix a bug w/SDMMC3 init

Use the latest tables & code from our internal U-Boot repo.
The SDMMC3_CD, CLK_LB_IN and CLK_LB_OUT offsets in the pingroup
table were off by a few indices, causing the pinmux init code to
write bad data to the PINMUX_AUX_ regs. This also enabled the lock
bit, which made it impossible to reconfig the pads correctly for
SDMMC3 (SD card on Dalmore) operation. Also fixes SPI_CS2_N,
USB_VBUS_EN0, HDMI_CEC and UART2_RXD/TXD muxes.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra30: Cardhu: Remove unneeded cardhu.c.mmc file
Tom Warren [Thu, 28 Feb 2013 06:30:03 +0000 (06:30 +0000)]
Tegra30: Cardhu: Remove unneeded cardhu.c.mmc file

This was an older debug/developmental file that got added
accidentally. Not needed/used in any Cardhu build.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)
Tom Warren [Wed, 27 Feb 2013 05:52:52 +0000 (05:52 +0000)]
Tegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)

Minor edit to tegra_car node, add gpio node.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: Remove unused CONFIG_SYS_CPU_OSC_FREQUENCY define
Tom Warren [Tue, 26 Feb 2013 12:18:48 +0000 (12:18 +0000)]
Tegra: Remove unused CONFIG_SYS_CPU_OSC_FREQUENCY define

This wasn't used anywhere in any Tegra build.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: Add twarren as maintainer for Tegra30 and Tegra114 SoCs
Tom Warren [Tue, 26 Feb 2013 07:59:30 +0000 (07:59 +0000)]
Tegra: Add twarren as maintainer for Tegra30 and Tegra114 SoCs

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoARM: tegra: implement WAR for Tegra114 CPU reset vector
Stephen Warren [Thu, 28 Feb 2013 12:40:09 +0000 (12:40 +0000)]
ARM: tegra: implement WAR for Tegra114 CPU reset vector

A Tegra114 HW bug prevents the main CPU vector from being modified under
certain circumstances. Tegra114 A01P and later with a patched boot ROM
set the CPU reset vector to 0x4003fffc (end of IRAM). This allows placing
an arbitrary jump instruction at that location, in order to redirect to
the desired reset vector location. Modify Tegra114's start_cpu() to make
use of this feature. This allows CPUs with the patched boot ROM to boot.

Based-on-work-by: Jimmy Zhang <jimmzhang@nvidia.com>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoTegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)
Tom Warren [Thu, 21 Feb 2013 13:33:23 +0000 (13:33 +0000)]
Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)

Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files
Tom Warren [Thu, 21 Feb 2013 12:40:29 +0000 (12:40 +0000)]
Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files

Not used, and wrong in Cardhu's case

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: MMC: Add DT support to MMC driver for all T20 boards
Tom Warren [Thu, 21 Feb 2013 12:31:30 +0000 (12:31 +0000)]
Tegra: MMC: Add DT support to MMC driver for all T20 boards

tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.

Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Tom Warren [Thu, 21 Feb 2013 12:31:29 +0000 (12:31 +0000)]
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files

Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: fdt: tamonten: Add common tamonten.dtsi file from linux
Tom Warren [Thu, 21 Feb 2013 12:31:28 +0000 (12:31 +0000)]
Tegra: fdt: tamonten: Add common tamonten.dtsi file from linux

Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: fdt: Change /include/ to #include for C preprocessor
Tom Warren [Thu, 21 Feb 2013 12:31:27 +0000 (12:31 +0000)]
Tegra: fdt: Change /include/ to #include for C preprocessor

dts Makefile has the arch & board include paths added to DTS_CPPFLAGS.
This allows the use of '#include "xyz"' in the dts/dtsi file which
helps the C preprocessor find common dtsi include files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra114: I2C: Enable I2C driver on Dalmore E1611 eval board
Tom Warren [Fri, 8 Feb 2013 07:25:32 +0000 (07:25 +0000)]
Tegra114: I2C: Enable I2C driver on Dalmore E1611 eval board

Tested all 5 'buses', i2c probe enumerates device addresses on bus
0, 1 and 2.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
11 years agoTegra114: fdt: Update DT files with I2C info for T114/Dalmore
Tom Warren [Fri, 8 Feb 2013 07:25:31 +0000 (07:25 +0000)]
Tegra114: fdt: Update DT files with I2C info for T114/Dalmore

T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agoTegra: I2C: Add T114 clock support to tegra_i2c driver
Tom Warren [Fri, 8 Feb 2013 07:25:30 +0000 (07:25 +0000)]
Tegra: I2C: Add T114 clock support to tegra_i2c driver

T114 has a slightly different I2C clock, with a new (extra) divisor
in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C
clock is 100KHz +/- 3Hz on my Saleae Logic analyzer.

Added a new entry in compat_names for T114 I2C since it differs
from the previous Tegra SoCs. A flag is set when T114 I2C HW is
found so new features like the extra clock divisor can be used.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
11 years agoTegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work
Tom Warren [Wed, 27 Feb 2013 11:10:01 +0000 (11:10 +0000)]
Tegra114: I2C: Take DVFS out of reset to allow I2C5 (PWR_I2C) to work

I2C driver can now probe dev 0 (PWR_I2C, where the PMU, etc. lives).
This is needed so that the SDIO slot power can be brought up for
the MMC driver, so it has to precede those commits.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
11 years agotegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]
Lucas Stach [Thu, 7 Feb 2013 07:16:30 +0000 (07:16 +0000)]
tegra: usb: move [start|stop]_port into ehci_hcd_[init|stop]

The ehci_hcd entry points were just calling into the Tegra USB
functions. Now that they are in the same file we can just move over the
implementation.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: move implementation into right directory
Lucas Stach [Thu, 7 Feb 2013 07:16:29 +0000 (07:16 +0000)]
tegra: usb: move implementation into right directory

This moves the Tegra USB implementation into the drivers/usb/host
directory. Note that this merges the old
/arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code
changes, just moving stuff around.

v2: While at it also move some defines and the usb.h header file to make
usb driver usable for Tegra30.
NOTE: A lot more work is required to properly init the PHYs and PLL_U on
Tegra30, this is just to make porting easier and it does no harm here.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: various small cleanups
Lucas Stach [Thu, 7 Feb 2013 07:16:28 +0000 (07:16 +0000)]
tegra: usb: various small cleanups

Remove unneeded headers, function prototype and stale comment, that
doesn't match the actual codebase anymore.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: move controller init into start_port
Lucas Stach [Thu, 7 Feb 2013 07:16:27 +0000 (07:16 +0000)]
tegra: usb: move controller init into start_port

There is no need to init a USB controller before the upper layers indicate
that they are actually going to use it.

board_usb_init now only parses the device tree and sets up the common pll.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: remove unneeded function parameter
Lucas Stach [Thu, 7 Feb 2013 07:16:26 +0000 (07:16 +0000)]
tegra: usb: remove unneeded function parameter

Just a dead parameter, never actually used.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: make controller init functions more self contained
Lucas Stach [Thu, 7 Feb 2013 07:16:25 +0000 (07:16 +0000)]
tegra: usb: make controller init functions more self contained

There is no need to pass around all those parameters. The init functions
are able to easily extract all the needed setup info on their own.

This allows to move out the controller init into ehci_hcd_init later
on, without having to save away global state for later use  and thus
bloating the file global state.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agotegra: usb: set USB_PORTS_MAX to correct value
Lucas Stach [Thu, 7 Feb 2013 07:16:24 +0000 (07:16 +0000)]
tegra: usb: set USB_PORTS_MAX to correct value

Both Tegra20 and Tegra30 have a max of 3 USB controllers.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
11 years agoARM: tegra: enable some CPU errata workarounds
Stephen Warren [Tue, 26 Feb 2013 12:28:28 +0000 (12:28 +0000)]
ARM: tegra: enable some CPU errata workarounds

Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such,
some CPU errata exist, and must be worked around.

These must be worked around in the bootloader, since in general, the
kernel (especially a multi-platform kernel) needs to support being
launched in non-secure mode (normal world), and hence may not be able
to write to the CP15 register to enable these workarounds.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
11 years agoARM: implement some Cortex-A9 errata workarounds
Stephen Warren [Tue, 26 Feb 2013 12:28:27 +0000 (12:28 +0000)]
ARM: implement some Cortex-A9 errata workarounds

Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.

This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoAdd Boundary Devices Nitrogen6X boards
Eric Nelson [Mon, 11 Mar 2013 08:44:53 +0000 (08:44 +0000)]
Add Boundary Devices Nitrogen6X boards

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
11 years agoRefactor linker-generated arrays
Albert ARIBAUD [Mon, 25 Feb 2013 00:59:00 +0000 (00:59 +0000)]
Refactor linker-generated arrays

Refactor linker-generated array code so that symbols
which were previously linker-generated are now compiler-
generated. This causes relocation records of type
R_ARM_ABS32 to become R_ARM_RELATIVE, which makes
code which uses LGA able to run before relocation as
well as after.

Note: this affects more than ARM targets, as linker-
lists span possibly all target architectures, notably
PowerPC.

Conflicts:
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
board/ait/cam_enc_4xx/u-boot-spl.lds
board/davinci/da8xxevm/u-boot-spl-da850evm.lds
board/davinci/da8xxevm/u-boot-spl-hawk.lds
board/vpac270/u-boot-spl.lds

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
11 years agoarm: make __bss_start and __bss_end__ compiler-generated
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:59 +0000 (00:58 +0000)]
arm: make __bss_start and __bss_end__ compiler-generated

Turn __bss_start and __bss_end__ from linker-generated
to compiler-generated symbols, causing relocations for
these symbols to change type, from R_ARM_ABS32 to
R_ARM_RELATIVE.

This should have no functional impact, as it affects
references to __bss_start and __bss_end__ only before
relocation, and no such references are done.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
11 years agoRemove linker lists (LGAs) from SPL linker scripts
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:58 +0000 (00:58 +0000)]
Remove linker lists (LGAs) from SPL linker scripts

Many SPL linker scripts needlessly include linker lists (aka LGAs).
Remove them whenever possible; keep it only in the seven am335x_evm
variants (am335x_evm, am335x_evm_uart[1-5], am335x_evm_spiboot),
where there is actual content in output section .u_boot_list.

This commit keeps all u-boot.bin and u-boot-spl.bin in ARM targets
byte-identical.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
11 years agoarm: omap: map u_boot_lists section to .sram
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:57 +0000 (00:58 +0000)]
arm: omap: map u_boot_lists section to .sram

Output section .u_boot_list was left unmapped in
u-boot-spl.lds for omap-common, causing the location
counter to roll back to bteween .rodata and .data,
making __image_copy_end and _end symbols wrong.

Mapping output section .u_boot_list to memory .sram
fixes these symbols' mapping.

This modifies the SPL binary but has no functional
impact, as __image_copy_end and _end are never used
in SPLs and u_boot_list is empty for all 29 boards
affected (omap4_sdp4430 eco5pk igep0030 am335x_evm_uart3
omap3_beagle am3517_crane igep0032 mt_ventoux pcm051
am3517_evm omap3_evm_quick_mmc am335x_evm_uart2
am335x_evm_spiboot am335x_evm_uart1 omap3_evm igep0030_nand
omap3_overo igep0020 am335x_evm omap4_panda omap5_evm
am335x_evm_uart4 devkit8000 tricorder mcx twister
omap3_evm_quick_nand am335x_evm_uart5 igep0020_nand).

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
11 years agoI2C: S3C24X0: Bug fixes in i2c_transfer
Rajeshwari Shinde [Tue, 19 Feb 2013 02:19:45 +0000 (02:19 +0000)]
I2C: S3C24X0: Bug fixes in i2c_transfer

This patch corrects the following issues

1) Write the correct M/T Stop value to I2CSTAT after i2c write.
   According to the spec, after finish the data transmission, we should
   write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of
   a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA).
2) Not split the write to I2CSTAT into 2 steps in i2c read.
   According to the spec, we should write the combined M/R Start value to
   I2CSTAT after setting the slave address to I2CDS
3) Fix the mistake of making an equality check to an assignment.
   In the case of I2C write with the zero-length address, while tranfering the
   data, it should be an equality check (==) instead of an assignment (=).

Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
11 years agoI2C: S3C24X0: Remove the dead code
Rajeshwari Shinde [Mon, 18 Feb 2013 19:58:11 +0000 (19:58 +0000)]
I2C: S3C24X0: Remove the dead code

This revomes the code under #if 0 in the s3c24x0_i2c driver.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agocmd_mem.c: Fix warning when CONFIG_CMD_MEMTEST is not set
Tom Rini [Tue, 12 Mar 2013 14:07:19 +0000 (10:07 -0400)]
cmd_mem.c: Fix warning when CONFIG_CMD_MEMTEST is not set

mem_test_quick and mem_test_alt functions are only called by
do_mem_mtest, so move them under the #ifdef

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoCONFIG_BOOTDELAY default should not affect runtime
Joe Hershberger [Fri, 8 Feb 2013 10:28:00 +0000 (10:28 +0000)]
CONFIG_BOOTDELAY default should not affect runtime

Because the code that handles bootdelay is compiled in conditionally
based on the default value, you are restricted in the default,
regardless of what you want the runtime options to be.

Change the source to always check if any default is given so that other
values can be selected and used at runtime.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
11 years agocommon/main: move set_working_fdt_addr to enable usage of $fdtaddr
Barak Wasserstrom [Wed, 27 Feb 2013 08:48:41 +0000 (08:48 +0000)]
common/main: move set_working_fdt_addr to enable usage of $fdtaddr

When using $fdtaddr in $bootcmd and $bootcmd is automatically called,
$fdtaddr is yet not defined.

Signed-off-by: Barak Wasserstrom <wbarak@gmail.com>
11 years agoenv: fix "env ask" command
Wolfgang Denk [Wed, 20 Feb 2013 04:53:16 +0000 (04:53 +0000)]
env: fix "env ask" command

The "env ask" traditionally uses a somewhat awkward syntax:

env ask name [message ...] [size]

So far, when a mesage was given, you always also had to enter a size.
If you forgot to do that, the command would terminate without any
indication of the problem.

To avoid incompatible changes of the interface, we now check the last
argument if it can be converted into a decimal number.  If this is the
case, we assume it is a size; otherwise we treat it as part of the
message.

Also, add a space after the message fore easier reading,
and clean up help mesage.

Signed-off-by: Wolfgang Denk <wd@denx.de>
11 years agocmd_fat.c: Note in fatread help about alignment requirements
Tom Rini [Thu, 21 Feb 2013 06:55:40 +0000 (06:55 +0000)]
cmd_fat.c: Note in fatread help about alignment requirements

When using the partial read feature of fatwrite the buffer we read into
can become unaligned not just due to initial location but the size of
our partial reads as well.  Make this clear in the help text.

Signed-off-by: Tom Rini <trini@ti.com>
11 years agoMerge branch 'u-boot-atmel/master' into 'u-boot-arm/master'
Albert ARIBAUD [Tue, 12 Mar 2013 16:27:44 +0000 (17:27 +0100)]
Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'

11 years agoARM: sam9x5: fix ethernet pins in MII mode
Jesse Gilles [Wed, 27 Feb 2013 23:42:49 +0000 (23:42 +0000)]
ARM: sam9x5: fix ethernet pins in MII mode

Fix pin setting in MII mode

Signed-off-by: Jesse Gilles <jgilles@multitech.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>