Lukasz Majewski [Tue, 15 May 2018 14:26:43 +0000 (16:26 +0200)]
sandbox: tests: Add tests for mc34708 PMIC device
Following tests has been added for mc34708 device:
- get_test for mc34708 PMIC
- Check if proper number of registers is read
- Check if default (emulated via i2c device) value is properly read
- Check if value write/read operation is correct
- Perform tests to check if pmic_clrsetbits() is working correctly
Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Tue, 15 May 2018 14:26:38 +0000 (16:26 +0200)]
pmic: Rewrite the pmic command to not only work with single byte transmission
Up till now it was only possible to use 'pmic' command with a single byte
transmission.
The pmic_read|write functions has been replaced with ones, which don't need
the transmission length as a parameter.
Due to that it is possible now to read data from PMICs transmitting more
data than 1 byte at once (e.g. mc34708)
Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Thu, 17 May 2018 12:12:04 +0000 (00:12 +1200)]
net: MVGBE don't automatically select PHYLIB
When Kconfig support was added for MVGBE it included automatically
selected PHYLIB support. But MVGBE does not need PHYLIB it will build
fine without it. Commit ed52ea507f12 ("net: add Kconfig for MVGBE")
should have been a no-op in terms of build size but because of the
selecting PHYLIB the openrd configs increased in size.
Remove the automatic selection of PHYLIB, boards that need it will have
already enabled it in their config header file.
Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE") Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
dts: pinctrl: Provide IMX_PAD_SION definition for imx53 pinctrl
The SION pin must be set for proper operation of I2C when DM is enabled.
When legacy I2C is used, this bit is set implicitly in the u-boot code:
arch/arm/include/asm/arch-mx5/iomux-mx53.h:92:
MX53_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x368, 0x040, 4 |
IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL),
The Linux kernel uses similar approach with:
arch/arm/boot/dts/imx53-tqma53.dtsi:182:
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
After applying this patch it is possible to have the I2C working with DM
on imx53 devices:
Ian Ray [Wed, 25 Apr 2018 14:57:04 +0000 (16:57 +0200)]
board: ge: bx50v3: remove redundant targets
This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3.
The boards are identified automatically at runtime.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 25 Apr 2018 14:57:03 +0000 (16:57 +0200)]
board: ge: bx50v3: configure video arguments using VPD
Configure video arguments at run-time instead of at compile-time.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 25 Apr 2018 14:57:02 +0000 (16:57 +0200)]
board: ge: bx50v3: use VPD instead of compile-time checks
B{46}50v3s have an internal LCD that needs to be configured,
in comparison with B850v3 which has only external displays.
Use VPD instead of `CONFIG_TARGET_GE_B{4,6,8}50V3' compile-time
checks to correct initialize video based on the monitor type.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 25 Apr 2018 14:57:00 +0000 (16:57 +0200)]
board: ge: bx50v3: fix display support for b{46}50v3
Enable Video PLL to fix non-working display support for Bx50v3
internal displays.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ian Ray [Wed, 25 Apr 2018 14:56:58 +0000 (16:56 +0200)]
board: ge: bx50v3: rename detect_baseboard function
The detect_baseboard() function actually determines whether there is an
internal LCD panel or not. Rename for clarity.
Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
tools: buildman: Don't use the working dir as build dir
When the U-Boot base directory happens to have the same name as the branch
that buildman is directed to use via the '-b' option and no output
directory is specified with '-o', buildman happily starts removing the
whole U-Boot sources eventually only stopped with the error message:
OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg
Add a check to avoid this and also deal with the case where '-o' points
to the source directory, or any subdirectory of it.
Finally, tidy up the confusing logic for removing the old tree when using
-b. This is only done when building a branch.
usb: f_mass_storage: Fix set_bit and clear_bit usage
Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h
Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hold-over from porting the Linux driver into u-boot.
These days __set_bit and __clear_bit are optionally provided by an arch and
can be used as inputs to generic_bit_set and generic_bit_clear.
This patch switches over to generic_set_bit and generic_clear_bit to
accommodate.
nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nds32 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
nds32: Define PLATFORM__SET_BIT for generic_set_bit()
nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
nios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nios2 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
nios2: Define PLATFORM__SET_BIT for generic_set_bit()
nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().
This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
riscv bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
riscv: Define PLATFORM__SET_BIT for generic_set_bit()
riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
x86: Define PLATFORM__SET_BIT for generic_set_bit()
x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().
This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code.
When imported into u-boot we need to add the appropriate SPDX tag and
re-format it slightly.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
video: dw_hdmi: fix HSYNC and VSYNC polarity settings
Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
EDID and vice versa. Fix it, since it breaks displays where HSYNC
and VSYNC polarity differs
Add no-ops for GMAC clocks observed to be requested which match the
clk_enable cases in RK3368 and RK3399.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Cc: Wadim Egorov <w.egorov@phytec.de> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jonathan Gray [Tue, 8 May 2018 10:43:01 +0000 (20:43 +1000)]
rockchip: set SYS_NS16550_MEM32 for all SoCs
Add back part of patch send out as
'rockchip: enable SYS_NS16550 for all SoCs by default' that seems to have
gotten lost when it got merged to set SYS_NS16550_MEM32.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Chris Packham [Thu, 10 May 2018 01:28:30 +0000 (13:28 +1200)]
ARM: mvebu: a38x: restore support for setting timing
This restores support for configuring the timing mode based on the
ddr_topology. This was originally implemented in commit 90bcc3d38d2b
("driver/ddr: Add support for setting timing in hws_topology_map") but
was removed as part of the upstream sync.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Thu, 10 May 2018 01:28:29 +0000 (13:28 +1200)]
ARM: mvebu: a38x: sync ddr training code with upstream
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef
Chris Packham [Thu, 10 May 2018 01:28:28 +0000 (13:28 +1200)]
ARM: mvebu: a38x: remove some unused code
No in-tree code defines SUPPORT_STATIC_DUNIT_CONFIG or
STATIC_ALGO_SUPPORT. Remove ddr3_a38x_mc_static.h and use unifdef to
remove unused sections in the rest of the ddr/marvell/a38x code.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Thu, 10 May 2018 01:28:27 +0000 (13:28 +1200)]
ARM: mvebu: a38x: move sys_env_device_rev_get
Move sys_env_device_rev_get() from the ddr training code to
sys_env_lib.c (which currently resides with the serdes code). This
brings sys_env_device_rev_get() into line with sys_env_device_id_get()
and sys_env_model_get().
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Thu, 10 May 2018 01:28:26 +0000 (13:28 +1200)]
ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS
PEX_CFG_DIRECT_ACCESS was defined in ddr3_hws_hw_training_def.h despite
only being used in the serdes code. Move this definition to ctrl_pex.h
where all the other PEX defines are. Also remove the duplicate
definition of PEX_DEVICE_AND_VENDOR_ID which is already defined in
ctrl_pex.h.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:31 +0000 (17:21 +0200)]
arm64: mvebu: Add basic support for the Turris Mox board
This adds basic support for the Turris Mox board from CZ.NIC, which is
currently being crowdfunded on Indiegogo.
Turris Mox is as modular router based on the Armada 3720 SOC (same as
EspressoBin).
The basic module can be extended by different modules. The device tree
binary for the kernel can be dependent on which modules are connected,
and in what order. Because of this, the board specific code creates
in U-Boot a variable called module_topology, which carries this
information.
Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:30 +0000 (17:21 +0200)]
watchdog: Add support for Armada 37xx CPU watchdog
This adds support for the CPU watchdog found on Marvell Armada 37xx
SoCs.
There are 4 counters which can be set as CPU watchdog counters.
This driver uses the second counter (ID 1, counting from 0)
(Marvell's Linux also uses second counter by default).
In the future it could be adapted to use other counters, with
definition in the device tree.
Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:29 +0000 (17:21 +0200)]
net: mvneta: Fix fault when wrong device tree
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.
Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:26 +0000 (17:21 +0200)]
spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequency
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.
Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.
Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:25 +0000 (17:21 +0200)]
driver: clk: Add support for clocks on Armada 37xx
The drivers are based on Linux driver by Gregory Clement.
The TBG clocks support only the .get_rate method.
- since setting rate is not supported, the driver computes the rates
when probing and so subsequent calls to the .get_rate method do not
read the corresponding registers again
The peripheral clocks support methods .get_rate, .enable and .disable.
- the .set_parent method theoretically could be supported on some clocks
(the parent would have to be one of the TBG clocks)
- the .set_rate method would have to try all the divider values to find
the best approximation of a given rate, and it doesn't seem like
this should be needed in U-Boot, therefore not implemented
Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Tue, 24 Apr 2018 15:21:24 +0000 (17:21 +0200)]
phy: marvell: a3700: Save/restore selector reg in SGMII init
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.
Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
projects / u-boot / log