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9 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 4 May 2015 21:50:20 +0000 (17:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

9 years agosunxi: usb: Protect phy-init and phy-power-on against multiple calls
Hans de Goede [Mon, 27 Apr 2015 14:57:54 +0000 (16:57 +0200)]
sunxi: usb: Protect phy-init and phy-power-on against multiple calls

Once we add support for the ohci controller the phy-init and phy-power-on
functions may be called twice (once by the ehci code and once by the ohci
code) protect them against this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usb: Do not call phy_probe from hcd code
Hans de Goede [Mon, 27 Apr 2015 14:50:04 +0000 (16:50 +0200)]
sunxi: usb: Do not call phy_probe from hcd code

The 2/3 usb-phys on the sunxi SoCs are really a single separate functional
block, and are modelled as such in devicetree. So once we've moved all the
sunxi usb code to the driver-model then phy_probe will be called once
for the entire block from the driver-model enumeration code.

Move to this now as this also avoids problems with phy_probe being called
multiple times once we introduce ohci support. This also allows us to get rid
of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed
to be called only once.

Since we're effectively rewriting the probe / remove functions, move them
to the end of the file while we are at it, as that is the most logical place
for them.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usb: Rename the usbc.? files to usb_phy.?
Hans de Goede [Mon, 27 Apr 2015 13:05:10 +0000 (15:05 +0200)]
sunxi: usb: Rename the usbc.? files to usb_phy.?

The usbc.? files now only contain usb-phy related code, rename them to make
this clear.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usb: Rename sunxi_usbc_foo functions to sunxi_usb_phy_bar
Hans de Goede [Mon, 27 Apr 2015 12:54:47 +0000 (14:54 +0200)]
sunxi: usb: Rename sunxi_usbc_foo functions to sunxi_usb_phy_bar

Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear
that these are usb-phy functions. Also change the verbs & nouns in the suffix
to match the verbs & nouns used in the Linux kernels generic phy framework.

This patch purely renames things, it contains no functional changes.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usb: Remove sunxi_usbc_get_io_base function
Hans de Goede [Mon, 27 Apr 2015 12:36:23 +0000 (14:36 +0200)]
sunxi: usb: Remove sunxi_usbc_get_io_base function

This is the only function left in sunxi/usbc.c which is not phy related,
so remove it.

This is a preparation patch for turning the usbc.c code into a proper
usb phy driver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usb: Move setup of host controller clocks to the host controller drivers
Hans de Goede [Mon, 27 Apr 2015 09:44:22 +0000 (11:44 +0200)]
sunxi: usb: Move setup of host controller clocks to the host controller drivers

The sunxi "usbc" code is mostly about phy setup, but currently also sets up
the host controller clocks, which is something which really belongs in the
host controller drivers, so move it there.

This is a preparation patch for moving the sunxi ehci code to the driver
model and for adding ohci support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Remove non driver-model support from the axp gpio code
Hans de Goede [Sun, 26 Apr 2015 09:19:37 +0000 (11:19 +0200)]
sunxi: axp: Remove non driver-model support from the axp gpio code

Now that all sunxi boards are using driver-model for gpio (*), we can remove
the non driver-model support from the axp gpio code, and the glue to call
into the axp gpio code from the sunxi_gpio non driver-model code.

*) For the regular u-boot build, SPL still uses non driver-model gpio for
now, but the SPL never uses axp gpios support and we were already not building
axp-gpio support for the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: emac: Remove non driver-model code
Hans de Goede [Thu, 23 Apr 2015 16:47:47 +0000 (18:47 +0200)]
sunxi: emac: Remove non driver-model code

All sunxi boards now use the driver-model, so remove the non driver-model
code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Move all boards to the driver-model
Hans de Goede [Wed, 15 Apr 2015 18:46:48 +0000 (20:46 +0200)]
sunxi: Move all boards to the driver-model

Now that we've everything prepared for it remove the DM settings from the
defconfig(s) and simply always set them for sunxi.

This makes all sunxi boards allways use the driver model for gpios and
ethernet, and allows us to move over more bits to the driver-model without
the need to introduce #ifdef-ery for boards which are not yet using DM.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: dts: Add a CONFIG_DEFAULT_DEVICE_TREE setting to all sunxi boards
Hans de Goede [Sat, 18 Apr 2015 21:32:23 +0000 (23:32 +0200)]
sunxi: dts: Add a CONFIG_DEFAULT_DEVICE_TREE setting to all sunxi boards

This is a preparation patch for switching all sunxi boards over to using
the driver model.

Note that rather then defining both CONFIG_DEFAULT_DEVICE_TREE (for u-boot)
and CONFIG_FDTFILE (for the kernel), this commit simply replaces all
CONFIG_FDTFILE defconfig settings with CONFIG_DEFAULT_DEVICE_TREE and
uses CONFIG_DEFAULT_DEVICE_TREE for setting the default fdtfile env value
in sunxi-common.h .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: dts: Add minimal dts files for board which lack a dts sofar
Hans de Goede [Thu, 23 Apr 2015 15:04:19 +0000 (17:04 +0200)]
sunxi: dts: Add minimal dts files for board which lack a dts sofar

u-boot has support for a number of boards for which a dts file still needs
to be written, add minimal dts files for these boards so that we can switch
them over to driver-model / fdt.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agosunxi: dts: Add dts files which have been submitted but not yet merged upstream
Hans de Goede [Thu, 23 Apr 2015 12:27:01 +0000 (14:27 +0200)]
sunxi: dts: Add dts files which have been submitted but not yet merged upstream

We need dts files for all boards we support, so bring in a few unmerged ones,
these will be replaced with the upstream merged versions the next time we
sync dts files.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: dts: Sync all dts files with upstream kernel
Hans de Goede [Wed, 15 Apr 2015 17:03:49 +0000 (19:03 +0200)]
sunxi: dts: Sync all dts files with upstream kernel

Bring all the sunxi dts files (and update existing ones) from
mripard/sunxi/dt-for-4.1 (which will be merged into upstream master any
day now). This is necessary so that we can move all sunxi boards over to
the driver model.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: emac: Add driver model support
Hans de Goede [Sun, 19 Apr 2015 09:48:19 +0000 (11:48 +0200)]
sunxi: emac: Add driver model support

Modify the sunxi-emac eth driver to support driver model.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
9 years agosunxi: emac: Rename DMA_CPU_TRRESHOLD to EMAC_RX_BUFSIZE
Hans de Goede [Sat, 25 Apr 2015 11:46:28 +0000 (13:46 +0200)]
sunxi: emac: Rename DMA_CPU_TRRESHOLD to EMAC_RX_BUFSIZE

Besides being spelled wrong, the DMA_CPU_TRRESHOLD define actually has
nothing to do with DMA as we only use mmio fifo access. Rename it to
EMAC_RX_BUFSIZE to properly reflect what it does.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
9 years agosunxi: emac: Prepare for driver-model support
Hans de Goede [Sat, 18 Apr 2015 12:44:38 +0000 (14:44 +0200)]
sunxi: emac: Prepare for driver-model support

Split all the core functionality out into functions taking a
struct emac_eth_dev *priv argument as preparation for adding driver-model
support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
9 years agosunxi: emac: port to phylib
Hans de Goede [Thu, 16 Apr 2015 19:47:06 +0000 (21:47 +0200)]
sunxi: emac: port to phylib

This is a preparation-patch for adding device-model support to the emac
driver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
9 years agosunxi: gmac: Move sunxi_gmac_initialize proto out of netdev.h
Hans de Goede [Wed, 22 Apr 2015 15:55:10 +0000 (17:55 +0200)]
sunxi: gmac: Move sunxi_gmac_initialize proto out of netdev.h

netdev.h should not be included in driver-model enabled builds (doing so
causes compiler warnings about struct eth_driver not being declared), but
we do use sunxi_gmac_initialize in the driver-model case, so move it out of
netdev.h .

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Add driver-model support to the axp_gpio code
Hans de Goede [Wed, 22 Apr 2015 09:31:22 +0000 (11:31 +0200)]
sunxi: axp: Add driver-model support to the axp_gpio code

Add driver-model support to the axp_gpio code, note that this needs a small
tweak to the driver-model version of sunxi_name_to_gpio to deal with the
vbus detect and enable pins which are not standard numbered gpios.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Move axp gpio code to a separate axpi-gpio driver
Hans de Goede [Sat, 25 Apr 2015 15:25:14 +0000 (17:25 +0200)]
sunxi: axp: Move axp gpio code to a separate axpi-gpio driver

Move the axp-gpio code out of the drivers/power/axp*.c code, and into
a new separate axpi-gpio driver.

This change drops supports for the gpio3 pin on the axp209, as that requires
special handling, and no boards are using it.

Besides cleaning things up by moving the code to a separate driver, as
a bonus this change also adds support for the (non vusb) gpio pins on the
axp221 and the gpio pins on the axp152.

The new axp-gpio driver gets its own Kconfig option, and is only enabled
on boards which need it. Besides that it only gets enabled in the regular
u-boot build and not for the SPL as we never need it in the SPL.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Add support for i2c based PMICs to the pmic-bus helpers
Hans de Goede [Sat, 25 Apr 2015 20:18:09 +0000 (22:18 +0200)]
sunxi: axp: Add support for i2c based PMICs to the pmic-bus helpers

Add support for the axp152 and axp209 PMICs to the pmic register access
helpers. This is a preparation patch for moving the axp gpio code to a
separate gpio driver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Move axp pmic register helpers to a separate file
Hans de Goede [Sat, 25 Apr 2015 12:07:37 +0000 (14:07 +0200)]
sunxi: axp: Move axp pmic register helpers to a separate file

Move the register helpers used to access the registers via p2wi resp.
rsb bus on the otherwise identical axp221 and axp223 pmics to a separate
file, so that they can be used by the upcoming standalone axp gpio driver
too.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: axp: Change axp_gpio_foo prototypes to match gpio uclass ops
Hans de Goede [Wed, 22 Apr 2015 14:27:01 +0000 (16:27 +0200)]
sunxi: axp: Change axp_gpio_foo prototypes to match gpio uclass ops

Change the axp_gpio_foo function prototypes to match the gpio uclass op
prototypes, this is a preparation patch for moving the axp gpio code to
a separate driver-model gpio driver.

Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c
this adds are removed in a later patch.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: gpio: Build sunxi_name_to_gpio_bank for driver-model code too
Hans de Goede [Wed, 22 Apr 2015 15:59:01 +0000 (17:59 +0200)]
sunxi: gpio: Build sunxi_name_to_gpio_bank for driver-model code too

When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank
(for now) for the mmc pinmux code in board/sunxi/board.c, so build it for
driver-model enabled builds too.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: gpio: Add compatible strings for all supported SoCs
Hans de Goede [Wed, 22 Apr 2015 09:29:38 +0000 (11:29 +0200)]
sunxi: gpio: Add compatible strings for all supported SoCs

We want to use driver-model/fdt with other model SoCs too, so add
compatible strings for the other SoCs to the dm sunxi gpio code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: gpio: Add temporary implementation of name_to_gpio()
Simon Glass [Sat, 18 Apr 2015 17:33:43 +0000 (11:33 -0600)]
sunxi: gpio: Add temporary implementation of name_to_gpio()

Until sunxi moves to device tree (e.g. for USB) we need to convert named
GPIOs to numbers. Add a function to do this.

This fixes the USB / EHCI support not working on the LinkSprite pcDuino3
(which uses devicemodel).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: gpio: Rename GPIOs to include a 'P' prefix
Simon Glass [Sat, 18 Apr 2015 17:33:44 +0000 (11:33 -0600)]
sunxi: gpio: Rename GPIOs to include a 'P' prefix

By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change
the driver model GPIO driver for sunxi to use these names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: soft-i2c: Fix gpio handling to work with the driver-model
Hans de Goede [Thu, 23 Apr 2015 21:23:50 +0000 (23:23 +0200)]
sunxi: soft-i2c: Fix gpio handling to work with the driver-model

i2c_init_board() gets called before the driver-model (gpio) code is
initialized, so move the setup of the soft-i2c pins out of i2c_init_board()
and into board_init(), at which time the driver-model setup has been done.

Also add proper error checking and properly request the gpios as that is
mandatory with the driver-model.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: display: Fix gpio handling to work with the driver-model
Hans de Goede [Wed, 22 Apr 2015 15:45:59 +0000 (17:45 +0200)]
sunxi: display: Fix gpio handling to work with the driver-model

The driver-model gpio functions may return another value then -1 as error,
make the sunxi display code properly handle this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usbc: Fix vbus gpio handling to work with the driver-model
Hans de Goede [Wed, 22 Apr 2015 15:39:59 +0000 (17:39 +0200)]
sunxi: usbc: Fix vbus gpio handling to work with the driver-model

The driver-model gpio functions may return another value then -1 as error,
make the sunxi usbc properly handle this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: mmc: Fix card-detect gpio handling to work with the driver-model
Hans de Goede [Wed, 22 Apr 2015 15:03:17 +0000 (17:03 +0200)]
sunxi: mmc: Fix card-detect gpio handling to work with the driver-model

The driver-model gpio functions may return another value then -1 as error,
make the sunxi mmc code properly handle this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Do not build i2c support when we've no i2c controllers
Hans de Goede [Thu, 23 Apr 2015 15:47:22 +0000 (17:47 +0200)]
sunxi: Do not build i2c support when we've no i2c controllers

This fixes the following errors being printed during boot:

Error, wrong i2c adapter 0 max 0 possible
Error, wrong i2c adapter 0 max 0 possible

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add Ippo_q8h_v1_2_a33_1024x600 defconfig
Hans de Goede [Tue, 7 Apr 2015 07:06:39 +0000 (09:06 +0200)]
sunxi: Add Ippo_q8h_v1_2_a33_1024x600 defconfig

Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb,
with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add softwinner astar mid756 A33 tablet board defconfig
Vishnu Patekar [Sun, 1 Mar 2015 18:24:48 +0000 (23:54 +0530)]
sunxi: Add softwinner astar mid756 A33 tablet board defconfig

The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen,
512M RAM, 8G ROM and integrated sdio wifi.

Also see: http://linux-sunxi.org/Softwinner_astar-rda

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add basic A33 basic support
Vishnu Patekar [Sun, 1 Mar 2015 18:17:48 +0000 (23:47 +0530)]
sunxi: Add basic A33 basic support

Enable full support for the A33 SoC including display, otg-usb, etc.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add a33 dram init code
Vishnu Patekar [Sun, 1 Mar 2015 18:19:39 +0000 (23:49 +0530)]
sunxi: Add a33 dram init code

Based on Allwinner dram init code from the a33 bsp:
https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c

Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by
Hans de Goede.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Add support for A33 PLL11 (second DRAM pll)
Hans de Goede [Sun, 12 Apr 2015 09:46:41 +0000 (11:46 +0200)]
sunxi: Add support for A33 PLL11 (second DRAM pll)

Add support for the new second DRAM PLL found on the A33 SoC.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: s/sun8i/sun8i_a23/
Hans de Goede [Mon, 6 Apr 2015 18:55:39 +0000 (20:55 +0200)]
sunxi: s/sun8i/sun8i_a23/

This is a preparation patch for adding A33 support, which will have a
mach name of sun8i-a33.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool
Hans de Goede [Mon, 6 Apr 2015 18:33:34 +0000 (20:33 +0200)]
sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig bool

sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.

This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be
used to check for these features avoiding the need for an ever growing list
of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more
"new style" sunxi SoCs.

Note that this commit changes the behavior of the gmac and hdmi code for
sun8i and the upcoming sun9i devices. This does not matter as sun8i does
not have gmac nor hdmi, and sun9i has new hardware-blocks for these so
the old code will not work there.

Also this is intentional as if a sun8i / sun9i variant which does use the
old hwblocks shows up then the GEN_SUN6I code paths will be the right ones
to use.

For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: usbc: Remove unused irq field
Hans de Goede [Mon, 6 Apr 2015 18:17:46 +0000 (20:17 +0200)]
sunxi: usbc: Remove unused irq field

We do not use irqs in u-boot so remove the unused irq field, and all the
 #ifdef-ery around the irq initialization.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosunxi: Also set Auxiliary Ctl SMP bit in SPL
Hans de Goede [Mon, 6 Apr 2015 18:16:36 +0000 (20:16 +0200)]
sunxi: Also set Auxiliary Ctl SMP bit in SPL

There is no reason not to and this make the #ifdef-ery easier to read.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agosun7i: Remove duplicate call to psci_arch_init
Jan Kiszka [Tue, 21 Apr 2015 05:18:25 +0000 (07:18 +0200)]
sun7i: Remove duplicate call to psci_arch_init

This is already invoked a few cycles later in monitor mode by
_secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers
_secure_monitor via smc #0). Drop it here, it serves no purpose.

CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Tested-by: Ian Campbell <ijc@hellion.org.uk>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agox86: Enable multi-core init for Minnowboard MAX
Simon Glass [Thu, 30 Apr 2015 04:26:03 +0000 (22:26 -0600)]
x86: Enable multi-core init for Minnowboard MAX

Enable the CPU uclass and Simple Firmware interface for Minnowbaord MAX. This
enables multi-core support in Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add a CPU driver for baytrail
Simon Glass [Thu, 30 Apr 2015 04:26:02 +0000 (22:26 -0600)]
x86: Add a CPU driver for baytrail

This driver supports multi-core init and sets up the CPU frequencies
correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Allow CPUs to be set up after relocation
Simon Glass [Thu, 30 Apr 2015 04:26:01 +0000 (22:26 -0600)]
x86: Allow CPUs to be set up after relocation

This permits init of additional CPU cores after relocation and when driver
model is ready.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add functions to set and clear bits on MSRs
Simon Glass [Thu, 30 Apr 2015 04:26:00 +0000 (22:26 -0600)]
x86: Add functions to set and clear bits on MSRs

Since we do these sorts of operations a lot, it is useful to have a simpler
API, similar to clrsetbits_le32().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add multi-processor init
Simon Glass [Thu, 30 Apr 2015 04:25:59 +0000 (22:25 -0600)]
x86: Add multi-processor init

Most modern x86 CPUs include more than one CPU core. The OS normally requires
that these 'Application Processors' (APs) be brought up by the boot loader.
Add the required support to U-Boot to init additional APs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Provide access to the IDT
Simon Glass [Wed, 29 Apr 2015 02:25:16 +0000 (20:25 -0600)]
x86: Provide access to the IDT

Add a function to return the address of the Interrupt Descriptor Table.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Store the GDT pointer in global_data
Simon Glass [Wed, 29 Apr 2015 02:25:15 +0000 (20:25 -0600)]
x86: Store the GDT pointer in global_data

When we start up additional CPUs we want them to use the same Global
Descriptor Table. Store the address of this in global_data so we can
reference it later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add an mfence macro
Simon Glass [Wed, 29 Apr 2015 02:25:14 +0000 (20:25 -0600)]
x86: Add an mfence macro

Provide access to this x86 instruction from C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add defines for fixed MTRRs
Simon Glass [Wed, 29 Apr 2015 02:25:13 +0000 (20:25 -0600)]
x86: Add defines for fixed MTRRs

Add MSR numbers for the fixed MTRRs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add atomic operations
Simon Glass [Wed, 29 Apr 2015 02:25:12 +0000 (20:25 -0600)]
x86: Add atomic operations

Add a subset of this header file from Linux 4.0 to support atomic operations
in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agoAdd a 'cpu' command to print CPU information
Simon Glass [Wed, 29 Apr 2015 02:25:11 +0000 (20:25 -0600)]
Add a 'cpu' command to print CPU information

Add a simple command which provides access to a list of available CPUs along
with descriptions and basic information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Add support for the Simple Firmware Interface (SFI)
Simon Glass [Wed, 29 Apr 2015 02:25:10 +0000 (20:25 -0600)]
x86: Add support for the Simple Firmware Interface (SFI)

This provides a way of passing information to Linux without requiring the
full ACPI horror. Provide a rudimentary implementation sufficient to be
recognised and parsed by Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agodm: Implement a CPU uclass
Simon Glass [Wed, 29 Apr 2015 02:25:09 +0000 (20:25 -0600)]
dm: Implement a CPU uclass

It is useful to be able to keep track of the available CPUs in a multi-CPU
system. This uclass is mostly intended for use with SMP systems.

The uclass provides methods for getting basic information about each CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agoAdd print_freq() to display frequencies nicely
Simon Glass [Wed, 29 Apr 2015 13:56:43 +0000 (07:56 -0600)]
Add print_freq() to display frequencies nicely

Add a function similar to print_size() that works for frequencies. It can
handle from Hz to GHz.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
9 years agoMove display_options functions to their own header
Simon Glass [Wed, 29 Apr 2015 02:25:07 +0000 (20:25 -0600)]
Move display_options functions to their own header

Before adding one more function, create a separate header to help reduce
the size of common.h. Add the missing function comments and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Disable -Werror
Simon Glass [Wed, 29 Apr 2015 02:25:06 +0000 (20:25 -0600)]
x86: Disable -Werror

This is annoying during development and serves no useful purpose since
warnings are clearly displayed now that we are using Kbuild. Remove this
option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Remove unwanted MMC debugging
Simon Glass [Wed, 29 Apr 2015 02:25:05 +0000 (20:25 -0600)]
x86: Remove unwanted MMC debugging

This printf() should not have made it into the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agodm: core: Add a function to bind a driver for a device tree node
Simon Glass [Wed, 29 Apr 2015 02:25:04 +0000 (20:25 -0600)]
dm: core: Add a function to bind a driver for a device tree node

Some device tree nodes do not have compatible strings but do require
drivers. This is pretty rare, and somewhat unfortunate. Add a function
to permit creation of a driver for any device tree node.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoFix comment nits in board_f.c
Simon Glass [Wed, 29 Apr 2015 02:25:03 +0000 (20:25 -0600)]
Fix comment nits in board_f.c

Try to make it a little clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: fsp: Use reset_cpu()
Simon Glass [Wed, 29 Apr 2015 02:11:32 +0000 (20:11 -0600)]
x86: fsp: Use reset_cpu()

Now that reset_cpu() functions correctly, use it instead of directly
accessing the port on boards that use a Firmware Support Package (FSP).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: quark: Use reset_cpu()
Simon Glass [Wed, 29 Apr 2015 02:11:31 +0000 (20:11 -0600)]
x86: quark: Use reset_cpu()

Now that reset_cpu() functions correctly, use it instead of directly
accessing the port.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: ivybridge: Use reset_cpu()
Simon Glass [Wed, 29 Apr 2015 02:11:30 +0000 (20:11 -0600)]
x86: ivybridge: Use reset_cpu()

Now that reset_cpu() functions correctly, use it instead of directly
accessing the port.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: Implement reset_cpu() correctly for modern CPUs
Simon Glass [Wed, 29 Apr 2015 02:11:29 +0000 (20:11 -0600)]
x86: Implement reset_cpu() correctly for modern CPUs

The existing code is pretty ancient and is unreliable on modern hardware.
Generally it will hang.

We can use port 0xcf9 to initiate reset on more modern hardware (say in the
last 10 years). Update the reset_cpu() function to do this, and add a new
'full reset' function to perform a full power cycle.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
9 years agox86: link: Add PCH driver to support SPI Flash
Simon Glass [Mon, 20 Apr 2015 13:07:03 +0000 (07:07 -0600)]
x86: link: Add PCH driver to support SPI Flash

U-Boot on coreboot does not have a driver for the PCH so cannot see the
SPI peripheral now that it has moved inside the PCH. Add a simple driver so
that SPI flash works again.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: Update chromebook_link instructions for binary blob
Simon Glass [Mon, 20 Apr 2015 04:05:37 +0000 (22:05 -0600)]
x86: Update chromebook_link instructions for binary blob

The MRC image is incorrect, or at least this one now does not seem to
work. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agox86: minnowmax: use the correct NOR in the configuration
Gabriel Huau [Sat, 25 Apr 2015 15:13:11 +0000 (08:13 -0700)]
x86: minnowmax: use the correct NOR in the configuration

The SPI NOR on the minnowboard max is a MICRON N25Q064A

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Correct the typo in write_tables()
Bin Meng [Tue, 28 Apr 2015 10:37:03 +0000 (18:37 +0800)]
x86: Correct the typo in write_tables()

It should be #ifdef instead of #if.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONS
Bin Meng [Mon, 27 Apr 2015 15:22:28 +0000 (23:22 +0800)]
x86: Kconfig: Remove deprecated CONFIG_SYS_EXTRA_OPTIONS

Currently all x86 boards still use CONFIG_SYS_EXTRA_OPTIONS to define
the text base address. Since it is deprecated, just remove it and use
CONFIG_SYS_TEXT_BASE directly.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig
Bin Meng [Mon, 27 Apr 2015 15:22:27 +0000 (23:22 +0800)]
x86: Kconfig: Move DM_SPI & DM_SPI_FLASH to arch/Kconfig

Since all x86 boards have been converted to use DM_SPI and
DM_SPI_FLASH, move them to arch/Kconfig x86 section.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Kconfig: MARK_GRAPHICS_MEM_WRCOMB cosmetics
Bin Meng [Mon, 27 Apr 2015 15:22:26 +0000 (23:22 +0800)]
x86: Kconfig: MARK_GRAPHICS_MEM_WRCOMB cosmetics

Remove the ending period of the MARK_GRAPHICS_MEM_WRCOMB option. Also
fix the indention of its help text.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Kconfig: Move platform options forward
Bin Meng [Mon, 27 Apr 2015 15:22:25 +0000 (23:22 +0800)]
x86: Kconfig: Move platform options forward

Move platform-specific options under in arch/x86/Kconfig forward right
after the board-specific options but before any architecture-specific
options. When it comes to the same Kconfig option, board-specific one
takes take the highest precedence, then platform-specific one, and
finally architecture-specific one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Kconfig: Divide the target selection to vendor/model
Bin Meng [Mon, 27 Apr 2015 15:22:24 +0000 (23:22 +0800)]
x86: Kconfig: Divide the target selection to vendor/model

Let arch/x86/Kconfig prompt board vendor first, then select
the board model under that vendor. This way arch/x86/Kconfig
only needs concern board vendor and leave the supported target
list to board/<vendor>/Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: quark: Turn on legacy segments decode
Bin Meng [Mon, 27 Apr 2015 06:16:02 +0000 (14:16 +0800)]
x86: quark: Turn on legacy segments decode

By default the legacy segments (A0000h-B0000h, E0000h-F0000h)
do not decode to system RAM. Turn on the decode so that we can
write configuration tables in the F segment.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Check PIRQ routing table sanity in the F segment
Bin Meng [Mon, 27 Apr 2015 06:16:01 +0000 (14:16 +0800)]
x86: Check PIRQ routing table sanity in the F segment

Previously the PIRQ routing table sanity check was performed against
the original table provided by the platform codes. Now we switch to
check its sanity on the final table in the F segment as this one is
the one seen by the OS.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: minnowmax: add GPIO banks in the device tree
Gabriel Huau [Sat, 25 Apr 2015 20:16:57 +0000 (13:16 -0700)]
x86: minnowmax: add GPIO banks in the device tree

There are 6 banks:
    4 banks for CORE: available in S0 mode
    2 banks for SUS (Suspend): available in S0-S5 mode

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: baytrail: fix the GPIOBASE address
Gabriel Huau [Sat, 25 Apr 2015 20:16:03 +0000 (13:16 -0700)]
x86: baytrail: fix the GPIOBASE address

The correct GPIOBASE address on the baytrail is 0x48

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Correct Minnowboard instructions to use the right descriptor
Simon Glass [Sat, 25 Apr 2015 17:46:43 +0000 (11:46 -0600)]
x86: Correct Minnowboard instructions to use the right descriptor

The descriptor provided with the FSP does not seem to work. Update the
instructions to use the descriptor from the original Intel firmware.

Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agobiosemu: Do not free vga_info->BIOSImage when it is 0xc0000
Bin Meng [Fri, 24 Apr 2015 07:48:05 +0000 (15:48 +0800)]
biosemu: Do not free vga_info->BIOSImage when it is 0xc0000

For x86, vga_info->BIOSImage points to 0xc0000 which cannot be freed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agopci: Remove parameter 'class' of pci_rom_load()
Bin Meng [Fri, 24 Apr 2015 07:48:04 +0000 (15:48 +0800)]
pci: Remove parameter 'class' of pci_rom_load()

pci_rom_load() does not use its parameter 'class', so remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agopci: Option rom class is a 24-bit number
Bin Meng [Fri, 24 Apr 2015 07:48:03 +0000 (15:48 +0800)]
pci: Option rom class is a 24-bit number

We should pass a u32 class number to pci_rom_probe() instead of a u16.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: queensbay: Implement PIRQ routing
Bin Meng [Fri, 24 Apr 2015 10:10:06 +0000 (18:10 +0800)]
x86: queensbay: Implement PIRQ routing

Implement Intel Queensbay platform-specific PIRQ routing support.
The chipset PIRQ routing setup is called in the arch_misc_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Support platform PIRQ routing
Bin Meng [Fri, 24 Apr 2015 10:10:05 +0000 (18:10 +0800)]
x86: Support platform PIRQ routing

On x86 boards, platform chipset receives up to four different
interrupt signals from PCI devices (INTA/B/C/D), which in turn
will be routed to chipset internal PIRQ lines then routed to
8259 PIC finally if configuring the whole system to work under
the so-called PIC mode (in contrast to symmetric IO mode which
uses IOAPIC).

We add two major APIs to aid this, one for routing PIRQ and the
other one for generating a PIRQ routing table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Write configuration tables in last_stage_init()
Bin Meng [Fri, 24 Apr 2015 10:10:04 +0000 (18:10 +0800)]
x86: Write configuration tables in last_stage_init()

We can write the configuration table in last_stage_init() for all x86
boards, but not with coreboot since coreboot already has them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Add a function to assign IRQ numbers to PCI device
Bin Meng [Fri, 24 Apr 2015 10:10:03 +0000 (18:10 +0800)]
x86: Add a function to assign IRQ numbers to PCI device

Add a function to assign an IRQ number to PCI device's interrupt
line register in its configuration space, so that the PCI device
can have its interrupt working under PIC mode after OS boots up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Install a default e820 table in the __weak install_e820_map()
Bin Meng [Tue, 21 Apr 2015 04:21:36 +0000 (12:21 +0800)]
x86: Install a default e820 table in the __weak install_e820_map()

Create a default e820 table with 3 entries which is enough to boot
a Linux kernel.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Clean up arch/x86/include/asm/e820.h
Bin Meng [Tue, 21 Apr 2015 04:21:35 +0000 (12:21 +0800)]
x86: Clean up arch/x86/include/asm/e820.h

There are lots of unused codes defined in e820.h, clean it up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Add alias for SPI node in the board dts
Bin Meng [Wed, 15 Apr 2015 04:00:11 +0000 (12:00 +0800)]
x86: Add alias for SPI node in the board dts

Since Intel ICH SPI driver has been converted to driver model, we need
add an alias for SPI node in the board dts files otherwise SPI flash
won't be detected due to 'invalid bus' error.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Set serial port IRQ for SMSC LPC47M
Bin Meng [Tue, 31 Mar 2015 03:25:03 +0000 (11:25 +0800)]
x86: Set serial port IRQ for SMSC LPC47M

For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Move CONFIG_ENV_IS_IN_SPI_FLASH to x86-common.h
Bin Meng [Tue, 31 Mar 2015 03:51:04 +0000 (11:51 +0800)]
x86: Move CONFIG_ENV_IS_IN_SPI_FLASH to x86-common.h

Since all x86 boards use spi flash as its bootloader storage media,
it makes sense to make CONFIG_ENV_IS_IN_SPI_FLASH a common option.
So far only minnowmax board does not support it so undefine it in
its board configuration file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: queensbay: Avoid using PCH prefix
Bin Meng [Mon, 13 Apr 2015 11:03:42 +0000 (19:03 +0800)]
x86: queensbay: Avoid using PCH prefix

The prefix PCH was taken from ivybridge port. However Queensbay
platform official document does not mention PCH. It is composed
of TunnelCreek processor and Topcliff IOH chipset. For accuracy,
avoid using PCH prefix in the macro.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: Remove the old VGA driver
Bin Meng [Mon, 13 Apr 2015 11:05:02 +0000 (19:05 +0800)]
x86: Remove the old VGA driver

CONFIG_VIDEO_VGA is no longer needed thus remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agox86: minnowmax: Remove CONFIG_VIDEO_X86 in the defconfig
Bin Meng [Mon, 13 Apr 2015 11:05:22 +0000 (19:05 +0800)]
x86: minnowmax: Remove CONFIG_VIDEO_X86 in the defconfig

CONFIG_VIDEO_X86 has been replaced by CONFIG_VIDEO_VESA.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
9 years agoMerge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Wed, 29 Apr 2015 10:46:33 +0000 (06:46 -0400)]
Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze

9 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Wed, 29 Apr 2015 10:46:03 +0000 (06:46 -0400)]
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

9 years agoARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ
Masahiro Yamada [Mon, 16 Mar 2015 07:43:24 +0000 (16:43 +0900)]
ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQ

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: move SoC headers to mach-zynq/include/mach
Masahiro Yamada [Mon, 16 Mar 2015 07:43:23 +0000 (16:43 +0900)]
ARM: zynq: move SoC headers to mach-zynq/include/mach

Move arch/arm/include/asm/arch-zynq/*
  -> arch/arm/mach-zynq/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: move SoC sources to mach-zynq
Masahiro Yamada [Mon, 16 Mar 2015 07:43:22 +0000 (16:43 +0900)]
ARM: zynq: move SoC sources to mach-zynq

Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>