This patch resolves the below mentioned compilation error of i2c driver
for non-FDT case
Compilation error:
s3c24x0_i2c.c: In function 'board_i2c_init':
s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use
in this function) s3c24x0_i2c.c:544:18: note: each undeclared
identifier is reported only once for each function it appears in
s3c24x0_i2c.c:545:3: warning: implicit declaration of function
1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock init codes from board/samsung to arch/arm
3) Creat a common lowlevel_init file across Exynos4 and Exynos5. Converted
the common lowlevel_init from assembly to C-code
4) Made spl_boot.c and tzpc_init.c common for both exynos4 and exynos5.
5) Enable CONFIG_SKIP_LOWLEVEL_INIT as stack pointer initialisation is already
done in _main.
6) exynos-uboot-spl.lds made common across SMDKV310, Origen and SMDK5250.
TEST: Tested SD-MMC boot on SMDK5250 and Origen.
Tested USB and SPI boot on SMDK5250
Compile tested for SMDKV310.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Axel Lin [Fri, 21 Jun 2013 10:54:25 +0000 (18:54 +0800)]
ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.
This patch fixes this issue by:
1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h.
2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5.
Thanks for Lubomir Popov to provide valuable comments to fix this issue.
Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
Ilya Ledvich [Mon, 17 Jun 2013 13:59:27 +0000 (16:59 +0300)]
am33xx: fix the ddr_cmdtctrl structure
Fix the wrong mapping between the DDR I/O control registers on AM33XX
SoCs and the software representation in the SPL code.
The most recent public TRM defines the following DDR I/O control registers
offsets:
* ddr_cmd0_ioctrl : offset 0x44E11404
* ddr_cmd1_ioctrl : offset 0x44E11408
* ddr_cmd2_ioctrl : offset 0x44E1140C
* ddr_data0_ioctrl: offset 0x44E11440
* ddr_data1_ioctrl: offset 0x44E11444
While the struct ddr_cmdtctrl has also some reserved bits in the beginning.
The struct is mapped to the address 0x44E11404. As a result "cm0ioctl" points
to the ddr_cmd1_ioctrl register, "cm1ioctl" to the ddr_cmd2_ioctrl and etc.
Registers ddr_cmd0_ioctrl and ddr_data0_ioctrl are never configured because
of this mapping mismatch.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il> Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
This patch fix the omap access to the transceiver
configuration registers using the ulpi bus. As reported by
the documentation the bit31 is used only to check if the
transaction is done or still running and the reading and
writing operation have different offset and have different
values. What we need to do at the end of a transaction is
leave the bus in done state. Anyway an error using the ulpi
omap register is not recoverable so any error give out the
usage of this interface.
Tested on a custom OMAP5430 board with a TUSB1210 ULPI PHY
on USBB1.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
Fabio Estevam [Fri, 3 May 2013 18:08:00 +0000 (15:08 -0300)]
README: mxs: Introduce README.mxs
Create a README.mxs file that contains instructions on how to use U-boot for
both MX23 and MX28.
As boot from NAND has only been tested on mx28, make it clear that it only
applies to MX28.
While at it, do some small cleanups for the sake of consistency:
- Use "MX28" instead of "i.MX28"
- Use "section" instead of "chapter" when referring to specific parts of the
reference manual chapters.
Pierre Aubert [Tue, 4 Jun 2013 07:00:15 +0000 (09:00 +0200)]
imx: Add support for the SabreSD shipped with i.MX6DL
The SabreSD platform is available with i.MX6Q or i.MX6DL. This patch adds the
support of the i.MX6DL. The config file and the board directory are renamed
to remove the reference to the MX6Q.
Dirk Behme [Sat, 11 May 2013 05:25:54 +0000 (07:25 +0200)]
spi: mxc_spi: Update pre and post divider algorithm
The spi clock divisor is of the form x * (2**y), or x << y, where x is
1 to 16, and y is 0 to 15. Note the similarity with floating point numbers.
Convert the desired divisor to the smallest number which is >= desired divisor,
and can be represented in this form. The previous algorithm chose a divisor
which could be almost twice as large as needed.
This patch adds FDT support to the serial s5p driver.
At present disabling the serial console (from the device tree) crashes
U-Boot. Add checks for this case, so that execution can continue without
a serial console.
It also enables the serial_s5p driver recognize the silent_console option.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some Exynos5250 silicon may require 1.05v on the MIF to be stable, so to be
safe we can default to 1.05v instead of 1.00v. This can be set optimally later
in the boot process by the kernel.
The 0x6 value for 1.05v comes from the MAX77686 datasheet.
Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Mike Dunn [Fri, 21 Jun 2013 16:12:28 +0000 (09:12 -0700)]
pxa: fix memory coherency problem after relocation
On the xscale, the icache must be invalidated and the write buffers drained
after writing code over the data bus, even if the caches are disabled. Tested
on the pxa270.
Mike Dunn [Mon, 17 Jun 2013 17:47:28 +0000 (10:47 -0700)]
pxa: turn icache off in cpu_init_crit()
The comment in the low-level initialization function cpu_init_crit() says that
the caches are being disabled, but (oddly) the icache is actually turned on.
This is probably not a good idea prior to relocating code, so this patch turns
it off. Tested on the pxa270.
Mike Dunn [Tue, 18 Jun 2013 18:08:51 +0000 (11:08 -0700)]
pxa: palmtreo680 flash programming utility
This adds a userspace linux utility that writes the u-boot image to an mtd
partition on the docg4 nand flash.
A special utility is required to do this because u-boot is partially loaded by
an initial program loader (IPL) that is permanently programmed to the boot
region of the flash. This IPL expects the image to be written in a unique
format. The characteristics of this format can be summarized as follows:
- Flash blocks to be loaded must have a magic number in the oob bytes of the
first page of the block.
- Each page must be written redundantly in the subsequent page.
- The integrated flash controller's "reliable mode" is used, requiring that
alternate 2k regions (4 pages) are skipped when writing.
For these reasons, a u-boot image can not be written using nandwrite from
mtd-utils.
Mike Dunn [Tue, 18 Jun 2013 18:08:50 +0000 (11:08 -0700)]
pxa: add support for palmtreo680 board
This patch adds support for the Palm Treo 680 smartphone. A quick overview of
u-boot implementation on the treo 680...
The treo 680 has a Diskonchip G4 nand flash chip. This device has a 2k region
that maps to the system bus at the reset vector in a NOR-like fashion so that it
can be used as the boot device. The phone is shipped with this 2k region
configured as write-protected (can't be modified) and programmed with an initial
program loader (IPL). At power-up, this IPL loads the contents of two flash
blocks to SDRAM and jumps to it. The capacity of the two blocks is not large
enough to hold all of u-boot, so a u-boot SPL is used. To conserve flash space,
these two blocks and the necessary number of subsequent blocks are programmed
with a concatenated spl + u-boot image. That way, the IPL will also load a
portion of u-boot proper, and when the spl runs, it relocates the portion of
u-boot that the IPL has already loaded, and then resumes loading the remaining
part of u-boot before jumping to it.
The default_environment is used (CONFIG_ENV_IS_NOWHERE) because I didn't think
that having a writable environment was worth the cost of a flash block, although
adding it would be straightforward. I abuse the CONFIG_EXTRA_ENV_SETTINGS
option to specify the usbtty for the console (CONFIG_SYS_CONSOLE_IS_IN_ENV).
Support for the LCD is included, but currently it is only useful for displaying
the u-boot splash screen. But if u-boot is built without the usbtty console, it
does display the auto-boot progress nicely.
Albert ARIBAUD [Tue, 11 Jun 2013 12:17:32 +0000 (14:17 +0200)]
arm: generalize lib/bss.c into lib/sections.c
File arch/arm/lib/bss.c was initially defined for BSS only,
but is now going to also contain definitions for other
section-boundary-related symbols, so rename it for better
accuracy.
Albert ARIBAUD [Tue, 11 Jun 2013 12:17:31 +0000 (14:17 +0200)]
remove all references to .dynsym
Discard all .dynsym sections from linker scripts
Remove all __dynsym_start definitions from linker scripts
Remove all __dynsym_start references from the codebase
Note: this touches include/asm-generic/sections.h, which
is not ARM-specific, but actual uses of __dynsym_start
are only in ARM, so this patch can safely go through
the ARM repository.
Even though this part of code was missing, things were working
fine on Exynos5250 because, samsung_get_base_fimd() used
to give the correct base address for Exynos5250 FIMD.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Guinot [Tue, 18 Jun 2013 13:14:50 +0000 (15:14 +0200)]
net2big_v2: initialize LEDs at startup
This patch allows to configure the net2big_v2 LEDs at startup (through
the GPIO extension bus). The front blue LED is enabled and the SATA rear
LEDs are configured to blink in relation with the SATA activity.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Simon Guinot [Tue, 18 Jun 2013 13:14:49 +0000 (15:14 +0200)]
LaCie/common: add support for the CPLD GPIO bus
This patch adds support for the CPLD GPIO bus found on some LaCie boards
(as the 2Big/5Big Network v2 and the 2Big NAS). This parallel GPIO bus
exposes two registers (address and data). Each of this register is made
up of several dedicated GPIOs. An extra GPIO is used to notify the CPLD
that the registers have been updated.
Mostly this bus is used to configure the LEDs on LaCie boards.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Dan Murphy [Thu, 13 Jun 2013 16:21:13 +0000 (11:21 -0500)]
arm: omap4: panda: Add reading of the board revision
Detect if we are running on a panda revision A1-A6,
or an ES panda board. This can be done by reading
the level of GPIOs and checking the processor revisions.
This should result in:
Panda 4430:
GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
GPIO171, GPIO101, GPIO182: 1 0 1 => A6
Panda ES:
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
Set the board name appropriately for the board revision that
is detected.
Update the findfdt macro to load the a4 device tree binary.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
[trini: %s/CONTROL_PADCONF_CORE/(*ctrl)->control_padconf_core_base/ and
formatting for that] Signed-off-by: Tom Rini <trini@ti.com>
Dan Murphy [Thu, 6 Jun 2013 18:27:06 +0000 (13:27 -0500)]
arm: omap: Add check for fdtfile in the findfdt macro
In the omap4, omap5 and am335x common files add a check to ensure that the fdtfile is
defined after the findfdt macro has run. If the file is not defined then warn the user that the
dtb file is not defined.
Signed-off-by: Dan Murphy <dmurphy@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Current DWMMC driver used to give FIFO underrun/overrun error every 3rd time
for mmc rescan command.
In current code FIFO_DEPTH is getting calculated after reading the default FIFOTH
register and extracting the RX_WMARK bits from it i.e (RX_WMARK = FIFO_DEPTH/2 -1).
Instead of storing the correct value, we were recalculating the FIFO_DEPT each
time which is not correct.
Based on "[PATCH V9 3/9] DWMMC: Initialise dwmci and resolve EMMC read write issues"
http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/160247
Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch does the folowing
1. change the data types for unsigned int variable to unsigned
2. change the tmu_base type to struct exynos5_tmu_reg *
3. Add timer functionality for get_cur_temp()
4. error handling in the get_tmu_fdt_values()
5. Add check for curr_temp reading
6. some cosmotic changes.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Vadim Bendebury <vbendeb@google.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT
This patch enables and initialises DWMMC for SMDK5250.
Supports both FDT and non-FDT. This patch creates a new file
'exynos5-dt.c' meant for FDT support.
exynos5-dt.c: This file shall contain all code which supports FDT.
Any addition of FDT support for any module needs to be
added in this file.
smdk5250.c: This file shall contain the code which supports non-FDT.
version. Any addition of non-FDT support for any module
needs to be added in this file.
May be, the file smdk5250.c can be removed in near future
when non-FDT is not required.
The Makefile is updated to compile only one of the files
exynos5-dt.c / smdk5250.c based on FDT configuration.
NOTE:
Please note that all additions corresponding to FDT need to be added into the
file exynos5-dt.c.
At same time if non-FDT support is required then add the corresponding
updations into smdk5250.c.
Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.
This patch initialises the local variable 'shift' to zero.
The uninitialised local variable 'shift' had garbage value and was
resulting in unwnated results in the functions exynos5_get_mmc_clk()
and exynos4_get_mmc_clk().
Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds FDT support for DWMMC, by reading the DWMMC node data
from the device tree and initialising DWMMC channels as per data
obtained from the node.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
DWMMC: Initialise dwmci and resolve EMMC read write issues
This patch enumerates dwmci and set auto stop command during
dwmci initialisation.
EMMC read/write is not happening in current implementation
due to improper fifo size computation. Hence modified the fifo size
computation to resolve EMMC read write issues.
Sergey Yanovich [Mon, 20 May 2013 21:26:00 +0000 (01:26 +0400)]
arm: pxa: Add support for ICP DAS LP-8x4x
LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0
This patch adds enough supports to boot the board:
- 128M of 128M SDRAM
- 32M of 48M NOR Flash memory
- 1 of 4 Serial consoles (PXA FFUART)
- 2 of 2 Ethernet controllers (DM9000)
arm: da830: moved pinmux configurations to the arch tree
Move pinmux configurations for the DA830 SoCs from board file
to the arch tree so that it can be used for all da830 based devices.
Also, avoids duplicate pinmuxing in case of NAND.
Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
Lubomir Popov [Sat, 1 Jun 2013 06:44:38 +0000 (06:44 +0000)]
ARM: OMAP: I2C: New read, write and probe functions
New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4
(4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older
OMAPs and derivatives as well. The only anticipated exception would
be the OMAP2420, which shall require driver modification.
- Rewritten i2c_read to operate correctly with all types of chips
(old function could not read consistent data from some I2C slaves).
- Optimised i2c_write.
- New i2c_probe, performs write access vs read. The old probe could
hang the system under certain conditions (e.g. unconfigured pads).
- The read/write/probe functions try to identify unconfigured bus.
- Status functions now read irqstatus_raw as per TRM guidelines
(except for OMAP243X and OMAP34XX).
- Driver now supports up to I2C5 (OMAP5).
Tom Rini [Tue, 4 Jun 2013 12:02:06 +0000 (12:02 +0000)]
arm: Remove OMAP2420H4 and all omap24xx support
The omap2420H4 was the only mainline omap24xx board. Prior to being
fixed by Jon Hunter in time for v2013.04 it had been functionally broken
for a very long time. Remove this board as there's not been interest in
it in U-Boot for quite a long time.
Lokesh Vutla [Thu, 30 May 2013 03:19:38 +0000 (03:19 +0000)]
ARM: DRA7xx: clocks: Update PLL values
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
projects / u-boot / log