Fabio Estevam [Thu, 14 Mar 2013 02:32:54 +0000 (02:32 +0000)]
nitrogen6x: Fix RAM size variable
Fix the following build error when buildig nitrogen6s1g:
nitrogen6x.c:89:17: error: 'CONFIG_DDR_MB' undeclared (first use in
this function)
nitrogen6x.c:89:17: note: each undeclared identifier is reported only
once for each function it appears in
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Stephen Warren [Tue, 26 Feb 2013 12:28:28 +0000 (12:28 +0000)]
ARM: tegra: enable some CPU errata workarounds
Tegra20 has a Cortex A9 r1p1, and Tegra30 has a Cortex A9 r2p9. As such,
some CPU errata exist, and must be worked around.
These must be worked around in the bootloader, since in general, the
kernel (especially a multi-platform kernel) needs to support being
launched in non-secure mode (normal world), and hence may not be able
to write to the CP15 register to enable these workarounds.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 26 Feb 2013 12:28:27 +0000 (12:28 +0000)]
ARM: implement some Cortex-A9 errata workarounds
Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.
This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().
Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Mon, 25 Feb 2013 00:59:00 +0000 (00:59 +0000)]
Refactor linker-generated arrays
Refactor linker-generated array code so that symbols
which were previously linker-generated are now compiler-
generated. This causes relocation records of type
R_ARM_ABS32 to become R_ARM_RELATIVE, which makes
code which uses LGA able to run before relocation as
well as after.
Note: this affects more than ARM targets, as linker-
lists span possibly all target architectures, notably
PowerPC.
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:59 +0000 (00:58 +0000)]
arm: make __bss_start and __bss_end__ compiler-generated
Turn __bss_start and __bss_end__ from linker-generated
to compiler-generated symbols, causing relocations for
these symbols to change type, from R_ARM_ABS32 to
R_ARM_RELATIVE.
This should have no functional impact, as it affects
references to __bss_start and __bss_end__ only before
relocation, and no such references are done.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:58 +0000 (00:58 +0000)]
Remove linker lists (LGAs) from SPL linker scripts
Many SPL linker scripts needlessly include linker lists (aka LGAs).
Remove them whenever possible; keep it only in the seven am335x_evm
variants (am335x_evm, am335x_evm_uart[1-5], am335x_evm_spiboot),
where there is actual content in output section .u_boot_list.
This commit keeps all u-boot.bin and u-boot-spl.bin in ARM targets
byte-identical.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Mon, 25 Feb 2013 00:58:57 +0000 (00:58 +0000)]
arm: omap: map u_boot_lists section to .sram
Output section .u_boot_list was left unmapped in
u-boot-spl.lds for omap-common, causing the location
counter to roll back to bteween .rodata and .data,
making __image_copy_end and _end symbols wrong.
Mapping output section .u_boot_list to memory .sram
fixes these symbols' mapping.
This modifies the SPL binary but has no functional
impact, as __image_copy_end and _end are never used
in SPLs and u_boot_list is empty for all 29 boards
affected (omap4_sdp4430 eco5pk igep0030 am335x_evm_uart3
omap3_beagle am3517_crane igep0032 mt_ventoux pcm051
am3517_evm omap3_evm_quick_mmc am335x_evm_uart2
am335x_evm_spiboot am335x_evm_uart1 omap3_evm igep0030_nand
omap3_overo igep0020 am335x_evm omap4_panda omap5_evm
am335x_evm_uart4 devkit8000 tricorder mcx twister
omap3_evm_quick_nand am335x_evm_uart5 igep0020_nand).
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Nicolas Ferre [Wed, 20 Feb 2013 00:16:24 +0000 (00:16 +0000)]
arm: at91/configs: add bootz to configuration
Support to boot zImage
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[Add bootz for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Nicolas Ferre [Wed, 20 Feb 2013 00:16:23 +0000 (00:16 +0000)]
arm: at91/configs: add libfdt to configuration
support to boot device tree Linux kernel
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
[Add libftd for at91rm9200, at91sam9263, at91sam9rl] Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tom Rini [Mon, 11 Mar 2013 16:02:40 +0000 (12:02 -0400)]
Merge u-boot/master into u-boot-ti/master
In master we had already taken a patch to fix the davinci GPIO code for
CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support
DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850). Resolve these
conflicts manually and comment the #else/#endif lines for clarity.
Lokesh Vutla [Tue, 12 Feb 2013 21:29:08 +0000 (21:29 +0000)]
arm: dra7xx: Add board files for DRA7XX socs
Adding new board files for DRA7XX socs.
The pad registers layout is changed completely from OMAP5
So introducing the new structure here and also adding the
minimal data.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishant Kamat <nskamat@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
[trini: Adapt omap_mmc_init call for last 2 params] Signed-off-by: Tom Rini <trini@ti.com>
Lokesh Vutla [Tue, 12 Feb 2013 21:29:05 +0000 (21:29 +0000)]
arm: dra7xx: clock: Add the dplls data
A new DPLL DDR is added in DRA7XX socs. Now clocks to
EMIF CD is from DPLL DDR. So DPLL DDR should be locked
before initializing RAM.
Also adding other dpll data which are different from OMAP5 ES2.0.
SYS_CLK running at 20MHz is introduced in DRA7xx socs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Lokesh Vutla [Tue, 12 Feb 2013 01:33:45 +0000 (01:33 +0000)]
ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup
After power-up SRCOMP cells are by-passed by default in OMAP5.
Software has to enable these SRCOMP sells.
For ES2: All 5 SRCOMP cells needs to be enabled.
For ES1: Only 4 SRCOMP cells in core power domain are enabled.
The 1 in wkup domain is not enabled because smart i/os
of wkup domain work with default compensation code.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
Lokesh Vutla [Mon, 4 Feb 2013 04:22:04 +0000 (04:22 +0000)]
ARM: OMAP4+: Make control module register structure generic
A seperate omap_sys_ctrl_regs structure is defined for
omap4 & 5. If there is any change in control module for
any of the ES versions, a new structure needs to be created.
In order to remove this dependency, making the register
structure generic for all the omap4+ boards.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
SRICHARAN R [Mon, 4 Feb 2013 04:22:01 +0000 (04:22 +0000)]
ARM: OMAP4+: Cleanup the clocks layer
Currently there is quite a lot of code which
is duplicated in the clocks code for OMAP 4 and 5
Socs. Avoiding this here by moving the clocks
data to a SOC specific place and the sharing the
common code.
This helps in addition of a new Soc with minimal
changes.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
SRICHARAN R [Mon, 4 Feb 2013 04:22:00 +0000 (04:22 +0000)]
ARM: OMAP4+: Change the PRCM structure prototype common for all Socs
The current PRCM structure prototype directly matches the hardware
register layout. So there is a need to change this for every new silicon
revision which has register space changes.
Avoiding this by making the prototye generic and populating the register
addresses seperately for all Socs.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Mon, 4 Feb 2013 04:21:59 +0000 (04:21 +0000)]
ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register
Now SDRAM initialization is done on the basis of omap revision.
Instead this should be done on basis of SDRAM type read from
EMIF_SDRAM_CONFIG register. This will be helpful to avoid
unnessecary cpu checks for new boards
Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
Mugunthan V N [Tue, 19 Feb 2013 21:34:44 +0000 (21:34 +0000)]
am335x: cpsw: optimize cpsw_send to increase network performance
Before submitting packets to cpdma, phy status is updated on every packet
which leads to delay in packet send intern reduces the Ethernet performance.
Checking mdio status for each packet will reduce timetaken to send a packet
and there by increasing the Ethernet performance. With this the performance
is increased from 208KiB/s to 375KiB/s on EVMsk
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tom Rini [Tue, 19 Feb 2013 11:18:18 +0000 (11:18 +0000)]
omap4_common: Enable CONFIG_CMD_BOOTZ
With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: R Sricharan <r.sricharan@ti.com>
Tom Rini [Tue, 19 Feb 2013 11:18:17 +0000 (11:18 +0000)]
omap3_beagle: Enable CONFIG_CMD_BOOTZ
With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Tom Rini [Tue, 19 Feb 2013 11:18:16 +0000 (11:18 +0000)]
omap5_evm: Enable CONFIG_CMD_BOOTZ
With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Reviewed-by: R Sricharan <r.sricharan@ti.com>
Tom Rini [Tue, 19 Feb 2013 11:18:15 +0000 (11:18 +0000)]
am335x_evm: Enable CONFIG_CMD_BOOTZ
With v3.9 and later of the Linux Kernel defaulting to multi-platform
images with omap2plus_defconfig, uImage isn't builtable anymore by
default. Add CONFIG_CMD_BOOTZ so that we can still boot something the
kernel spits out.
Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Tested with an IGEPv2 board seems that current onenand_spl_load_image implementation
doesn't work. This patch fixes this function changing the read loop and reading the
onenand blocks from page to page.
Tested with various IGEP based boards with a OneNAND from Numonyx.
Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Nikita Kiryanov [Wed, 30 Jan 2013 21:39:57 +0000 (21:39 +0000)]
lcd: add option for board specific splash screen preparation
Currently there is no logical place to put the code that prepares the
splash image data. The splash image data should be ready in memory
before bmp_display() is called, and after the environment is ready
(since lcd.c looks for the splash image in an address specified by
the environment variable "splashimage").
Our window of opportunity in board_init_r() is therefore: between
env_relocate() and bmp_display(), and from the available options
only the lcd related functions in drv_lcd_init() seem appropriate
for such lcd oriented code.
Add the option to prepare the splash image data in lcd_logo() right
before it is sent to be displayed.
Nikita Kiryanov [Wed, 30 Jan 2013 21:39:55 +0000 (21:39 +0000)]
omap3: allow dynamic selection of gfx_format
Currently, omap3_dss_panel_config() sets gfx_format to a value that is hardcoded
in the code. This forces anyone who wants to use a different gfx_format to make
adjustments after calling omap3_dss_panel_config(). This could be avoided if the
value of gfx_format were parameterized as input for omap3_dss_panel_config().
Make gfx_format a field in struct panel_config, and update existing structs to
set this field to the value that was originally hard coded.
Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Nikita Kiryanov [Mon, 3 Dec 2012 02:19:43 +0000 (02:19 +0000)]
omap_hsmmc: introduce omap_hsmmc_data struct
Currently there's no appropriate place to store driver specific data
because the pointer that is meant for that (priv) is being used to
store the base address of mmc registers.
Introduce a new struct for storing driver specific data.
Nikita Kiryanov [Mon, 3 Dec 2012 02:19:42 +0000 (02:19 +0000)]
omap_hsmmc: fix out of bounds array access
There are 3 MMC/SD/SDIO controllers in OMAP SoCs, but only 2 structs
are defined for devices. This leads to data being written outside of
array bounds on systems that use all 3 controllers.
Tom Rini [Tue, 26 Feb 2013 21:35:33 +0000 (16:35 -0500)]
am33xx: Update DDR3 EMIF configuration sequence
Based on
http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
we need to re-work our sequence in config_sdram slightly to match what
the TRM describes as the correct sequence. In our current (incorrect)
sequence some edge cases may fail to initalize correctly.
Tom Rini [Tue, 26 Feb 2013 18:08:53 +0000 (13:08 -0500)]
am335x_evm: Never set CONFIG_EXTRA_ENV_SETTINGS in SPL
Because of our support for network-based SPL, we don't discard all of
the environment related functions. We however never make use of the
default CONFIG_EXTRA_ENV_SETTINGS items and as this variable grows, it
brings us closer to (or with some toolchains, over) our SPL size limit.
Never set this in the case of SPL.
Otavio Salvador [Thu, 7 Mar 2013 07:32:53 +0000 (07:32 +0000)]
mx23_olinuxino: Fix warning for implicit declaration
Fixes a build warning of implicit declaration of
gpio_direction_output, as bellow:
,----
| mx23_olinuxino.c: In function 'board_early_init_f':
| mx23_olinuxino.c:51:2: warning: implicit declaration
| of function 'gpio_direction_output'
| [-Wimplicit-function-declaration]
`----
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Stephen Warren [Tue, 26 Feb 2013 12:28:29 +0000 (12:28 +0000)]
ARM: mx6: use common CPU errata config options
Now that U-Boot has common CONFIG_ options to work around some ARM CPU
errata, enable the relevant options on MX6, and remove the custom
lowlevel_init.S, since it's just duplicated code now.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
Otavio Salvador [Sat, 23 Feb 2013 02:43:05 +0000 (02:43 +0000)]
mx23: Document the tRAS lockout setting in memory initialization
Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to
enable the 'Fast Auto Pre-Charge' found in the memory chip. The
setting is applied after memory initialization and it is worth
document it.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Otavio Salvador [Sat, 23 Feb 2013 02:43:04 +0000 (02:43 +0000)]
mxs: Rename CONFIG_SPL_MX28_PSWITCH_WAIT to CONFIG_SPL_MXS_PSWITCH_WAIT
The power switch option is compatible with i.MX23 and i.MX28 so the
configration option needs to reflect it. We choose
'CONFIG_SPL_MXS_PSWITCH_WAIT' for the option name.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 23 Feb 2013 02:43:02 +0000 (02:43 +0000)]
mxs: Make ehci-mxs multiport capable
Rework ehci-mxs so it supports both ports on MX28. It was necessary
to wrap the per-port configuration into struct ehci_mxs_port and pull
out the clock configuration function.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Sat, 23 Feb 2013 02:43:01 +0000 (02:43 +0000)]
mxs: Squash the header file usage in ehci-mxs
The ehci-mxs driver included the register definitions directly.
Use imx-regs.h instead since it contains proper handling of the
differences between mx23 and mx28.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Marek Vasut [Sat, 23 Feb 2013 02:42:58 +0000 (02:42 +0000)]
mxs: mmc: spi: dma: Better wrap the MXS differences
This patch streamlines the differences between the MX23 and MX28 by
implementing a few helper functions to handle different DMA channel
mapping, different clock domain for SSP block and fixes a few minor
bugs.
First of all, the DMA channel mapping is now fixed in dma.h by defining
the actual channel map for both MX23 and MX28. Thus, MX23 now does no
longer use MX28 channel map which was wrong. Also, there is a fix for
MX28 DMA channel map, where the last four channels were incorrect.
Next, because correct DMA channel map is in place, the mxs_dma_init_channel()
call now bases the channel ID starting from SSP port #0. This removes the
need for DMA channel offset being added and cleans up the code. For the
same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus
no need to adjust dma channel number in the driver either.
Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus()
which handles the fact that MX23 has shared SSP clock for both ports, while
MX28 has per-port SSP clock.
Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the
same functionality from MMC and SPI driver into common code.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Sat, 23 Feb 2013 02:42:57 +0000 (02:42 +0000)]
mxs: Reset the EMI block on mx23
The real reason for memory instability was the fact that the EMI block
was gated and not reset throughout the boards' operation. This patch
resets the EMI block properly while also reverts the memory voltage bump.
The memory stability issues were caused by the EMI not being reset properly
and thus there is no longer need to run the memory at higher voltage than
it ought to run at.
Eric Nelson [Tue, 19 Feb 2013 10:07:01 +0000 (10:07 +0000)]
i.MX6: consolidate pad names for multi-CPU boards
Rename all i.MX6 pad declarations to MX6_PAD_x, so a board
may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo
(MX6DL) by including the proper header.
Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd
only support MX6Q, so they include mx6q_pins.h.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Simon Glass [Thu, 28 Feb 2013 19:26:17 +0000 (19:26 +0000)]
x86: Adjust link device tree include file
This is currently set to coreboot.dtsi, but we cannot support this on
old device tree compilers (dtc <= 1.3), so adjust to use ARCH_CPU_DTS
to let the Makefile preprocessor sort this out.
Simon Glass [Thu, 28 Feb 2013 19:26:16 +0000 (19:26 +0000)]
x86: Add error checking to x86 relocation code
This does not actually change normal behaviour, but adds a check that
should detect corruption of relocation data (e.g. by using BSS data
prior to relocation).
Also add additional debugging output when enabled.
During this investigation, two situations have been seen:
1. calculate_relocation_address():
uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start;
turns into 111166f: b8 83 c4 17 01 mov $0x117c483,%eax
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